SCDS104C − APRIL 2000 − REVISED SEPTEMBER 2003
D Member of the Texas Instruments
D
D TTL-Compatible Input Levels
D Flow-Through Architecture Optimizes PCB
Widebus+ Family
5-Ω Switch Connection Between Two Ports
Layout
description/ordering information
The SN74CBT32245 provides 32 bits of high-speed TTL-compatible bus switching. The low on-state resistance
of the switch allows connections to be made with minimal propagation delay.
The device is organized as four 8-bit bus switches, two 16-bit bus switches, or one 32-bit bus switch. When
output enable (OE) is low, the switch is on and port A is connected to port B. When OE is high, the switch is open
and the high-impedance state exists between the two ports.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
PACKAGE†
TA
LFBGA − GKE
−40°C to 85°C
TOP-SIDE
MARKING
SN74CBT32245GKER
LFBGA − ZKE (Pb-free)
Tape and reel
SN74CBT32245ZKER
BV245
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each 8-bit bus switch)
INPUT
OE
FUNCTION
L
A port = B port
H
Disconnect
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus+ is a trademark of Texas Instruments.
Copyright 2003, Texas Instruments Incorporated
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POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCDS104C − APRIL 2000 − REVISED SEPTEMBER 2003
GKE OR ZKE PACKAGE
(TOP VIEW)
1
2
3
4
5
terminal assignments
6
1
2
3
4
5
6
A
A
1B2
1B1
NC
1OE
1A1
1A2
B
B
1B4
1B3
GND
GND
1A3
1A4
C
C
1B6
1B5
1B7
VCC
GND
1A6
1B8
VCC
GND
1A5
D
1A7
1A8
E
2B2
2B1
GND
GND
2A1
2A2
F
2B4
2B3
2A4
2B6
2B5
VCC
GND
2A3
G
VCC
GND
2A5
2A6
H
2B7
2B8
NC
2OE
2A8
2A7
J
3B2
3B1
NC
3OE
3A1
3A2
D
E
F
G
H
J
K
3B4
3B3
GND
GND
3A3
3A4
K
L
3B6
3B5
3A6
M
3B8
3B7
VCC
GND
3A5
L
VCC
GND
3A7
3A8
M
N
4B2
4B1
GND
GND
4A1
4A2
N
P
4B4
4B3
4A4
R
4B6
4B5
VCC
GND
4A3
P
VCC
GND
4A5
4A6
R
T
4B7
4B8
NC
4OE
4A8
4A7
NC − No internal connection
T
logic diagram (positive logic)
1A1
A5
A2
D6
D1
1A8
1B1
2A1
1B8
2A8
A4
H5
H2
2B1
2B8
2OE
J5
J2
M6
M1
3A8
3B1
4A1
3B8
4A8
J4
N5
N2
T5
T2
T4
3OE
2
E2
H4
1OE
3A1
E5
4OE
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4B1
4B8
SCDS104C − APRIL 2000 − REVISED SEPTEMBER 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Package thermal impedance, θJA (see Note 2): GKE/ZKE package . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN
MAX
5.5
VCC
VIH
Supply voltage
4
High-level control input voltage
2
VIL
TA
Low-level control input voltage
Operating free-air temperature
−40
UNIT
V
V
0.8
V
85
°C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to TI application report
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VIK
II
VCC = 4.5 V,
VCC = 5.5 V,
II = −18 mA
VI = 5.5 V or GND
ICC
∆ICC§
Control inputs
VCC = 5.5 V,
VCC = 5.5 V,
IO = 0,
One input at 3.4 V,
Ci
Control inputs
VI = 3 V or 0
VO = 3 V or 0,
OE = VCC
Cio(OFF)
VCC = 4 V,
TYP at VCC = 4 V
ron¶
VCC = 4.5 V
MIN
TYP‡
VI = VCC or GND
Other inputs at VCC or GND
MAX
UNIT
−1.2
V
±5
µA
6
µA
3.5
mA
3.5
pF
4.5
pF
VI = 2.4 V,
II = 15 mA
14
20
II = 64 mA
II = 30 mA
5
7
VI = 0
5
7
Ω
VI = 2.4 V,
II = 15 mA
8
12
‡ All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
§ This is the increase in supply current for each input that is at the specified TTL-voltage level, rather than VCC or GND.
¶ Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by
the lower of the voltages of the two (A or B) terminals.
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3
SCDS104C − APRIL 2000 − REVISED SEPTEMBER 2003
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
VCC = 4 V
VCC = 5 V
± 0.5 V
MIN
MIN
FROM
(INPUT)
TO
(OUTPUT)
tpd†
A or B
B or A
0.35
ten
OE
A or B
6.1
OE
A or B
7.5
PARAMETER
tdis
MAX
UNIT
MAX
0.25
ns
1.2
5.6
ns
3.9
7.7
ns
† The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
PARAMETER MEASUREMENT INFORMATION
7V
500 Ω
From Output
Under Test
S1
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
7V
Open
3V
Output
Control
LOAD CIRCUIT
1.5 V
1.5 V
0V
tPLZ
tPZL
3V
Input
1.5 V
1.5 V
0V
tPLH
1.5 V
3.5 V
1.5 V
1.5 V
VOL
Output
Waveform 2
S1 at Open
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOL + 0.3 V
VOL
tPHZ
tPZH
tPHL
VOH
Output
Output
Waveform 1
S1 at 7 V
(see Note B)
1.5 V
VOH
VOH − 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
4
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• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
17-Nov-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
SN74CBT32245ZKER
OBSOLETE
LFBGA
ZKE
96
TBD
Call TI
Call TI
BV245
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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