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SN74CBT3251
SCDS019M – MAY 1995 – REVISED DECEMBER 2015
SN74CBT3251 1-of-8 FET Multiplexer and Demultiplexer
1 Features
3 Description
•
•
•
•
•
The SN74CBT3251 is a 1-of-8 high-speed TTLcompatible FET multiplexer and demultiplexer. The
low ON-state resistance of the switch allows
connections to be made with minimal propagation
delay.
1
5-Ω Switch Connection Between Two Ports
TTL-Compatible Input Levels
Low Crosstalk Between Switches
Fast Switching and Propagation Speeds
Operating Temperature Range:
–40°C to 85°C
When output enable (OE) is low, the SN74CBT3251
is enabled, and S0, S1, and S2 select one of the B
outputs for the A-input data.
2 Applications
•
•
•
•
•
•
•
Digital Radio
Signal Gating
Factory Automation
Televisions
Appliances
Programmable Logic Circuits
Sensors
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN74CBT3251RGY
VQFN (16)
3.50 mm × 4.00 mm
SN74CBT3251DBQ
SSOP (16)
3.90 mm × 4.90 mm
SN74CBT3251PW
TSSOP (16)
4.40 mm × 5.00 mm
SN74CBT3251DB
SSOP (16)
5.30 mm × 6.20 mm
SN74CBT3251D
SOIC (16)
3.91 mm × 9.90 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Functional Diagram of the SN74CBT3251
5
4
A
B1
3
B2
2
B3
1
B4
15
B5
14
B6
13
B7
12
B8
7
OE
11
S0
10
S1
9
S2
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN74CBT3251
SCDS019M – MAY 1995 – REVISED DECEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
4
4
4
4
5
5
5
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Typical Characteristic................................................
Parameter Measurement Information .................. 6
Detailed Description .............................................. 7
8.1 Overview ................................................................... 7
8.2 Functional Block Diagram ......................................... 7
8.3 Feature Description................................................... 7
8.4 Device Functional Modes.......................................... 7
9
Application and Implementation .......................... 8
9.1 Application Information.............................................. 8
9.2 Typical Application ................................................... 8
10 Power Supply Recommendations ....................... 9
11 Layout..................................................................... 9
11.1 Layout Guidelines ................................................... 9
11.2 Layout Example ...................................................... 9
12 Device and Documentation Support ................. 10
12.1
12.2
12.3
12.4
12.5
Documentation Support ........................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
10
10
10
10
10
13 Mechanical, Packaging, and Orderable
Information ........................................................... 10
4 Revision History
Changes from Revision L (January 2004) to Revision M
•
2
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
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SCDS019M – MAY 1995 – REVISED DECEMBER 2015
5 Pin Configuration and Functions
D, DB, DBQ, or PW Packages
16-Pin SOIC, SSOP, or TSSOP
Top View
3
14
4
13
5
12
6
11
7
10
8
9
VCC
B5
B6
B7
B8
S0
S1
S2
B3
B2
B1
A
NC
OE
NC − No internal connection
VCC
15
1
16
15 B5
14 B6
2
3
5
13 B7
12 B8
6
11
7
10 S1
4
8
9
S2
16
2
B4
1
GND
B4
B3
B2
B1
A
NC
OE
GND
RGY Package
16-Pin VQFN
Top View
S0
NC − No internal connection
Pin Functions
PIN
NO.
NAME
I/O
DESCRIPTION
1
B4
I/O
Port B4
2
B3
I/O
Port B3
3
B2
I/O
Port B2
4
B1
I/O
Port B1
5
A
I/O
Common OUT/IN
6
NC
—
No Connect
7
OE
I
8
GND
—
9
S2
I
Select Pin 2. See Table 1.
10
S1
I
Select Pin 1. See Table 1.
11
S0
I
Select Pin 0. See Table 1.
12
B8
I/O
Port B8
13
B7
I/O
Port B7
14
B6
I/O
Port B6
15
B5
I/O
Port B5
16
VCC
—
Power Pin
Enable Ports (Active Low). See Table 1.
Ground
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SCDS019M – MAY 1995 – REVISED DECEMBER 2015
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
Supply voltage, VCC
Input voltage, VI
(2)
MIN
MAX
UNIT
–0.5
7
V
7
V
Continuous channel current
–0.5
128
mA
Input clamp current, IK (VI/O < 0)
–50
mA
150
°C
150
°C
Maximum junction temperature, TJ
Storage temperature, Tstg
(1)
(2)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
6.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±1500
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCC
Supply voltage
4
5.5
VIH
High-level control input voltage
2
VIL
Low-level control input voltage
TA
Operating free-air temperature
UNIT
V
V
–40
0.8
V
85
°C
6.4 Thermal Information
SN74CBT3251
THERMAL METRIC
(1)
D
(SOIC)
DB
(SSOP)
DBQ
(SSOP)
PW
(TSSOP)
RGY
(VQFN)
UNIT
16 PINS
16 PINS
16 PINS
16 PINS
16 PINS
RθJA
Junction-to-ambient thermal resistance
73 (2)
82 (2)
90 (2)
108 (2)
39 (3)
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
70.6
49.0
59.0
41.6
52.8
°C/W
RθJB
Junction-to-board thermal resistance
77.8
49.4
50.1
51.9
20.4
°C/W
ψJT
Junction-to-top characterization parameter
24.3
10.5
13.9
4.0
1.1
°C/W
ψJB
Junction-to-board characterization parameter
77.4
48.8
49.7
51.3
20.4
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
—
—
—
6.4
°C/W
(1)
(2)
(3)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
The package thermal impedance is calculated in accordance with JESD 51-7.
The package thermal impedance is calculated in accordance with JESD 51-5.
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6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIK
VCC = 4.5 V, II = −18 mA
II
VCC = 5.5 V, VI = 5.5 V or GND
ICC
MIN
TYP (1)
VCC = 5.5 V, IO = 0, VI = VCC or GND
ΔICC (2)
Control inputs
VCC = 5.5 V; One input at 3.4 V, other inputs at VCC or GND
Ci
Control inputs
VI = 3 V or 0
A port
VO = 3 V or 0, OE = VCC
17.5
B port
VO = 3 V or 0, OE = VCC
4
Cio(OFF)
VI = 0
VCC = 4.5 V
(1)
(2)
(3)
V
±1
µA
3
µA
2.5
mA
pF
pF
14
20
II = 64 mA
5
7
II = 30 mA
5
7
10
15
VI = 2.4 V, II = 15 mA
UNIT
–1.2
3.5
VCC = 4 V, TYP at VCC = 4 V, VI = 2.4 V, II = 15 mA
ron (3)
MAX
Ω
All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
This is the increase in supply current for each input at the specified TTL voltage level, rather than VCC or GND.
Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is
determined by the lower of the voltages of the two (A or B) terminals.
6.6 Switching Characteristics
over operating free-air temperature free-air temperature range, CL = 50 pF (unless otherwise noted)
PARAMETER
tpd (1)
tpd
FROM (INPUT)
TO (OUTPUT)
A or B
B or A
S
A
S
B
ten
OE
A or B
S
B
tdis
OE
(1)
A or B
VCC
MIN
MAX
VCC = 4 V
0.35
VCC = 5 V ±0.5 V
0.24
VCC = 4 V
VCC = 5 V ±0.5 V
6
2
VCC = 4 V
VCC = 5 V ±0.5 V
1.6
ns
ns
5.8
6.8
1.9
VCC = 4 V
VCC = 5 V ±0.5 V
5.6
6.4
VCC = 4 V
VCC = 5 V ±0.5 V
ns
6.4
1.5
VCC = 4 V
VCC = 5 V ±0.5 V
5.5
UNIT
6.4
6
2.3
ns
6.2
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load
capacitance, when driven by an ideal voltage source (zero output impedance).
6.7 Typical Characteristic
0.1
0.095
ICC (PA)
0.09
0.085
0.08
0.075
0.07
-45
-30
-15
0
15
30
45
Temperature (qC)
60
75
90
D001
Figure 1. ICC Variation With Temperature
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7 Parameter Measurement Information
7V
500 Ω
From Output
Under Test
S1
Open
GND
CL = 50 pF
(see Note A)
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
7V
Open
500 Ω
3V
Output
Control
LOAD CIRCUIT
1.5 V
1.5 V
0V
tPZL
3V
Input
1.5 V
1.5 V
0V
tPLH
1.5 V
tPLZ
3.5 V
1.5 V
1.5 V
VOL
Output
Waveform 2
S1 at Open
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOL + 0.3 V
VOL
tPHZ
tPZH
tPHL
VOH
Output
Output
Waveform 1
S1 at 7 V
(see Note B)
1.5 V
VOH
VOH − 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. t PZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 2. Load Circuit and Voltage Waveforms
6
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8 Detailed Description
8.1 Overview
The SN74CBT3251 device is a single 8-channel multiplexer with three binary control inputs, S0, S1, and S2 and
an OE (output enable, active low) input. The three binary signals select 1 of 8 channels to be turned on, and
connect one of the 8 inputs to the output.
When they are used as demultiplexers, the CHANNEL IN/OUT terminals (B) are the outputs and the COMMON
OUT/IN terminal (A) is the input.
8.2 Functional Block Diagram
4
5
A
B1
3
B2
2
B3
1
B4
15
B5
14
B6
13
B7
12
B8
7
OE
11
S0
10
S1
9
S2
Figure 3. Logic Diagram (Positive Logic)
8.3 Feature Description
The SN74CBT3251 1-of-8 FET multiplexers and demultiplexers can accept a wide range of analog signal levels
from 0 V to 5 V. It has low Ron resistance, typically 5-Ω for VCC = 5 V which allows very little signal loss through
the switch. Binary address decoding on chip makes channel selection easy.
8.4 Device Functional Modes
Table 1 lists the functional modes of the SN74CBT3251.
Table 1. Function Table (Each Multiplexer and Demultiplexer)
INPUTS
S0
FUNCTION
OE
S2
S1
L
L
L
L
A port = B1 port
L
L
L
H
A port = B2 port
L
L
H
L
A port = B3 port
L
L
H
H
A port = B4 port
L
H
L
L
A port = B5 port
L
H
L
H
A port = B6 port
L
H
H
L
A port = B7 port
L
H
H
H
A port = B8 port
H
X
X
X
Disconnect
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The SN74CBT351 device can be used for a wide variety of applications, including expanding MCU GPIOs.
9.2 Typical Application
One application of the SN74CBT3251 device is to use in conjunction with a microcontroller to poll a keypad.
Figure 4 shows the basic schematic for such a polling system. The microcontroller uses the channel-select pins
to cycle through the different channels while reading the input to see if a user is pressing any of the keys. This is
a very robust setup that allows for simultaneous key presses with very little power consumption. It also uses very
few pins on the microcontroller. The down side of polling is that the microcontroller must frequently scan the keys
for a press.
Figure 4. Keypad Polling Application
9.2.1 Design Requirements
These devices use CMOS technology and have balanced output drive. Take care to avoid bus contention
because it can drive currents that would exceed maximum limits.
9.2.2 Detailed Design Procedure
1. Recommended input conditions:
– For switch time specifications, see propagation delay times in Recommended Operating Conditions.
– Inputs must not be pulled below ground.
– For input voltage level specifications for control inputs, see VIH and VIL in Recommended Operating
Conditions.
8
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Typical Application (continued)
2. Input and output current consideration:
– Load currents must not exceed per output and must not exceed (Continuous current through VCC or
GND) total current for the part. These limits are located in Absolute Maximum Ratings.
9.2.3 Application Curve
100
TA | Ambient Tempperature (Cƒ)
80
60
40
20
0
-20
-40
rON over temp
-60
0
1
2
3
4
5
6
7
8
rON | On-state resistance ( )
C001
Figure 5. rON Over Temperature
10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in
Recommended Operating Conditions.
Each VCC pin should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, a 0.1-μF capacitor is recommended and if there are multiple VCC pins then a 0.01-μF or 0.022-μF
capacitor is recommended for each power pin. It is ok to parallel multiple bypass caps to reject different
frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor should be
installed as close to the power pin as possible for best results.
11 Layout
11.1 Layout Guidelines
When using multiple bit logic devices inputs must not ever float. In many cases, functions or parts of functions of
digital logic devices are unused; for example, when only two inputs of a triple-input AND gate are used or only 3
of the 4 buffer gates are used. Such input pins must not be left unconnected because the undefined voltages at
the outside connections result in undefined operational states. Specified below are the rules that must be
observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low
bias to prevent them from floating. The logic level that should be applied to any particular unused input depends
on the function of the device. Generally they will be tied to GND or VCC whichever make more sense or is more
convenient.
11.2 Layout Example
VCC
Unused Input
Input
Output
Unused Input
Output
Input
Figure 6. Layout Diagram
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12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation, see the following:
Implications of Slow or Floating CMOS Inputs, SCBA004
12.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser based versions of this data sheet, refer to the left hand navigation.
10
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PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN74CBT3251D
ACTIVE
SOIC
D
16
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CBT3251
Samples
SN74CBT3251DBQR
ACTIVE
SSOP
DBQ
16
2500
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CU251
Samples
SN74CBT3251DBR
ACTIVE
SSOP
DB
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CU251
Samples
SN74CBT3251DR
ACTIVE
SOIC
D
16
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CBT3251
Samples
SN74CBT3251PW
ACTIVE
TSSOP
PW
16
90
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CU251
Samples
SN74CBT3251PWR
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CU251
Samples
SN74CBT3251RGYR
ACTIVE
VQFN
RGY
16
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CU251
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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