SN74CBTLV3245A
LOW-VOLTAGE OCTAL FET BUS SWITCH
www.ti.com
SCDS034M – JULY 1997 – REVISED AUGUST 2005
FEATURES
DBQ, DGV, DW, OR PW PACKAGE
(TOP VIEW)
NC
A1
A2
A3
A4
A5
A6
A7
A8
GND
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
RGY PACKAGE
(TOP VIEW)
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
A1
A2
A3
A4
A5
A6
A7
A8
VCC
•
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
1
20
3
4
19 OE
18 B1
17 B2
5
6
16 B3
15 B4
7
8
14 B5
13 B6
2
12 B7
9
NC - No internal connection
10
11
B8
•
NC
Standard '245-Type Pinout
5-Ω Switch Connection Between Two Ports
Rail-to-Rail Switching on Data I/O Ports
Ioff Supports Partial-Power-Down Mode
Operation
GND
•
•
•
•
NC - No internal connection
DESCRIPTION/ORDERING INFORMATION
The SN74CBTLV3245A provides eight bits of high-speed bus switching in a standard '245 device pinout. The low
on-state resistance of the switch allows connections to be made with minimal propagation delay.
The device is organized as one 8-bit switch. When output enable (OE) is low, the 8-bit bus switch is on, and port
A is connected to port B. When OE is high, the switch is open, and the high-impedance state exists between the
two ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging
current will not backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
PACKAGE (1)
TA
QFN – RGY
(1)
TOP-SIDE MARKING
Tape and reel
SN74CBTLV3245ARGYR
Tube
SN74CBTLV3245ADW
Tape and reel
SN74CBTLV3245ADWR
SSOP (QSOP) – DBQ
Tape and reel
SN74CBTLV3245ADBQR
CBTLV3245A
TSSOP – PW
Tape and reel
SN74CBTLV3245APWR
CL245A
TVSOP – DGV
Tape and reel
SN74CBTLV3245ADGVR
CL245A
VFBGA – GQN
Tape and reel
SN74CBTLV3245AGQNR
CL245A
VFBGA – ZQN
Tape and reel
SN74CBTLV3245AZQNR
CL245A
SOIC – DW
–40°C to 85°C
ORDERABLE PART NUMBER
CL245A
CBTLV3245A
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2005, Texas Instruments Incorporated
SN74CBTLV3245A
LOW-VOLTAGE OCTAL FET BUS SWITCH
www.ti.com
SCDS034M – JULY 1997 – REVISED AUGUST 2005
GQN OR ZQN PACKAGE
(TOP VIEW)
1 2 3 4
A
B
C
D
E
TERMINAL ASSIGNMENTS (1)
(1)
1
2
3
4
A
A1
NC
VCC
OE
B
A3
B2
A2
B1
C
A5
A4
B4
B3
D
A7
B6
A6
B5
E
GND
A8
B8
B7
NC - No internal connection
FUNCTION TABLE
INPUT
OE
FUNCTION
L
A port = B port
H
Disconnect
LOGIC DIAGRAM (POSITIVE LOGIC)
2
A1
18
B1
SW
9
A8
11
B8
SW
19
OE
SIMPLIFIED SCHEMATIC, EACH FET SWITCH
2
A1
18
9
A8
2
11
SW
19
OE
B1
SW
B8
SN74CBTLV3245A
LOW-VOLTAGE OCTAL FET BUS SWITCH
www.ti.com
SCDS034M – JULY 1997 – REVISED AUGUST 2005
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCC
Supply voltage range
–0.5
4.6
V
VI
Input voltage range (2)
–0.5
4.6
V
128
mA
–50
mA
Continuous channel current
IIK
θJA
Input clamp current
Package thermal impedance
VI/O < 0
DBQ package (3)
68
DGV package (3)
92
DW package (3)
58
PW package (3)
83
RGY package (4)
Tstg
(1)
(2)
(3)
(4)
UNIT
°C/W
37
Storage temperature range
–65
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
The package thermal impedance is calculated in accordance with JESD 51-7.
The package thermal impedance is calculated in accordance with JESD 51-5.
Recommended Operating Conditions (1)
VCC
Supply voltage
VIH
High-level control input voltage
VIL
Low-level control input voltage
TA
Operating free-air temperature
(1)
MIN
MAX
2.3
3.6
VCC = 2.3 V to 2.7 V
1.7
VCC = 2.7 V to 3.6 V
2
V
V
VCC = 2.3 V to 2.7 V
0.7
VCC = 2.7 V to 3.6 V
0.8
–40
UNIT
85
V
°C
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
SN74CBTLV3245A
LOW-VOLTAGE OCTAL FET BUS SWITCH
www.ti.com
SCDS034M – JULY 1997 – REVISED AUGUST 2005
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
Control inputs
VIK
MIN TYP (1)
TEST CONDITIONS
–1.2
VCC = 3 V,
II = –18 mA
II
VCC = 3.6 V,
VI = VCC or GND
Ioff
VCC = 0,
VI or VO = 0 to 3.6 V
ICC
VCC = 3.6 V,
IO = 0,
VI = VCC or GND
Control inputs
VCC = 3.6 V,
One input at 3 V,
Other inputs at VCC or GND
Control inputs
VI = 3 V or 0
Data inputs
∆ICC
(2)
Ci
Cio(OFF)
VO = 3 V or 0,
OE = VCC
VCC = 2.3 V,
TYP at VCC = 2.5 V
VI = 0
VI = 1.7 V,
ron (3)
VI = 0
VCC = 3 V
VI = 2.4 V,
(1)
(2)
(3)
MAX
–0.8
UNIT
V
±60
µA
40
µA
20
µA
300
µA
4
pF
9
pF
IO = 64 mA
5
IO = 24 mA
5
8
8
IO = 15 mA
27
40
IO = 64 mA
5
7
IO = 24 mA
5
7
IO = 15 mA
10
15
Ω
All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C.
This is the increase in supply current for each input that is at the specified voltage level, rather than VCC or GND.
Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is
determined by the lower of the voltages of the two (A or B) terminals.
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
(1)
4
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
FROM
(INPUT)
TO
(OUTPUT)
tpd (1)
A or B
B or A
0.25
ns
ten
OE
A or B
1
6
1
4.7
ns
tdis
OE
A or B
1
6.1
1
6.4
ns
PARAMETER
MIN
MAX
MIN
0.15
UNIT
MAX
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load
capacitance, when driven by an ideal voltage source (zero output impedance).
SN74CBTLV3245A
LOW-VOLTAGE OCTAL FET BUS SWITCH
www.ti.com
SCDS034M – JULY 1997 – REVISED AUGUST 2005
PARAMETER MEASUREMENT INFORMATION
2 × VCC
S1
RL
From Output
Under Test
Open
GND
CL
(see Note A)
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCC
GND
RL
LOAD CIRCUIT
VCC
CL
RL
V∆
2.5 V ±0.2 V
3.3 V ±0.3 V
30 pF
50 pF
500 Ω
500 Ω
0.15 V
0.3 V
VCC
Timing Input
VCC/2
0V
tw
tsu
VCC
VCC/2
Input
VCC/2
th
VCC
VCC/2
Data Input
VCC/2
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VCC
VCC/2
Input
VCC/2
0V
tPHL
tPLH
VOH
VCC/2
Output
VCC/2
VOL
tPHL
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
tPLH
VOH
Output
VCC/2
VCC/2
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VCC
Output
Control
Output
Waveform 2
S1 at GND
(see Note B)
VCC/2
VCC/2
0V
tPZL
tPLZ
VCC
VCC/2
tPZH
VOL + V∆
VOL
tPHZ
VCC/2
VOH − V∆
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
5
PACKAGE OPTION ADDENDUM
www.ti.com
17-Nov-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
74CBTLV3245ADWG4
ACTIVE
SOIC
DW
20
25
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CBTLV3245A
Samples
74CBTLV3245APWRG4
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CL245A
Samples
SN74CBTLV3245ADBQR
ACTIVE
SSOP
DBQ
20
2500
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CBTLV3245A
Samples
SN74CBTLV3245ADGVR
ACTIVE
TVSOP
DGV
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CL245A
Samples
SN74CBTLV3245ADW
ACTIVE
SOIC
DW
20
25
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CBTLV3245A
Samples
SN74CBTLV3245ADWE4
ACTIVE
SOIC
DW
20
25
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CBTLV3245A
Samples
SN74CBTLV3245ADWR
ACTIVE
SOIC
DW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CBTLV3245A
Samples
SN74CBTLV3245APW
ACTIVE
TSSOP
PW
20
70
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CL245A
Samples
SN74CBTLV3245APWR
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 85
CL245A
Samples
SN74CBTLV3245ARGYR
ACTIVE
VQFN
RGY
20
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CL245A
Samples
SN74CBTLV3245AZQNR
OBSOLETE
BGA
MICROSTAR
JUNIOR
ZQN
20
TBD
Call TI
Call TI
CL245A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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