SCDS029I − JANUARY 1996 − REVISED JANUARY 2004
D 5-Ω Switch Connection Between Two Ports
D TTL-Compatible Input Levels
D OR PW PACKAGE
(TOP VIEW)
1OE
1A
1B
GND
description/ordering information
The SN74CBTS3306 features independent line
switches with Schottky diodes on the I/Os to
clamp undershoot. Each switch is disabled when
the associated output-enable (OE) input is high.
1
8
2
7
3
6
4
5
VCC
2OE
2B
2A
ORDERING INFORMATION
ORDERABLE
PART NUMBER
PACKAGE†
TA
SOIC − D
−40°C to 85°C
TSSOP − PW
TOP-SIDE
MARKING
Tube
SN74CBTS3306D
Tape and reel
SN74CBTS3306DR
Tube
SN74CBTS3306PW
Tape and reel
SN74CBTS3306PWR
CR306
CR306
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each bus switch)
INPUT
OE
FUNCTION
L
A port = B port
H
Disconnect
logic diagram (positive logic)
2
3
1B
1A
1
1OE
5
6
2B
2A
7
2OE
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2004, Texas Instruments Incorporated
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POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCDS029I − JANUARY 1996 − REVISED JANUARY 2004
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN
MAX
5.5
VCC
VIH
Supply voltage
4
High-level control input voltage
2
VIL
TA
Low-level control input voltage
Operating free-air temperature
−40
UNIT
V
V
0.8
V
85
°C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP‡
A or B inputs
VIK
MAX
Control inputs
VCC = 4.5 V,
II = −18 mA
−1.2
IIL
IIH
VCC = 5.5 V,
VCC = 5.5 V,
VI = GND
VI = 5.5 V
150
ICC
∆ICC§
Control inputs
VCC = 5.5 V,
VCC = 5.5 V,
IO = 0,
One input at 3.4 V,
Ci
Control inputs
II
Cio(OFF)
UNIT
−0.7
VI = 3 V or 0
VO = 3 V or 0,
VCC = 4 V,
TYP at VCC = 4 V
ron¶
VCC = 4.5 V
−1
VI = VCC or GND
Other inputs at VCC or GND
OE = VCC
V
µA
A
3
µA
2.5
mA
5
pF
6
pF
VI = 2.4 V,
II = 15 mA
14
20
II = 64 mA
II = 30 mA
5
7
VI = 0
5
7
Ω
VI = 2.4 V,
II = 15 mA
10
15
‡ All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
§ This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
¶ Measured by the voltage drop between the A and B pin at the indicated current through the switch. On-state resistance is determined by the lower
of the voltages of the two (A or B) pins.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCDS029I − JANUARY 1996 − REVISED JANUARY 2004
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
VCC = 4 V
VCC = 5 V
± 0.5 V
MIN
MIN
FROM
(INPUT)
TO
(OUTPUT)
tpd†
A or B
B or A
0.35
ten
OE
A or B
5.6
PARAMETER
MAX
UNIT
MAX
1.8
0.25
ns
5
ns
tdis
A or B
4.6
1
4.3
ns
OE
† The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
PARAMETER MEASUREMENT INFORMATION
TEST
tpd
tPLZ/tPZL
tPHZ/tPZH
7V
S1
500 Ω
From Output
Under Test
Open
GND
CL = 50 pF
(see Note A)
500 Ω
3V
Output
Control
LOAD CIRCUIT
1.5 V
3V
1.5 V
1.5 V
0V
tPLH
tPHL
VOH
Output
1.5 V
1.5 V
VOL
1.5 V
0V
tPLZ
tPZL
Input
S1
Open
7V
0pen
Output
Waveform 1
S1 at 7 V
(see Note B)
3.5 V
1.5 V
tPHZ
tPZH
Output
Waveform 2
S1 at Open
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOL + 0.3 V
VOL
1.5 V
VOH
VOH − 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPHL and tPLH are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
PACKAGE OPTION ADDENDUM
www.ti.com
18-Aug-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN74CBTS3306D
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CR306
Samples
SN74CBTS3306DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CR306
Samples
SN74CBTS3306PW
ACTIVE
TSSOP
PW
8
150
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CR306
Samples
SN74CBTS3306PWR
ACTIVE
TSSOP
PW
8
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CR306
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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