SN74F112
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP
WITH CLEAR AND PRESET
SDFS048A – D2932, MARCH 1987 – REVISED OCTOBER 1993
•
D OR N PACKAGE
(TOP VIEW)
Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
1CLK
1K
1J
1PRE
1Q
1Q
2Q
GND
description
The SN74F112 contains two independent J-K
negative-edge-triggered flip-flops. A low level at
the preset (PRE) or clear (CLR) inputs sets or
resets the outputs regardless of the levels of the
other inputs. When PRE and CLR are inactive
(high), data at the J and K inputs meeting the setup
time requirements is transferred to the outputs on
the negative-going edge of the clock pulse. Clock
triggering occurs at a voltage level and is not
directly related to the rise time of the clock pulse.
Following the hold-time interval, data at the J and
K inputs may be changed without affecting the
levels at the outputs. The SN74F112 can perform
as a toggle flip-flop by tying J and K high.
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
1CLR
2CLR
2CLK
2K
2J
2PRE
2Q
The SN74F112 is characterized for operation from
0°C to 70°C.
FUNCTION TABLE
INPUTS
OUTPUTS
PRE
CLR
CLK
J
K
Q
L
H
X
X
X
H
Q
L
H
L
X
X
X
H
H†
Q0
L
L
X
X
X
L
H†
H
H
↓
L
L
Q0
H
H
↓
H
L
H
L
H
H
↓
L
H
L
H
H
H
↓
H
H
Toggle
H
H
H
X
X
Q0
Q0
† The output levels in this configuration are not guaranteed to
meet the minimum levels for VOH. Furthermore, this
configuration is nonstable; that is, it will not persist when
either PRE or CLR returns to its inactive (high) level.
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
2–1
SN74F112
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP
WITH CLEAR AND PRESET
SDFS048A – D2932, MARCH 1987 – REVISED OCTOBER 1993
logic symbol†
1PRE
1J
1CLK
1K
1CLR
2PRE
2J
2CLK
2K
2CLR
4
3
S
5
1J
1
2
15
1Q
C1
6
1K
1Q
R
10
9
11
2Q
13
12
7
2Q
14
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram, each flip-flop (positive logic)
Q
Q
PRE
CLR
J
K
CLK
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 1.2 V to 7 V
Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 mA to 5 mA
Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.
2–2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74F112
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP
WITH CLEAR AND PRESET
SDFS048A – D2932, MARCH 1987 – REVISED OCTOBER 1993
recommended operating conditions
VCC
VIH
Supply voltage
VIL
IIK
Low-level input voltage
IOH
IOL
High-level output current
Low-level output current
TA
Operating free-air temperature
MIN
NOM
MAX
4.5
5
5.5
High-level input voltage
2
UNIT
V
V
Input clamp current
0
0.8
V
– 18
mA
–1
mA
20
mA
70
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VOL
II
IIH
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V,
II = – 18 mA
IOH = – 1 mA
VCC = 4.75 V,
VCC = 4.5 V,
IOH = – 1 mA
IOL = 20 mA
VCC = 5.5 V,
VCC = 5.5 V,
VI = 7 V
VI = 2.7 V
MIN
2.5
TYP†
PRE or CLR
UNIT
– 1.2
V
3.4
V
2.7
0.3
J or K
IIL
MAX
0.5
V
0.1
mA
20
µA
– 0.6
VCC = 5.5 V,
VI = 0.5 V
–3
CLK
mA
– 2.4
IOS‡
VCC = 5.5 V,
VO = 0
– 60
–150
mA
ICC
VCC = 5.5 V,
See Note 2
12
19
mA
† All typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
NOTE 2: ICC is measured with all outputs open, the Q and Q outputs alternately high and the clock input grounded at the time of measurement.
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
VCC = 5 V,
TA = 25°C
fclock
Clock frequency
tw
Pulse duration
tsu
Setup time,
time data before CLK↓
th
Hold time
time, data after CLK↓
tsu
Setup time, inactive state, data before CLK↓§
§ Inactive-state state setup time is also referred to as recovery time.
POST OFFICE BOX 655303
MIN
MAX
0
110
MIN
MAX
UNIT
0
100
MHz
CLK high or low
4.5
5
CLR or PRE low
4.5
5
High
4
5
Low
3
3.5
High
0
0
Low
0
0
CLR or PRE high
4
5
• DALLAS, TEXAS 75265
ns
ns
ns
ns
2–3
SN74F112
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP
WITH CLEAR AND PRESET
SDFS048A – D2932, MARCH 1987 – REVISED OCTOBER 1993
switching characteristics (see Note 3)
PARAMETER
fmax
tPLH
tPHL
tPLH
FROM
(INPUT)
CLK
TO
(OUTPUT)
Q or Q
VCC = 5 V,
CL = 50 pF,
RL = 500 Ω,
TA = 25°C
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500 Ω,
TA = MIN to MAX†
MIN
TYP
110
130
MAX
MIN
1.2
4.6
6.5
1.2
7.5
1.2
4.6
6.5
1.2
7.5
2–4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MAX
100
1.2
4.1
6.5
1.2
PRE or CLR
Q or Q
tPHL
1.2
4.1
6.5
1.2
† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 3: Load circuits and waveforms are shown in Section 1.
UNIT
MHz
7.5
7.5
ns
ns
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN74F112D
ACTIVE
SOIC
D
16
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
F112
Samples
SN74F112DR
ACTIVE
SOIC
D
16
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
F112
Samples
SN74F112N
ACTIVE
PDIP
N
16
25
RoHS & Green
NIPDAU
N / A for Pkg Type
0 to 70
SN74F112N
Samples
SN74F112NE4
ACTIVE
PDIP
N
16
25
RoHS & Green
NIPDAU
N / A for Pkg Type
0 to 70
SN74F112N
Samples
SN74F112NSR
ACTIVE
SO
NS
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
74F112
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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