SN74F657DWRE4

SN74F657 OCTAL TRANSCEIVER WITH PARITY GENERATOR/CHECKER AND 3-STATE OUTPUTS SDFS027A – D3217, JANUARY 1989 – REVISED OCTOBER 1993 • • • • • • Combines ′F245 and ′F280B Functions in One Package High-Impedance N-P-N Inputs for Reduced Loading (70 µA in Low and High States) High Output Drive and Light Bus Loading 3-State B Outputs Sink 64 mA and Source 15 mA Input Diodes for Termination Effects Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs description DW OR NT PACKAGE (TOP VIEW) T/R A1 A2 A3 A4 A5 VCC A6 A7 A8 ODD/EVEN ERR 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 OE B1 B2 B3 B4 GND GND B5 B6 B7 B8 PARITY The SN74F657 contains eight noninverting buffers with 3-state outputs and an 8-bit parity generator/checker. It is intended for bus-oriented applications. The buffers have a specified current sinking capability of 24 mA at the A port and 64 mA at the B port. The transmit/receive (T/R) input determines the direction of the data flow through the bidirectional transceivers. When T/R is high, data is transmitted from the A port to the B port. When T/R is low, data is received at the A port from the B port. When the output enable (OE) input is high, both the A and B ports are placed in a high-impedance state (disabled). The ODD/EVEN input allows the user to select between odd or even parity systems. When transmitting from A port to B port (T/R high), PARITY is an output from the generator/checker. When receiving from B port to A port (T/R low), PARITY is an input. When transmitting (T/R high), the parity select (ODD/EVEN) input is made high or low as appropriate. The A port is then polled to determine the number of high bits.The PARITY output goes to the logic state determined by ODD/EVEN and the number of high bits on A port. When ODD/EVEN is low (for even parity) and the number of high bits on A port is odd, the PARITY will be high, transmitting even parity. If the number of high bits on A port is even, the PARITY will be low, keeping even parity. When in the receive mode (T/R low), the B port is polled to determine the number of high bits. If ODD/EVEN is low (for even parity) and the number of highs on B port is: 1. Odd and the PARITY input is high, then ERR will be high signifying no error. 2. Even and the PARITY input is high, then ERR will be low indicating an error. The SN74F657 is characterized for operation from 0°C to 70°C. Copyright  1993, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–1 SN74F657 OCTAL TRANSCEIVER WITH PARITY GENERATOR/CHECKER AND 3-STATE OUTPUTS SDFS027A – D3217, JANUARY 1989 – REVISED OCTOBER 1993 FUNCTION TABLE NUMBER OF A OR B INPUTS THAT ARE HIGH 0 2, 0, 2 4, 4 6, 6 8 1 3 1, 3, 5 5, 7 Don’t care INPUTS OUTPUTS OE T/R ODD/EVEN INPUT/OUTPUT PARITY ERR OUTPUT MODE L H H H Z Transmit L H L L Z Transmit L L H H H Receive L L H L L Receive L L L H L Receive L L L L H Receive L H H L Z Transmit L H L H Z Transmit L L H H L Receive L L H L H Receive L L L H H Receive L L L L L Receive H X X Z Z Z logic symbol† OE T/R ODD/EVEN A1 A2 A3 A4 A5 A6 A7 A8 24 1 11 2 3 G3 3 EN1/3G5 [REC] 3 EN2 [XMIT] N4 1 23 1 2 Z11 22 4 21 5 20 6 17 8 16 9 15 10 14 11 12 13 14 15 16 17 18 2k 13 4, 2 POST OFFICE BOX 655303 B2 B3 B4 B5 B6 B7 B8 PARITY 5 4, 1 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 2–2 B1 • DALLAS, TEXAS 75265 12 ERR SN74F657 OCTAL TRANSCEIVER WITH PARITY GENERATOR/CHECKER AND 3-STATE OUTPUTS SDFS027A – D3217, JANUARY 1989 – REVISED OCTOBER 1993 logic diagram (positive logic) T/R 1 OE A1 24 2 23 3 22 4 21 5 20 6 17 8 16 9 15 10 14 A2 A3 A4 A5 A6 A7 A8 ODD/EVEN B1 B2 B3 B4 B5 B6 B7 B8 13 11 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARITY ERR 2–3 SN74F657 OCTAL TRANSCEIVER WITH PARITY GENERATOR/CHECKER AND 3-STATE OUTPUTS SDFS027A – D3217, JANUARY 1989 – REVISED OCTOBER 1993 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Input voltage range, VI (excluding I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 1.2 V to 7 V Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 mA to 5 mA Voltage range applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . . . – 0.5 V to 5.5 V Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC Current into any output in the low state: A1– A8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 mA B1– B8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input-voltage ratings may be exceeded provided the input-current ratings are observed. recommended operating conditions VCC VIH Supply voltage VIL Low-level input voltage High-level input voltage IOH High level output current High-level IOL Low level output current Low-level TA Operating free-air temperature 2–4 MIN NOM MAX 4.5 5 5.5 2 –3 B1 – B8, PARITY, ERR – 12 A1 – A8 24 B1 – B8, PARITY, ERR 64 0 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V V 0.8 A1 – A8 UNIT 70 V mA mA °C SN74F657 OCTAL TRANSCEIVER WITH PARITY GENERATOR/CHECKER AND 3-STATE OUTPUTS SDFS027A – D3217, JANUARY 1989 – REVISED OCTOBER 1993 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK Any output VOH B1 – B8, PARITY, ERR Any output TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V, II = – 18 mA IOH = – 3 mA VCC = 4.5 V, VCC = 4.75 V, IOH = – 15 mA IOH = – 1 mA to – 3 mA A1 – A8 VOL B1 – B8, PARITY, ERR T/R II 45V VCC = 4.5 OE VCC = 0, VCC = 0, ODD/EVEN VCC = 0, A1 – A8 B1 – B8 MIN TYP† 2.4 3.3 2 3.1 T/R, OE 0.35 0.5 0.42 0.55 VI = 7 V, VI = 7 V 5V VCC = 5 5.5 V, VI = 7 V VCC = 5.5 V, VI = 2.7 V OE = 4.5 V 0.1 T/R = 4.5 V 0.1 0.1 A1 – A8 B1 – B8 IOZL ICCH ERR ERR V mA 2 1 70 40 µA 20 – 70 VCC = 5.5 V, VI = 0.5 V – 40 ODD/EVEN IOS§ IOZH V IOL = 64 mA VI = 7 V, A, B, PARITY T/R, OE V 2.7 ODD/EVEN IIL‡ UNIT – 1.2 IOL = 24 mA A, B, PARITY IIH‡ MAX µA – 20 VCC = 5 5.5 5V V, VO = 0 VCC = 5.5 V, VCC = 5.5 V, VI = 2.7 V VI = 0.5 V – 60 – 150 – 100 – 225 VCC = 5.5 V 90 ICCL VCC = 5.5 V 106 ICCZ VCC = 5.5 V 98 † All typical values are at VCC = 5 V, TA = 25°C. ‡ For I/O ports, the parameters IIH and IIL include the off-state output current. § Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 mA 50 µA – 50 µA 125 mA 150 mA 145 mA 2–5 SN74F657 OCTAL TRANSCEIVER WITH PARITY GENERATOR/CHECKER AND 3-STATE OUTPUTS SDFS027A – D3217, JANUARY 1989 – REVISED OCTOBER 1993 switching characteristics (see Note 2) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A or B B or A tPLH tPHL A PARITY tPLH tPHL ODD/EVEN PARITY ERR PARITY, tPLH tPHL B ERR tPLH tPHL PARITY ERR tPZH tPZL OE A B A, B, PARITY PARITY, or ERR‡ tPHZ tPLZ OE A B A, B, PARITY PARITY, or ERR‡ VCC = 5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = 25°C VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX † MIN TYP MAX MIN MAX 2.5 4.2 7.5 2.5 8 3 4 7.5 3 8 6 8.4 14 6 16 6.8 8.5 15 6.8 16 4 6.4 11 4 12 4.5 6.9 11.5 4.5 12.5 8 12.7 20.5 7.5 22.5 8 13.4 20.5 7.5 22.5 6 8.1 15.5 6 16.5 7.5 8.8 15.5 7.5 17 3 5.3 8 3 9 4 5.4 9.5 4 11 2 4.2 7.5 2 8 2 3.7 6 2 6.5 UNIT ns ns ns ns ns ns ns † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ‡ These delay times reflect the 3-state recovery time only and not the signal through the buffers or parity check circuitry. To assure valid information at the ERR output pin, time must be allowed for the signal to propagate through the drivers (B to A), and to the ERR output. Valid data at the ERR output is greater than or equal to (B to A) + (A to PARITY). NOTE 2: Load circuits and waveforms are shown in Section 1. 2–6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74F657DW ACTIVE SOIC DW 24 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 F657 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of