SCBS178O − AUGUST 1992 − REVISED MARCH 2004
D Compatible With IEEE Std 1194.1-1991
D
D
D
D High-Impedance State During Power Up
(BTL)
TTL A Port, Backplane Transceiver Logic
(BTL) B Port
Open-Collector B-Port Outputs Sink
100 mA
BIAS VCC Minimizes Signal Distortion
During Live Insertion or Withdrawal
D
D
and Power Down
B-Port Biasing Network Preconditions the
Connector and PC Trace to the BTL
High-Level Voltage
TTL-Input Structures Incorporate Active
Clamping to Aid in Line Termination
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
1B2
GND
1B3
1B4
GND
1B5
1B6
GND
1B7
1B8
GND
1B9
NC
2B1
GND
2B2
2B3
GND
2B4
2B5
GND
2B6
2B7
GND
2B8
2AO5
2AI5
2AO6
2AI6
GND
2AO7
2AI7
2AO8
2AI8
GND
2AO9
2AI9
VCC
2OEA
2OEA
2LEBA
2CLKBA
2CLKAB
2LEAB
2OEB
2OEB
BIAS VCC
NC
GND
2B9
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
NC
VCC
GND
1AO6
1AI6
1AO7
1AI7
GND
1AO8
1AI8
1AO9
1AI9
GND
2AO1
2AI1
2AO2
2AI2
GND
2AO3
2AI3
2AO4
2AI4
GND
VCC
NC
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
1AI5
1AO5
1AI4
1AO4
GND
1AI3
1AO3
1AI2
1AO2
GND
1AI1
1AO1
VCC
1OEA
1OEA
1LEBA
1CLKBA
1CLKAB
1LEAB
1OEB
1OEB
BG GND
BG VCC
GND
1B1
PCA PACKAGE
(TOP VIEW)
NC − No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2004, Texas Instruments Incorporated
!"# $ %& ' # "$ (&)*%"# +"#',
+&%#$ % ! # $('% %"# $ (' #-' #' !$ '."$
$# &!' #$
$#" +" + /" " #0, +&%# ( %'$$ 1 + '$ # '%'$$" *0 %*&+'
#'$# 1 "** (" "!'#' $,
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCBS178O − AUGUST 1992 − REVISED MARCH 2004
description/ordering information
The SN74FB1650 contains two 9-bit transceivers designed to translate signals between TTL and backplane
transceiver-logic (BTL) environments. The device is designed specifically to be compatible with
IEEE Std 1194.1-1991.
The B port operates at BTL-signal levels. The open-collector B ports are specified to sink 100 mA. Two output
enables (OEB and OEB) are provided for the B outputs. When OEB is low, OEB is high, or VCC is less than 2.1 V,
the B port is turned off.
The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B port when the
A-port output enable (OEA) is high. When OEA is low or when VCC is less than 2.1 V, the A outputs are in the
high-impedance state.
BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected.
BG VCC and BG GND are the supply inputs for the bias generator.
ORDERING INFORMATION
PACKAGE†
TA
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
0°C to 70°C
TQFP − PCA
Tube
SN74FB1650PCA
FB1650
† Package drawings, standard packing quantities, thermal data, symbolization, and
PCB design guidelines are available at www.ti.com/sc/package.
Function Tables
TRANSCEIVER
INPUTS
OEA
FUNCTION
OEA
OEB
OEB
X
X
H
L
A data to B bus
L
H
X
X
B data to A bus
A data to B bus, B data to A bus
L
H
H
L
X
X
L
X
X
X
X
H
H
X
X
X
X
L
X
X
B-bus isolation
A-bus isolation
STORAGE MODE
INPUTS
2
FUNCTION
LE
CLK
H
X
Transparent
L
↑
Store data
L
L
Storage
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• DALLAS, TEXAS 75265
SCBS178O − AUGUST 1992 − REVISED MARCH 2004
functional block diagram
81
1OEB
1OEB
1CLKAB
1LEAB
1LEBA
1CLKBA
1OEA
1OEA
80
83
82
85
84
87
86
90
1AI1
1D
C2
76
1B1
C1
89
1AO1
1D
C2
C1
To Eight Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC, BIAS VCC, BG VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI: Except B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −1.2 V to 7 V
B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −1.2 V to 3.5 V
Voltage range applied to any B output in the disabled or power-off state, VO . . . . . . . . . . . . . . −0.5 V to 3.5 V
Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC
Input clamp current, IIK: Except B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40 mA
B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −18 mA
Current applied to any single output in the low state, IO: A port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 mA
B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA
Package thermal impedance, θJA (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
POST OFFICE BOX 655303
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3
SCBS178O − AUGUST 1992 − REVISED MARCH 2004
recommended operating conditions (see Note 2)
VCC,
BG VCC,
BIAS VCC
Supply voltage
VIH
High-level input voltage
VIL
Low-level input voltage
IIK
IOH
Input clamp current
B port
Except B port
B port
IOL
MIN
NOM
MAX
4.5
5
5.5
1.62
Low-level output current
V
2.3
V
2
0.75
1.47
Except B port
High-level output current
UNIT
0.8
V
−18
mA
A port
−3
mA
A port
24
B port
100
mA
TA
Operating free-air temperature
0
70
°C
NOTE 2: To ensure proper device operation, all unused inputs must be terminated as follows: A and control inputs to VCC(5 V) or GND, and
B inputs to GND only. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range
PARAMETER
B port
0.75
B port
VCC = 4.5 V
IOL = 80 mA
IOL = 100 mA
Except B port
VCC = 5.5 V,
VCC = 5.5 V,
VI = 5.5 V
VI = 2.7 V
50
µA
50
µA
VCC = 5.5 V,
VCC = 5.5 V,
VI = 0.5 V
VI = 0.75 V
−50
VCC = 5.5 V,
VCC = 5.5 V,
VO = 2.7 V
VO = 0.5 V
VCC = 0 to 2.1 V,
VCC = 2.1 V to 0,
VO = 0.5 V to 2.7 V
VO = 0.5 V to 2.7 V
VCC = 0 to 5.5 V,
VCC = 5.5 V,
VO = 2.1 V
VO = 0
VCC = 5.5 V,
IO = 0
AO port
Except B port
Except B port
B port
IOZH
IOZL
AO port
IOZPU
IOZPD
AO port
IOH
IOS§
B port
AO port
AO port
A port
−1.2
−0.5
3.3
0.35
B port to A port
0.5
1.1
−100
−30
V
µA
A
50
µA
−50
µA
50
µA
−50
µA
100
µA
−150
mA
120
mA
5.5
Control inputs
VI = VCC or GND
5.5
AO ports
VO = VCC or GND
5.5
VCC = 0 to 5.5 V
Cio
B port per IEEE Std 1194.1-1991
† All typical values are at VCC = 5 V, TA = 25°C.
‡ For I/O ports, the parameters IIH and IIL include the off-state output current.
§ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
4
V
100
AI port
Co
V
1.15
A port to B port
Ci
UNIT
2.5
AO port
ICC
MAX
IOH = −3 mA
IOL = 24 mA
VOH
IIL‡
TYP†
VCC = 4.5 V,
VCC = 4.5 V,
Except B port
II
IIH‡
MIN
II = −18 mA
II = −40 mA
VIK
VOL
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V,
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
pF
pF
5.5
pF
SCBS178O − AUGUST 1992 − REVISED MARCH 2004
live-insertion specifications over recommended operating free-air temperature range
PARAMETER
ICC (BIAS VCC)
TEST CONDITIONS
VCC = 0 to 4.5 V
VCC = 4.5 V to 5.5 V
VB = 0 to 2 V,
MIN
MAX
450
VI (BIAS VCC) = 4.5 V to 5.5 V
VO
B port
VCC = 0,
VCC = 0 ,
VI (BIAS VCC) = 5 V
VB = 1 V,
IO
B port
VCC = 0 to 2.2 V,
VCC = 0 to 5.5 V,
OEB = 0 to 5 V
10
1.62
VI (BIAS VCC) = 4.5 V to 5.5 V
2.1
−1
100
OEB = 0 to 0.8 V
1
UNIT
A
µA
V
µA
A
mA
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
VCC = 5 V,
TA = 25°C
MIN
fclock
tw
Clock frequency
tsu
Setup time
th
Hold time
MIN
150
Pulse duration
POST OFFICE BOX 655303
CLK or LE
3.3
3.3
Data before LE
4.8
4.8
Data before CLK↑
4.9
4.9
Data after LE
1.8
1.8
Data after CLK↑
1.1
1.1
• DALLAS, TEXAS 75265
MAX
UNIT
150
MHz
MAX
ns
ns
ns
5
SCBS178O − AUGUST 1992 − REVISED MARCH 2004
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
PARAMETER
fmax
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
tPLZ
tsk(p)†
tsk(o)†
tt
Transition time
FROM
(INPUT)
TO
(OUTPUT)
MIN
TYP
MIN
AI
B
LEAB
B
CLKAB
B
B
AO
LEBA
AO
CLKBA
AO
OEB
B
OEB
B
OEA
AO
OEA
AO
OEA
AO
OEA
AO
MAX
150
MHz
1.8
3.7
5.3
1.8
6.2
2.9
4.4
6
2.9
7.2
2.7
4.2
5.8
2.7
6.4
3.5
5
6.5
3.5
7.3
2.3
3.9
5.5
2.3
6
2.9
4.5
6.1
2.9
6.7
3.5
5.9
7.9
3.5
8.6
2.2
3.7
5.3
2.2
5.7
1.8
3.2
4.6
1.8
5.1
1.7
3
4.4
1.7
4.7
1.8
3.1
4.6
1.8
5.1
1.7
3.1
4.6
1.7
4.9
2.7
4.6
6.4
2.7
6.7
2.9
4.1
5.9
2.9
6.6
2.6
4.3
6.2
2.6
6.6
3.4
4.6
6.4
3.4
7
1.4
2.9
4.4
1.4
4.9
1.4
2.6
4
1.4
4.6
1.7
3.4
5.1
1.7
5.8
2.2
3.6
5
2.2
5.5
1.7
3.3
4.7
1.7
5.5
1.7
3.1
4.4
1.7
5.1
1.5
2.9
4.5
1.5
5.1
2
3.1
4.6
2
4.8
Pulse skew, AI to B or B to AO
Output skew, AI to B or B to AO
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
0.9
1.7
3.1
0.5
4.6
0.5
2
3.6
0.4
4.2
• DALLAS, TEXAS 75265
ns
1
AO outputs (10% to 90%)
POST OFFICE BOX 655303
ns
0.5
B outputs (1.3 V to 1.8 V)
1
UNIT
MAX
150
t(pr)
B-port input pulse rejection
† Skew values are applicable for through mode only.
6
VCC = 5 V,
TA = 25°C
1
ns
ns
SCBS178O − AUGUST 1992 − REVISED MARCH 2004
PARAMETER MEASUREMENT INFORMATION
2.1 V
16.5 Ω
7V
500 Ω
From Output
Under Test
S1
Open
GND
CL = 50 pF
(see Note A)
Test
Point
From Output
Under Test
CL = 30 pF
(see Note A)
500 Ω
LOAD CIRCUIT FOR A OUTPUTS
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
7V
Open
LOAD CIRCUIT FOR B OUTPUTS
tw
3V
Input
1.5 V
1.5 V
3V
1.5 V
Timing Input
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
tsu
th
3V
3V
Input
1.5 V
1.5 V
Data Input
1.5 V
1.5 V
0V
0V
tPHL
tPLH
1.55 V
1.55 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOH
Output
VOL
3V
Output
Control
tPZL
2V
1.55 V
1.55 V
1V
tPHL
1.5 V
Output
Waveform 1
S1 at 7 V
(see Note B)
tPLZ
3.5 V
1.5 V
tPZH
tPLH
VOH
Output
1.5 V
0V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (A TO B)
Input
1.5 V
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (B TO A)
Output
Waveform 2
S1 at Open
(see Note B)
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH
VOH − 0.3 V
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES (A PORT)
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: TTL inputs: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns,
tf ≤ 2.5 ns; BTL inputs: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
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7
MECHANICAL DATA
MHTQ003A – JANUARY 1995 – REVISED DECEMBER 1996
PCA (S-PQFP-G100)
PLASTIC QUAD FLATPACK (DIE DOWN)
0,27
0,17
0,50
75
0,08 M
51
Heat Slug
76
50
100
26
1
0,13 NOM
25
12,00 TYP
Gage Plane
14,20
SQ
13,80
16,20
SQ
15,80
0,05 MIN
1,45
1,35
0,25
0°– 7°
0,75
0,45
Seating Plane
0,08
1,60 MAX
4040288 / B 10/96
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Thermally enhanced molded plastic package with a heat slug (HSL)
Falls within JEDEC MS-026
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