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SN74FB2040RCR

SN74FB2040RCR

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    QFP52_10X10MM

  • 描述:

    IC TXRX 8BIT TTL/BTL 52-QFP

  • 数据手册
  • 价格&库存
SN74FB2040RCR 数据手册
SN74FB2040 8-BIT TTL/BTL TRANSCEIVER SCBS173N – NOVEMBER 1991 – REVISED MARCH 2002 D D D D Compatible With IEEE Std 1194.1-1991 (BTL) TTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink 100 mA D D High-Impedance State During Power Up and Power Down BIAS VCC Pin Minimizes Signal Distortion During Live Insertion or Withdrawal B-Port Biasing Network Preconditions the Connector and PC Trace to the BTL High-Level Voltage TMS GND B1 AO2 AI1 AO1 VCC BIAS VCC OEA OEB OEB TCK VCC RC PACKAGE (TOP VIEW) 52 51 50 49 48 47 46 45 44 43 42 41 40 1 39 2 38 3 37 4 36 5 35 6 34 7 33 8 32 9 31 10 30 11 29 12 28 13 27 GND B2 GND B3 GND B4 GND B5 GND B6 GND B7 GND B8 AI8 GND BG GND AO8 TDO TDI VCC 14 15 16 17 18 19 20 21 22 23 24 25 26 AI6 GND AO7 BG VCC AI7 GND AI2 AI3 AO3 GND AO4 GND AI4 AI5 AO5 GND AO6 GND description The SN74FB2040 is an 8-bit transceiver designed to translate signals between TTL and backplane transceiver logic (BTL) environments. The B port operates at BTL-signal levels. The open-collector B ports are specified to sink 100 mA. Two output enables (OEB and OEB) are provided for the B outputs. When OEB is high and OEB is low, the B port is active and reflects the inverse of the data present at the A-input pins. When OEB is low, OEB is high, or VCC is less than 2.1 V, the B port is turned off. The A port operates at TTL-signal levels and has separate input and output pins. The A outputs reflect the inverse of the data at the B port when the A-port output enable (OEA) is high. When OEA is low or when VCC is less than 2.1 V, the A outputs are in the high-impedance state. The pins TMS, TCK, TDI, and TDO are nonfunctional, i.e., not intended for use with the IEEE Std 1149.1 (JTAG) test bus. TMS and TCK are not connected, and TDI is shorted to TDO. BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74FB2040 8-BIT TTL/BTL TRANSCEIVER SCBS173N – NOVEMBER 1991 – REVISED MARCH 2002 ORDERING INFORMATION ORDERABLE PART NUMBER PACKAGE† TA TOP-SIDE MARKING 0°C to 70°C QFP – RC Tube SN74FB2040RC FB2040 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE INPUTS OEB OEB OEA L X L X H L FUNCTION Isolation L X H X H H H L L AI data to B bus H L H AI data to B bus, B data to AO bus B data to AO bus functional block diagram OEB OEB OEA AI1 AO1 46 45 47 40 51 50 To Seven Other Channels 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 B1 SN74FB2040 8-BIT TTL/BTL TRANSCEIVER SCBS173N – NOVEMBER 1991 – REVISED MARCH 2002 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI: Except B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.2 V to 7 V B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.2 V to 3.5 V Voltage range applied to any B output in the disabled or power-off state, VO . . . . . . . . . . . . . . –0.5 V to 3.5 V Voltage range applied to any output in the high state, VO: A port . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC Input clamp current, IIK: Except B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40 mA B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA Current applied to any single output in the low state, IO: A port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 mA B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA Package thermal impedance, θJA (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 2) VCC, BIAS VCC, BG VCC Supply voltage VIH High level input voltage High-level VIL Low level input voltage Low-level IIK IOH Input clamp current IOL B port Except B port B port Except B port High-level output current Low level output current Low-level MIN NOM MAX 45 4.5 5 55 5.5 1.62 2.3 2 0.75 1.47 0.8 UNIT V V V –18 mA AO port –3 mA AO port 24 B port 100 mA TA Operating free-air temperature 0 70 °C NOTE 2: To ensure proper device operation, all unused inputs must be terminated as follows: A and control inputs to VCC(5 V) or GND, and B inputs to GND only. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN74FB2040 8-BIT TTL/BTL TRANSCEIVER SCBS173N – NOVEMBER 1991 – REVISED MARCH 2002 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER MIN VCC = 4.5 V, VCC = 4.5 V, II = –18 mA II = –40 mA VCC = 4.5 V, VCC = 4.5 V, IOH = –3 mA IOL = 24 mA 2.5 AO port VCC = 4 4.5 5V IOL = 80 mA IOL = 100 mA 0.75 B portt II Except B port VCC = 5.5 V, IIH‡ Except B port Except B port VCC = 5.5 V, VCC = 5.5 V, B port IOH IOZH B port IOZL IOZPU AO port IOZPD IOS§ VIK VOH VOL IIL‡ B port TEST CONDITIONS Except B port AO port TYP† MAX –1.2 –0.5 3.3 0.35 UNIT V V 0.5 1.1 V 1.15 VI = 5.5 V VI = 2.7 V 50 µA 50 µA –50 VCC = 5.5 V, VI = 0.5 V VI = 0.75 V VCC = 0 to 5.5 V, VCC = 5.5 V, VO = 2.1 V VO = 2.7 V 100 µA 50 µA VO = 0.5 V VO = 0.5 V to 2.7 V – 50 µA A port VCC = 5.5 V, VCC = 0 to 2.1 V, 50 µA A port VCC = 2.1 V to 0, – 50 µA AO port VCC = 5.5 V, VO = 0.5 V to 2.7 V VO = 0 –180 mA AO port –100 –30 µA A † All typical values are at VCC = 5 V, TA = 25°C. ‡ For I/O ports, the parameters IIH and IIL include the off-state output current. § Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (continued) PARAMETER ICC Ci Co Cio AI port to B port TEST CONDITIONS VCC = 5 5.5 5V V, B port to AO port AI port MIN IO = 0 AO port B portt per IEEE Std 1194.1-1991 1194 1 1991 MAX 40 pF 3 VO = VCC or GND VCC = 0 to 4.5 V 6 pF 5 5 VCC = 4.5 V to 5.5 V UNIT mA 70 3.5 VI = VCC or GND Control inputs TYP† pF † All typical values are at VCC = 5 V, TA = 25°C. live-insertion specifications over recommended operating free-air temperature range PARAMETER ICC (BIAS VCC) 4 TEST CONDITIONS VCC = 0 to 4.5 V, VCC = 4.5 to 5.5 V, VB = 0 to 2 V, VB = 0 to 2 V, MIN VI (BIAS VCC) = 4.5 V to 5.5 V VI (BIAS VCC) = 4.5 V to 5.5 V VO B port VCC = 0, VCC = 0, VI (BIAS VCC) = 5 V VB = 1 V, IO B port VCC = 0 to 5.5 V, VCC = 0 to 2.2 V, MAX 450 10 µA 2.1 V OEB = 0 to 0.8 V 100 µA OEB = 0 to 5 V 100 POST OFFICE BOX 655303 1.62 UNIT VI (BIAS VCC) = 4.5 V to 5.5 V • DALLAS, TEXAS 75265 –1 SN74FB2040 8-BIT TTL/BTL TRANSCEIVER SCBS173N – NOVEMBER 1991 – REVISED MARCH 2002 switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 1) FROM (INPUT) TO (OUTPUT) tPLH tPHL AI B tPLH tPHL B AO tPLH tPHL OEB B tPLH tPHL OEB B tPZH tPZL OEA AO tPHZ tPLZ OEA AO PARAMETER VCC = 5 V, TA = 25°C MIN MAX 6 2.4 6.5 4.2 5.6 2.7 5.8 2.3 3.8 5.7 1.9 6.2 2.3 4.2 5.9 2 8.2 3.7 5.1 6.7 3 7 3.1 4.6 5.9 3 6.1 3.6 5.2 6.8 3.3 7 2.9 4.4 5.9 2.6 6.1 2.5 4 5.5 2.1 5.8 2.1 3.6 4.8 2 5 2.3 4.1 5.9 1.9 6.5 1.6 3.1 4.5 1.4 4.7 MIN TYP MAX 3.2 4.5 2.8 UNIT ns ns ns ns ns ns tsk(p) tsk(o) Skew for any single channel tPHL – tPLH, AI to B or B to AO 0.5 Skew between drivers in the same package, AI to B or B to AO 0.4 tr tf Rise time, 1.3 V to 1.8 V, B port 2 2.8 3.8 1.7 Fall time, 1.8 V to 1.3 V, B port 1 1.9 3 1 4.2 ns t(pr) B-port input pulse rejection 1 3.4 ns POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ns ns ns 5 SN74FB2040 8-BIT TTL/BTL TRANSCEIVER SCBS173N – NOVEMBER 1991 – REVISED MARCH 2002 PARAMETER MEASUREMENT INFORMATION 2.1 V 16.5 Ω 7V S1 500 Ω From Output Under Test CL = 50 pF (see Note A) Open CL = 30 pF (see Note A) 500 Ω LOAD CIRCUIT FOR A OUTPUTS Input 1.5 V Test Point From Output Under Test LOAD CIRCUIT FOR B OUTPUTS 3V TEST S1 0V tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7V Open 1.5 V tPHL tPLH 1.55 V 1.55 V VOH Output VOL 3V Output Control tPZL 2V 1.55 V 1.55 V 1V tPHL 1.5 V Output Waveform 1 S1 at 7 V (see Note B) tPLZ 3.5 V 1.5 V tPZH tPLH VOH Output 1.5 V 0V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (A TO B) Input 1.5 V 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (B TO A) Output Waveform 2 S1 at Open (see Note B) VOL + 0.3 V VOL tPHZ 1.5 V VOH VOH – 0.3 V ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES (A PORT) NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: TTL inputs: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns; BTL inputs: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third–party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright  2002, Texas Instruments Incorporated
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