SN74GTL1655DGGR

SN74GTL1655DGGR

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    TSSOP64_17X6.1MM

  • 描述:

    SN74GTL1655DGGR

  • 数据手册
  • 价格&库存
SN74GTL1655DGGR 数据手册
www.ti.com SN74GTL1655 16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH LIVE INSERTION FEATURES • • • • • • • • • Member of the Texas Instruments Widebus™ Family UBT™ Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Modes OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference Translates Between GTL/GTL+ Signal Level and LVTTL Logic Levels High-Drive (100 mA), Low-Output-Impedance (12 Ω) Bus Transceiver (B Port) Edge-Rate-Control Input Configures the B-Port Output Rise and Fall Times Ioff, Power-Up 3-State, and BIAS VCC Support Live Insertion Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors on A Port Distributed VCC and GND Pins Minimize High-Speed Switching Noise DESCRIPTION/ORDERING INFORMATION The SN74GTL1655 is a high-drive (100 mA), low-output-impedance (12 Ω) 16-bit UBT™ transceiver that provides LVTTL-to-GTL/GTL+ and GTL/GTL+-to-LVTTL signal-level translation. This device is partitioned as two 8-bit transceivers and combines D-type flip-flops and D-type latches to allow for transparent, latched, and clocked modes of data transfer similar to the '16501 function. This device provides an interface between cards operating at LVTTL logic levels and a backplane operating at GTL/GTL+ signal levels. Higher-speed operation is a direct result of the reduced output swing ( VCC. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions (1) (2) (3) (4) BIAS VCC Supply voltage VTT Termination voltage VREF Reference voltage VI Input voltage MIN NOM MAX 3 3.3 3.6 GTL 1.14 1.2 1.26 GTL+ 1.35 1.5 1.65 GTL 0.74 0.8 0.87 GTL+ 0.87 1 1.1 B port 0 VTT Except B port 0 VCC B port VIH High-level input voltage VERC Except B port and ERC Low-level input voltage VCC – 0.6 Input clamp current IOH High-level output current VERC VCC GND 0.6 V mA A port –24 mA A port 24 B port 100 Power-up ramp rate 200 TA Operating free-air temperature –40 6 V –18 ∆t/∆VCC (3) (4) V 0.8 Low-level output current (2) V VREF – 50 mV IOL (1) V 2 Except B port and ERC IIK V VREF + 50 mV B port VIL UNIT mA µs/V 85 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Normal connection sequence is GND first, BIAS VCC = 3.3 V second, and VCC = 3.3 V, I/O, control inputs, VTT and VREF (any order) last. However, if the B-port I/O precharge is not required, the acceptable connection sequence is GND first and VCC = 3.3 V, BIAS VCC = 3.3 V, I/O, control inputs, VTT and VREF (any order) last. When VCC is connected, the BIAS VCC circuitry is disabled. VTT and RTT can be adjusted to accommodate backplane impedances if the dc recommended IOL ratings are not exceeded. VREF can be adjusted to optimize noise margins, but normally is two-thirds VTT. SN74GTL1655 16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH LIVE INSERTION www.ti.com SCBS696I – JULY 1997 – REVISED APRIL 2005 Electrical Characteristics over recommended operating free-air temperature range, VREF = 1 V and VTT = 1.5 V (unless otherwise noted) PARAMETER VIK VOH A port VCC = 3 V, II = –18 mA VCC = 3 V to 3.6 V, IOH = –100 µA VCC – 0.2 IOH = –12 mA 2.4 IOH = –24 mA 2.2 VCC = 3 V A port VCC = 3 V VOL B port VCC = 3 V Control inputs VCC = 3.6 V B port Ioff VCC = 0, II(hold) VCC = 3.6 V IOL = 12 mA 0.4 IOL = 24 mA 0.55 IOL = 40 mA 0.2 IOL = 80 mA 0.4 IOL = 100 mA 0.5 VI = VCC or GND ±10 VI = VTT or GND ±10 ±100 VI = 0.8 V VI = 2 V V (2), UNIT –1.2 0.2 VI or VO = 0 to 3.6 V VCC = 3 V A port MAX V IOL = 100 µA VCC = 3 V to 3.6 V, II MIN TYP (1) TEST CONDITIONS V µA µA 75 µA –75 VI = 0 to VCC ±500 IOZH B port VCC = 3.6 V, VO = 1.5 V 10 µA IOZL B port VCC = 3.6 V, VO = 0.4 V –10 µA (3) A port VCC = 3.6 V, VO = VCC or GND ±10 µA IOZPU A port VCC = 0 to 3.6 V, VO = 0.5 V to 3 V, OE = low ±50 µA IOZPD A port VCC = 3.6 V to 0, VO = 0.5 V to 3 V, OE = low ±50 µA IOZ ICC VCC = 3.6 V, IO = 0, VI = VCC or GND A or B port Outputs high 80 Outputs low 80 Outputs disabled 80 ∆ICC (4) Except B port VCC = 3.6 V, A-port or control inputs at VCC or GND, One input at VCC – 0.6 V Ci Control inputs VI = VCC or 0 Cio (1) (2) (3) (4) A port VO = VCC or 0 B port mA 1 mA 3 5 pF 5 6 6 8 pF All typical values are at VCC = 3.3 V, TA = 25°C. This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another. For I/O ports, the parameter IOZ includes the input leakage current. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. Live-Insertion Specifications over recommended operating free-air temperature range PARAMETER ICC (BIAS VCC) VO IO B port B port TEST CONDITIONS VCC = 0 to 3 V VCC = 3 V to 3.6 V VO (B port) = 0 to 1.2 V, MIN VI (BIAS VCC) = 3 V to 3.6 V 1 MAX mA 10 µA 1.2 V µA VCC = 0, VI (BIAS VCC) = 3.3 V VCC = 0, VO (B port) = 0.4 V, VCC = 0 to 3.6 V, OE = 3.3 V 100 VCC = 0 to 1.5 V, OE = 0 to 3.3 V 100 VI (BIAS VCC) = 3 V to 3.6 V UNIT 5 –1 7 SN74GTL1655 16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH LIVE INSERTION www.ti.com SCBS696I – JULY 1997 – REVISED APRIL 2005 Timing Requirements over recommended ranges of supply voltage and operating free-air temperature, VTT = 1.2 V, VREF = 0.8 V, and VERC = VCC or GND for GTL (unless otherwise noted) MIN fclock Clock frequency tw Pulse duration tsu Setup time LE high 3 CLK high or low 3 Data before CLK↑ th Data before LE↓ Data after LE↓ UNIT 160 MHz ns 2.7 CLK high 2.8 CLK low 2.6 Data after CLK↑ Hold time MAX ns 0.4 CLK high or low ns 0.9 A-to-B Switching Characteristics over recommended ranges of supply voltage and operating free-air temperature, VTT = 1.2 V, VREF = 0.8 V, and VERC = VCC or GND for GTL (see Figure 1) PARAMETER MAX 3.1 5.2 2.6 6.2 3.4 5.5 2.4 5.8 3.5 5.8 2.6 6.4 3.3 5.4 2.7 5.9 2.3 4.3 1.9 4.3 2.7 4.8 1.8 4.3 2.8 4.9 2 4.8 2.5 4.5 2 4.2 tPLH tPHL ten tdis tPLH tPHL tPLH tPHL tPLH tPHL ten tdis 8 TYP 160 tPHL (1) (2) MIN fmax tPLH tf TO (OUTPUT) tPLH tPHL tr FROM (INPUT) VERC = GND VERC = VCC VERC = GND VERC = VCC A VERC = VCC B CLK VERC = VCC B LEAB VERC = VCC B OEAB or OE VERC = VCC B A VERC = GND B CLK VERC = GND B LEAB VERC = GND B OEAB or OE VERC = GND B Transition time, B outputs (0.6 V to 1 V) Transition time, B outputs (1 V to 0.6 V) UNIT MHz 0.6 ns ns ns ns ns ns ns ns ns 1.2 1.1 ns 1.7 tsk(o) (1) Skew between drivers in the same package switching in the same direction 1 ns tsk(o) (2) Skew between drivers switching in any direction in the same package 1 ns Skew values are applicable for through mode only. Skew values are applicable for CLK mode only, with all outputs switching simultaneously. SN74GTL1655 16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH LIVE INSERTION www.ti.com SCBS696I – JULY 1997 – REVISED APRIL 2005 B-to-A Switching Characteristics over recommended ranges of supply voltage and operating free-air temperature, VTT = 1.2 V and VREF = 0.8 V for GTL (see Figure 1) PARAMETER TO (OUTPUT) MIN MAX fmax 160 tPLH 1.8 4.7 2.3 4.6 tPHL tPLH tPHL tPLH tPHL ten tdis (1) (2) FROM (INPUT) B A CLK A LEBA A OEBA or OE A UNIT MHz 1.6 4 1.5 3.4 1.7 4 1.4 3.5 1.2 4.2 1.2 6.1 ns ns ns ns tsk(o) (1) Skew between drivers in the same package switching in the same direction 1 ns tsk(o) (2) Skew between drivers switching in any direction in the same package 1 ns Skew values are applicable for through mode only. Skew values are applicable for CLK mode only, with all outputs switching simultaneously. 9 SN74GTL1655 16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH LIVE INSERTION www.ti.com SCBS696I – JULY 1997 – REVISED APRIL 2005 Timing Requirements over recommended ranges of supply voltage and operating free-air temperature, VTT = 1.5 V, VREF = 1 V, and VERC = VCC or GND for GTL+ (unless otherwise noted) MIN fclock Clock frequency tw Pulse duration tsu Setup time LE high 3 CLK high or low 3 Data before CLK↑ th Data before LE↓ Data after LE↓ UNIT 160 MHz ns 2.7 CLK high 2.8 CLK low 2.6 Data after CLK↑ Hold time MAX ns 0.4 CLK high or low ns 0.9 A-to-B Switching Characteristics over recommended ranges of supply voltage and operating free-air temperature, VTT = 1.5 V, VREF = 1 V, and VERC = VCC or GND for GTL+ (see Figure 1) PARAMETER MAX 3 5.1 2.9 6.5 3.4 5.4 2.7 6.2 3.5 5.7 2.8 6.7 3.3 5.4 3 6.3 tPLH tPHL ten tdis ten tdis tPLH tPHL tPLH tPHL tPLH tPHL ten tdis ten tdis 10 TYP 160 tPHL (1) (2) MIN fmax tPLH tf TO (OUTPUT) tPLH tPHL tr FROM (INPUT) VERC = GND VERC = VCC VERC = GND VERC = VCC A VERC = VCC B CLK VERC = VCC B LEAB VERC = VCC B OEAB VERC = VCC B OE VERC = VCC B A VERC = GND B CLK VERC = GND B LEAB VERC = GND B OEAB VERC = GND B OE VERC = GND B Transition time, B outputs (0.6 V to 1.3 V) Transition time, B outputs (1.3 V to 0.6 V) UNIT MHz 3 5.5 3.6 5.8 2.3 4.3 2 4.4 2.7 4.8 1.9 4.5 2.8 4.9 2.1 4.9 2.5 4.5 2.1 4.4 2.5 4.6 2.9 4.9 0.9 ns ns ns ns ns ns ns ns ns ns ns 1.7 1.6 ns 2.4 tsk(o) (1) Skew between drivers in the same package switching in the same direction 1 ns tsk(o) (2) Skew between drivers switching in any direction in the same package 1 ns Skew values are applicable for through mode only. Skew values are applicable for CLK mode only, with all outputs switching simultaneously. SN74GTL1655 16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH LIVE INSERTION www.ti.com SCBS696I – JULY 1997 – REVISED APRIL 2005 B-to-A Switching Characteristics over recommended ranges of supply voltage and operating free-air temperature, VTT = 1.5 V and VREF = 1 V for GTL+ (see Figure 1) PARAMETER TO (OUTPUT) MIN MAX fmax 160 tPLH 2 4.8 2.4 4.7 1.6 4.4 1.5 3.4 tPHL tPLH tPHL tPLH tPHL ten tdis ten tdis (1) (2) FROM (INPUT) B A CLK A LEBA A OEBA A OE A UNIT MHz 1.7 4 1.4 3.5 1.2 4.2 1.2 6.1 1.2 4.7 1.2 6.3 ns ns ns ns ns tsk(o) (1) Skew between drivers in the same package switching in the same direction 1 ns tsk(o) (2) Skew between drivers switching in any direction in the same package 1 ns Skew values are applicable for through mode only. Skew values are applicable for CLK mode only, with all outputs switching simultaneously. 11 SN74GTL1655 16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH LIVE INSERTION www.ti.com SCBS696I – JULY 1997 – REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION VTT 6V 500 Ω From Output Under Test S1 Open TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH GND CL = 50 pF (see Note A) 500 Ω 12.5 Ω From Output Under Test CL = 30 pF (see Note A) S1 Open 6V GND LOAD CIRCUIT FOR B OUTPUTS LOAD CIRCUIT FOR A OUTPUTS tw 3V 3V Timing Input 1.5 V 0V 1.5 V 1.5 V Input tsu 0V VOLTAGE WAVEFORMS PULSE DURATION 3V Input Test Point 1.5 V 1.5 V th 3V Data Input A Port 1.5 V Data Input B Port VREF 1.5 V 0V VTT VREF 0V 0V tPLH VOLTAGE WAVEFORMS SETUP AND HOLD TIMES tPHL VTT Output VREF VREF 3V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (CLK to B port) 1.5 V tPZL 1.5 V 0V tPLH Output Waveform 1 S1 at 6 V (see Note B) 1.5 V 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (CLK to A port) 1.5 V tPLZ 3V 1.5 V tPZH tPHL VOH Output 1.5 V 0V 3V Input Output Control Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ VOH 1.5 V VOH − 0.3 V ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES (A port) NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. Figure 1. Load Circuits and Voltage Waveforms 12 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74GTL1655DGGR ACTIVE TSSOP DGG 64 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 GTL1655 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
SN74GTL1655DGGR 价格&库存

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SN74GTL1655DGGR
  •  国内价格
  • 1+186.07910
  • 200+155.06600
  • 500+124.05280
  • 1000+103.37730

库存:0