SN74HC138-Q1
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS533A − AUGUST 2003 − REVISED SEPTEMBER 2008
D Qualified for Automotive Applications
D ESD Protection Exceeds 2000 V Per
D
D
D
D
D
D
D
D
D OR PW PACKAGE
(TOP VIEW)
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Targeted Specifically for High-Speed
Memory Decoders and Data-Transmission
Systems
2-V to 6-V VCC Operation
Outputs Can Drive Up To 10 LSTTL Loads
Low Power Consumption, 80-µA Max ICC
Typical tpd = 15 ns
±4-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Incorporate Three Enable Inputs to Simplify
Cascading and/or Data Reception
A
B
C
G2A
G2B
G1
Y7
GND
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
description/ordering information
The SN74HC138 is designed to be used in high-performance memory-decoding or data-routing applications
requiring very short propagation delay times. In high-performance memory systems, this decoder can be used
to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable
circuit, the delay times of this decoder and the enable time of the memory usually are less than the typical access
time of the memory. This means that the effective system delay introduced by the decoders is negligible.
The conditions at the binary-select inputs at the three enable inputs select one of eight output lines. Two
active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.
A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one
inverter. An enable input can be used as a data input for demultiplexing applications.
ORDERING INFORMATION{
−40°C
40°C to 125°C
ORDERABLE
PART NUMBER
PACKAGE‡
TA
TOP-SIDE
MARKING
SOIC − D
Tape and reel
SN74HC138QDRQ1
HC138Q1
TSSOP − PW
Tape and reel
SN74HC138QPWRQ1
HC138Q1
†
For the most current package and ordering information, see the Package Option Addendum at the end of this
document, or see the TI web site at www.ti.com.
‡ Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2008, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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1
SN74HC138-Q1
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS533A − AUGUST 2003 − REVISED SEPTEMBER 2008
FUNCTION TABLE
INPUTS
ENABLE
OUTPUTS
SELECT
G1
G2A
G2B
C
B
A
Y0
Y1
Y2
Y3
Y4
Y5
Y6
X
H
X
X
X
X
H
H
H
H
H
H
H
Y7
H
X
X
H
X
X
X
H
H
H
H
H
H
H
H
L
X
X
X
X
X
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
H
H
L
H
H
H
H
H
H
H
L
L
L
H
L
H
H
L
H
H
H
H
H
H
L
L
L
H
H
H
H
H
L
H
H
H
H
H
L
L
H
L
L
H
H
H
H
L
H
H
H
H
L
L
H
L
H
H
H
H
H
H
L
H
H
H
L
L
H
H
L
H
H
H
H
H
H
L
H
H
L
L
H
H
H
H
H
H
H
H
H
H
L
logic diagram (positive logic)
15
A
B
C
1
14
Y1
2
13
3
12
11
10
G1
Y0
6
Y2
Y3
Y4
Y5
9
Y6
G2A
4
7
G2B
2
5
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Y7
SN74HC138-Q1
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS533A − AUGUST 2003 − REVISED SEPTEMBER 2008
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
VCC
Supply voltage
VCC = 2 V
VIH
VCC = 4.5 V
High-level
High
level input voltage
VCC = 6 V
MIN
NOM
MAX
2
5
6
3.15
0.5
1.35
VCC = 6 V
VI
Input voltage
VO
Output voltage
Input transition rise/fall time
TA
Operating free-air temperature
V
1.8
0
0
VCC = 2 V
∆t/∆v
V
4.2
VCC = 4.5 V
Low-level
Low
level input voltage
V
1.5
VCC = 2 V
VIL
UNIT
VCC
V
VCC
V
1000
VCC = 4.5 V
500
VCC = 6 V
ns
400
−40
125
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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3
SN74HC138-Q1
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS533A − AUGUST 2003 − REVISED SEPTEMBER 2008
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = −20
20 µA
VOH
VI = VIH or VIL
IOH = −4 mA
IOH = −5.2 mA
IOL = 20 µA
VOL
VI = VIH or VIL
IOL = 4 mA
IOL = 5.2 mA
II
VI = VCC or 0
ICC
VI = VCC or 0,
TA = 25°C
VCC
IO = 0
MIN
TYP
MIN
2V
1.9
1.998
1.9
4.5 V
4.4
4.499
4.4
6V
5.9
5.999
5.9
4.5 V
3.98
4.3
3.7
6V
5.48
5.8
MAX
UNIT
V
5.2
2V
0.002
0.1
0.1
4.5 V
0.001
0.1
0.1
6V
0.001
0.1
0.1
4.5 V
0.17
0.26
0.4
6V
0.15
0.26
0.4
6V
±0.1
±100
±1000
nA
8
160
µA
3
10
10
pF
6V
Ci
MAX
2 V to 6 V
V
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
A, B, or C
Any Y
tpd
Enable
Any Y
tt
Any
y
TA = 25°C
MIN
MIN
MAX
TYP
MAX
2V
67
180
270
4.5 V
18
36
54
6V
15
31
46
2V
66
155
235
4.5 V
18
31
47
6V
15
26
40
2V
38
75
110
4.5 V
8
15
22
6V
6
13
19
UNIT
ns
ns
operating characteristics, TA = 25°C
PARAMETER
Cpd
4
TEST CONDITIONS
Power dissipation capacitance
No load
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TYP
85
UNIT
pF
SN74HC138-Q1
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS533A − AUGUST 2003 − REVISED SEPTEMBER 2008
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
VCC
Test
Point
Input
50%
50%
0V
CL = 50 pF
(see Note A)
tPLH
In-Phase
Output
LOAD CIRCUIT
50%
10%
tPHL
90%
90%
tr
Input
50%
10%
90%
90%
tr
tPHL
VCC
50%
10% 0 V
Out-of-Phase
Output
90%
tf
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOH
50%
10%
VOL
tf
tPLH
50%
10%
tf
50%
10%
90%
VOH
VOL
tr
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
C. The outputs are measured one at a time with one input transition per measurement.
D. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
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5
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
SN74HC138QDRG4Q1
ACTIVE
SOIC
D
16
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
HC138Q1
SN74HC138QPWRG4Q1
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
HC138Q1
SN74HC138QPWRQ1
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 125
HC138Q1
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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