SCLS119D − DECEMBER 1982 − REVISED SEPTEMBER 2003
D
D
D
D
D
D
D
D
SN54HC174 . . . J OR W PACKAGE
SN74HC174 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
Low Power Consumption, 80-µA Max ICC
Typical tpd = 14 ns
±4-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Contain Six Flip-Flops With Single-Rail
Outputs
Applications Include:
− Buffer/Storage Registers
− Shift Registers
− Pattern Generators
CLR
1Q
1D
2D
2Q
3D
3Q
GND
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
6Q
6D
5D
5Q
4D
4Q
CLK
SN54HC174 . . . FK PACKAGE
(TOP VIEW)
1Q
CLR
NC
VCC
6Q
description/ordering information
These positive-edge-triggered D-type flip-flops
have a direct clear (CLR) input.
1D
2D
NC
2Q
3D
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
6D
5D
NC
5Q
4D
3Q
GND
NC
CLK
4Q
Information at the data (D) inputs meeting the
setup time requirements is transferred to the
outputs on the positive-going edge of the clock
(CLK) pulse. Clock triggering occurs at a
particular voltage level and is not directly related
to the transition time of the positive-going edge of
CLK. When CLK is at either the high or low level,
the D input has no effect at the output.
NC − No internal connection
ORDERING INFORMATION
TA
PACKAGE†
PDIP − N
TOP-SIDE
MARKING
SN74HC174N
Tube of 40
SN74HC174D
Reel of 2500
SN74HC174DR
Reel of 250
SN74HC174DT
SOP − NS
Reel of 2000
SN74HC174NSR
HC174
SSOP − DB
Reel of 2000
SN74HC174DBR
HC174
Tube of 90
SN74HC174PW
Reel of 2000
SN74HC174PWR
Reel of 250
SN74HC174PWT
CDIP − J
Tube of 25
SNJ54HC174J
SNJ54HC174J
CFP − W
Tube of 150
SNJ54HC174W
SNJ54HC174W
LCCC − FK
Tube of 55
SNJ54HC174FK
TSSOP − PW
−55°C
125°C
−55
C to 125
C
ORDERABLE
PART NUMBER
Tube of 25
SOIC − D
−40°C
−40
C to 85
85°C
C
PACKAGE†
SN74HC174N
HC174
HC174
SNJ54HC174FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
! " #$ %! " &$'(# ! ) !%*
)$#!" # ! "&%## ! " &% !+% !% " %, " "! $ %!"
"! ) ) - !.* )$#! & #%""/ ) %" ! %#%"" (. #($)%
!%"!/ (( & %!% "*
& )$#!" # &( ! ! 0
121 (( & %!% " % !%"!%)
$(%"" !+% -"% !%)* (( !+% & )$#!" & )$#!
& #%""/ ) %" ! %#%"" (. #($)% !%"!/ (( & %!% "*
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCLS119D − DECEMBER 1982 − REVISED SEPTEMBER 2003
FUNCTION TABLE
(each flip-flop)
INPUTS
CLR
CLK
D
OUTPUT
Q
L
X
X
L
H
↑
H
H
H
↑
L
L
H
L
X
Q0
logic diagram (positive logic)
CLR
CLK
1D
1
9
3
1D
C1
2
1Q
R
To Five Other Channels
Pin numbers shown are for the D, DB, J, N, NS, PW, and W packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCLS119D − DECEMBER 1982 − REVISED SEPTEMBER 2003
recommended operating conditions (see Note 3)
SN54HC174
VCC
Supply voltage
VIH
VCC = 2 V
VCC = 4.5 V
High-level input voltage
VCC = 6 V
VCC = 2 V
VIL
VI
VO
Input voltage
NOM
MAX
2
5
6
NOM
MAX
2
5
6
1.5
3.15
3.15
4.2
4.2
0
VCC = 6 V
UNIT
V
V
0.5
0.5
1.35
1.35
1.8
1.8
VCC
VCC
VCC = 2 V
VCC = 4.5 V
Input transition rise/fall time
MIN
1.5
0
Output voltage
∆t/∆v
MIN
VCC = 4.5 V
VCC = 6 V
Low-level input voltage
SN74HC174
0
VCC
VCC
0
1000
1000
500
500
400
400
V
V
V
ns
TA
Operating free-air temperature
−55
125
−40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VOH
VOL
TEST CONDITIONS
Ci
SN54HC174
MIN
MAX
SN74HC174
MIN
MAX
UNIT
2V
1.9
1.998
1.9
1.9
IOH = −20 µA
4.4
4.499
4.4
4.4
6V
5.9
5.999
5.9
5.9
IOH = −4 mA
IOH = −5.2 mA
4.5 V
3.98
4.3
3.7
3.84
6V
5.48
5.8
5.2
5.34
2V
0.002
0.1
0.1
0.1
IOL = 20 µA
4.5 V
0.001
0.1
0.1
0.1
6V
0.001
0.1
0.1
0.1
4.5 V
0.17
0.26
0.4
0.33
6V
0.15
0.26
0.4
0.33
6V
±0.1
±100
±1000
±1000
nA
8
160
80
µA
10
10
10
pF
VI = VIH or VIL
VI = VIH or VIL
VI = VCC or 0
VI = VCC or 0,
TA = 25°C
MIN
TYP
MAX
4.5 V
IOL = 4 mA
IOL = 5.2 mA
II
ICC
VCC
IO = 0
6V
2 V to 6 V
POST OFFICE BOX 655303
3
• DALLAS, TEXAS 75265
V
V
3
SCLS119D − DECEMBER 1982 − REVISED SEPTEMBER 2003
timing requirements over recommended operating free-air temperature range (unless otherwise
noted)
VCC
fclock
Clock frequency
CLR low
tw
Pulse duration
CLK high or low
Data
tsu
Setup time before CLK↑
CLR inactive
th
CLK↑
Hold time, data after CLK
TA = 25°C
MIN
MAX
SN54HC174
MIN
MAX
SN74HC174
MIN
MAX
2V
6
4.2
5
4.5 V
31
21
25
6V
36
25
29
2V
80
120
100
4.5 V
16
24
20
6V
14
20
17
2V
80
120
100
4.5 V
16
24
20
6V
14
20
17
2V
100
150
125
4.5 V
20
30
25
6V
17
25
21
2V
100
150
125
4.5 V
20
30
25
6V
17
25
21
2V
0
0
0
4.5 V
0
0
0
6V
0
0
0
UNIT
MHz
ns
ns
ns
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
fmax
CLR
Any
tpd
CLK
tt
Any
Any
VCC
MIN
TA = 25°C
TYP
MAX
SN54HC174
MIN
MAX
SN74HC174
MIN
2V
6
9
4.2
5
4.5 V
31
44
21
25
6V
36
50
25
29
MAX
UNIT
MHz
2V
58
160
240
200
4.5 V
17
32
48
40
6V
14
27
41
34
2V
58
160
240
200
4.5 V
17
32
48
40
6V
14
27
41
34
2V
38
75
110
90
4.5 V
8
15
22
19
6V
6
13
19
16
ns
ns
operating characteristics, TA = 25°C
PARAMETER
Cpd
4
TEST CONDITIONS
Power dissipation capacitance per flip-flop
POST OFFICE BOX 655303
No load
• DALLAS, TEXAS 75265
TYP
27
UNIT
pF
SCLS119D − DECEMBER 1982 − REVISED SEPTEMBER 2003
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
VCC
High-Level
Pulse
Test
Point
50%
50%
0V
tw
CL = 50 pF
(see Note A)
VCC
Low-Level
Pulse
50%
50%
0V
LOAD CIRCUIT
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
VCC
50%
50%
0V
tPLH
Reference
Input
VCC
50%
In-Phase
Output
50%
10%
0V
tsu
Data
Input 50%
10%
90%
tr
tPHL
VCC
50%
10% 0 V
90%
90%
tr
th
90%
tPHL
Out-of-Phase
Output
90%
VOLTAGE WAVEFORMS
SETUP AND HOLD AND INPUT RISE AND FALL TIMES
tPLH
50%
10%
tf
tf
VOH
50%
10%
VOL
tf
50%
10%
90%
VOH
VOL
tr
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
C. For clock inputs, fmax is measured when the input duty cycle is 50%.
D. The outputs are measured one at a time with one input transition per measurement.
E. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
PACKAGE OPTION ADDENDUM
www.ti.com
14-Aug-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
84073012A
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
84073012A
SNJ54HC
174FK
8407301EA
ACTIVE
CDIP
J
16
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
8407301EA
SNJ54HC174J
8407301FA
ACTIVE
CFP
W
16
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
8407301FA
SNJ54HC174W
JM38510/65307BEA
ACTIVE
CDIP
J
16
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
JM38510/
65307BEA
M38510/65307BEA
ACTIVE
CDIP
J
16
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
JM38510/
65307BEA
SN54HC174J
ACTIVE
CDIP
J
16
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
SN54HC174J
SN74HC174D
ACTIVE
SOIC
D
16
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC174
SN74HC174DBR
ACTIVE
SSOP
DB
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC174
SN74HC174DR
ACTIVE
SOIC
D
16
2500
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 85
HC174
SN74HC174DRG4
ACTIVE
SOIC
D
16
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC174
SN74HC174N
ACTIVE
PDIP
N
16
25
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 85
SN74HC174N
SN74HC174NE4
ACTIVE
PDIP
N
16
25
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 85
SN74HC174N
SN74HC174NSR
ACTIVE
SO
NS
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC174
SN74HC174PW
ACTIVE
TSSOP
PW
16
90
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC174
SN74HC174PWR
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 85
HC174
SN74HC174PWRG4
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC174
SNJ54HC174FK
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
84073012A
SNJ54HC
174FK
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
14-Aug-2021
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
(3)
Device Marking
(4/5)
(6)
SNJ54HC174J
ACTIVE
CDIP
J
16
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
8407301EA
SNJ54HC174J
SNJ54HC174W
ACTIVE
CFP
W
16
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
8407301FA
SNJ54HC174W
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
