SCLS463A − JULY 2002 − REVISED JANUARY 2004
D Controlled Baseline
D
D
D
D
D
D
DW OR PW PACKAGE
(TOP VIEW)
− One Assembly/Test Site, One Fabrication
Site
Extended Temperature Performance of Up
To −55°C to 125°C
Enhanced Diminishing Manufacturing
Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree†
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
High-Current Outputs Drive Up To 15
LSTTL Loads
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
† Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life.
description/ordering information
This octal buffer and line driver is designed specifically to improve both the performance and density of 3-state
memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The SN74HC244 is
organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device
passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
ORDERING INFORMATION
TA
−40°C to 125°C
−55°C to 125°C
ORDERABLE
PART NUMBER
PACKAGE‡
TOP-SIDE
MARKING
SOP − DW
Tape and reel
SN74HC244QDWREP
SHC244EP
TSSOP − PW
Tape and reel
SN74HC244QPWREP
SHC244EP
SOP − DW
Tape and reel
SN74HC244MDWREP
HC244MEP
‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each buffer/driver)
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2004, Texas Instruments Incorporated
! "#$ ! %#&'" ($)
(#"! " !%$""! %$ *$ $! $+! !#$!
!(( ,-)
(#" %"$!!. ($! $"$!!'- "'#($
$!. '' %$$!)
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCLS463A − JULY 2002 − REVISED JANUARY 2004
logic diagram (positive logic)
1OE
1A1
1A2
1A3
1A4
1
2OE
2
18
4
16
6
14
8
12
1Y1
2A1
1Y2
2A2
1Y3
2A3
1Y4
2A4
19
11
9
13
7
15
5
17
3
2Y1
2Y2
2Y3
2Y4
absolute maximum ratings over operating free-air temperature range†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA
Package thermal impedance, θJA (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
VCC
VIH
Supply voltage
VCC = 2 V
VCC = 4.5 V
High-level input voltage
VCC = 6 V
VCC = 2 V
VIL
VI
VO
tt
TA
2
VCC = 4.5 V
VCC = 6 V
Low-level input voltage
Input voltage
Operating free-air temperature
POST OFFICE BOX 655303
NOM
MAX
2
5
6
3.15
V
V
4.2
0
0.5
0
1.35
0
1.8
0
0
VCC = 2 V
VCC = 4.5 V
0
1000
0
500
VCC = 6 V
Q-suffix device
0
400
−40
125
M-suffix device
−55
125
• DALLAS, TEXAS 75265
UNIT
1.5
VCC
VCC
Output voltage
Input transition (rise and fall) time
MIN
V
V
V
ns
°C
SCLS463A − JULY 2002 − REVISED JANUARY 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = −20 µA
VOH
VI = VIH or VIL
IOH = −6 mA
IOH = −7.8 mA
IOL = 20 µA
VOL
VI = VIH or VIL
IOL = 6 mA
IOL = 7.8 mA
II
IOZ
VI = VCC or 0
VO = VCC or 0,
ICC
Ci
VI = VCC or 0,
VI = VIH or VIL
IO = 0
VCC
MIN
TA = 25°C
TYP
MAX
MIN
2V
1.9
1.998
1.9
4.5 V
4.4
4.499
4.4
6V
5.9
5.999
5.9
4.5 V
3.98
4.3
3.7
6V
5.48
5.8
MAX
UNIT
V
5.2
2V
0.002
0.1
0.1
4.5 V
0.001
0.1
0.1
6V
0.001
0.1
0.1
4.5 V
0.17
0.26
0.4
6V
0.15
0.26
0.4
6V
±0.1
±100
±1000
nA
6V
±0.01
±0.5
±10
µA
8
160
µA
10
10
pF
6V
2 V to 6 V
3
V
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
tpd
ten
tdis
tt
FROM
(INPUT)
A
OE
OE
TA = 25°C
MIN
TYP
MAX
TO
(OUTPUT)
VCC
2V
40
115
170
Y
4.5 V
13
23
34
6V
11
20
29
Y
Y
Y
POST OFFICE BOX 655303
MIN
MAX
2V
75
150
225
4.5 V
15
30
45
6V
13
26
38
2V
75
150
225
4.5 V
15
30
45
6V
13
26
38
2V
28
60
90
4.5 V
8
12
18
6V
6
10
15
• DALLAS, TEXAS 75265
UNIT
ns
ns
ns
ns
3
SCLS463A − JULY 2002 − REVISED JANUARY 2004
switching characteristics over recommended operating free-air temperature range, CL = 150 pF
(unless otherwise noted) (see Figure 1)
TA = 25°C
TYP
MAX
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
2V
56
165
245
tpd
A
Y
4.5 V
18
33
49
6V
15
28
42
ten
OE
Y
tt
Y
MIN
MIN
MAX
2V
100
200
300
4.5 V
20
40
60
6V
17
34
51
2V
45
210
315
4.5 V
17
42
63
6V
13
36
53
UNIT
ns
ns
ns
operating characteristics, TA = 25°C
PARAMETER
Cpd
4
TEST CONDITIONS
Power dissipation capacitance per buffer/driver
POST OFFICE BOX 655303
No load
• DALLAS, TEXAS 75265
TYP
35
UNIT
pF
SCLS463A − JULY 2002 − REVISED JANUARY 2004
PARAMETER MEASUREMENT INFORMATION
VCC
PARAMETER
Test
Point
From Output
Under Test
S1
tPZH
ten
RL
CL
(see Note A)
1 kΩ
tPZL
tPHZ
tdis
S2
RL
1 kΩ
CL
S1
S2
50 pF
or
150 pF
Open
Closed
Closed
Open
Open
Closed
Closed
Open
Open
Open
50 pF
tPLZ
tpd or tt
−−
LOAD CIRCUIT
50 pF
or
150 pF
VCC
Input
50%
50%
0V
tPLH
In-Phase
Output
50%
10%
tPHL
90%
VOH
50%
10% V
OL
tf
90%
tr
tPHL
Out-of-Phase
Output
90%
tPLH
50%
10%
50%
10%
90%
VOH
VOL
tf
tr
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
Output
Control
(Low-Level
Enabling)
VCC
50%
50%
0V
tPZL
Output
Waveform 1
(See Note B)
tPLZ
≈VCC
≈VCC
50%
10%
VOL
tPZH
Input
50%
10%
90%
VCC
90%
50%
10% 0 V
tr
Output
Waveform 2
(See Note B)
90%
VOH
≈0 V
tPHZ
tf
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
50%
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
NOTES: A. CL includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
SN74HC244MDWREP
ACTIVE
SOIC
DW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 125
HC244MEP
SN74HC244QDWREP
ACTIVE
SOIC
DW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SHC244EP
SN74HC244QPWREP
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SHC244EP
SN74HC244QPWREPG4
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SHC244EP
V62/03607-01XE
ACTIVE
SOIC
DW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 125
HC244MEP
V62/03607-02XE
ACTIVE
SOIC
DW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SHC244EP
V62/03607-02YE
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SHC244EP
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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