SN54HC244, SN74HC244
SCLS130F – DECEMBER 1982 – REVISED MAY 2022
SNx4HC244 Octal Buffers and Line Drivers With 3-State Outputs
1 Features
3 Description
•
•
•
The SNx4HC244 octal buffers and line drivers are
designed specifically to improve both the performance
and density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and transmitters.
The SNx4HC244 devices are organized as two 4bit buffers and drivers with separate output-enable
(OE) inputs. When OE is low, the device passes
noninverted data from the A inputs to the Y outputs.
When OE is high, the outputs are in the highimpedance state.
•
•
•
•
•
Wide Operating Voltage Range of 2 V to 6 V
High-Current Outputs Drive Up to 15 LSTTL Loads
3-State Outputs Drive Bus Lines or Buffer Memory
Address Registers
Low Power Consumption: ICC, 80-µA (Maximum)
Typical tpd = 11 ns
±6-mA Output Drive at 5 V
Low Input Current of 1 µA (Maximum)
On Products Compliant to MIL-PRF-38535,
All Parameters Are Tested Unless Otherwise
Noted. On All Other Products, Production
Processing Does Not Necessarily Include Testing
of All Parameters.
2 Applications
•
•
•
•
•
•
Device Information
PART NUMBER
SN54HC244
Servers
LED Displays
Network Switches
Telecom Infrastructure
Motor Drivers
I/O Expanders
1A3
1A4
CDIP (20)
6.92 mm × 24.38 mm
CFP (20)
6.92 mm × 13.72 mm
LCCC (20)
8.89 mm × 8.89 mm
SSOP (20)
5.30 mm × 7.25 mm
SN74HC244DW
SOIC (20)
7.50 mm × 12.80 mm
SN74HC244N
PDIP (20)
6.30 mm × 25.40 mm
SN74HC244NS
SOP (20)
5.30 mm × 12.60 mm
SN74HC244PW
TSSOP (20)
4.40 mm × 6.50 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
2OE 19
1OE 1
1A2
BODY SIZE (NOM)
SN74HC244DB
(1)
2
18 1Y1
2A1
4
16 1Y1
2A2
6
14 1Y1
2A3
8
12 1Y4
2A4
1A1
PACKAGE (PINS)(1)
11
9 1Y1
13
7 1Y1
15
5 1Y1
17
3 1Y4
Copyright © 2016, Texas Instruments Incorporated
Logic Diagram (Positive Logic)
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN54HC244, SN74HC244
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SCLS130F – DECEMBER 1982 – REVISED MAY 2022
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
Pin Functions.................................................................... 3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................5
6.5 Electrical Characteristics.............................................5
6.6 Electrical Characteristics – SN54HC244.................... 5
6.7 Electrical Characteristics – SN74HC244.................... 6
6.8 Switching Characteristics............................................6
6.9 Switching Characteristics – CL = 50 pF...................... 8
6.10 Switching Characteristics – CL = 150 pF.................. 8
6.11 Typical Characteristic................................................ 9
7 Parameter Measurement Information.......................... 10
8 Detailed Description......................................................12
8.1 Overview................................................................... 12
8.2 Functional Block Diagram......................................... 12
8.3 Feature Description...................................................12
8.4 Device Functional Modes..........................................12
9 Application and Implementation.................................. 13
9.1 Application Information............................................. 13
9.2 Typical Application.................................................... 13
10 Power Supply Recommendations..............................14
11 Layout........................................................................... 14
11.1 Layout Guidelines................................................... 14
11.2 Layout Example...................................................... 14
12 Device and Documentation Support..........................15
12.1 Documentation Support.......................................... 15
12.2 Receiving Notification of Documentation Updates..15
12.3 Support Resources................................................. 15
12.4 Trademarks............................................................. 15
12.5 Electrostatic Discharge Caution..............................15
12.6 Glossary..................................................................15
13 Mechanical, Packaging, and Orderable
Information.................................................................... 15
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (May 2016) to Revision F (May 2022)
Page
• Junction-to-ambient thermal resistance values increased to match current function......................................... 5
Changes from Revision D (August 2003) to Revision E (May 2016)
Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section................... 1
• Added Military Disclaimer to Features section....................................................................................................1
• Added Applications section.................................................................................................................................1
• Removed Ordering Information table..................................................................................................................1
• Added Device Information table..........................................................................................................................1
2
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SCLS130F – DECEMBER 1982 – REVISED MAY 2022
1Y2
1A3
6
15
2A3
2Y2
7
14
1Y3
1A4
8
13
2A2
2Y1
9
12
1Y4
GND
10
11
2A1
Figure 5-1. DB, DW, J, N, NS, PW, W Package 20Pin SSOP, SOIC, CDIP, PDIP, SOP, TSSOP, or CFP
Top View
2OE
16
19
5
4
18
1Y1
2Y3
5
17
2A4
1A3
6
16
1Y2
2Y2
7
15
2A3
1A4
8
14
1Y3
13
2Y3
1A2
2A2
2A4
VCC
17
20
4
12
1A2
1Y4
1Y1
1OE
18
1
3
11
2Y4
2A1
2OE
1A1
19
2
2
10
1A1
GND
VCC
2Y4
20
9
1
2Y1
1OE
3
5 Pin Configuration and Functions
Figure 5-2. FK Package 20-Pin LCCC Top View
Pin Functions
PIN
NO.
NAME
I/O(1)
DESCRIPTION
1
1 OE
I
Output Enable
2
1A1
I
Input
3
2Y4
O
Output
4
1A2
I
Input
5
2Y3
O
Output
6
1A3
I
Input
7
2Y2
O
Output
8
1A4
I
Input
9
2Y1
O
Output
10
GND
—
Ground
11
2A1
I
Input
12
1Y4
O
Output
13
2A2
I
Input
14
1Y3
O
Output
15
2A3
I
Input
16
1Y2
O
Output
17
2A4
I
Input
18
1Y1
O
Output
19
2 OE
I
Output Enable
20
VCC
—
(1)
Power Pin
Signal Types: I = Input, O = Output, I/O = Input or Output.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
Supply voltage range, VCC
MIN
MAX
UNIT
–0.5
7
V
(2)
Input clamp current, IIK
VI < 0 or VI > VCC
±20
mA
Output clamp current, IOK
VO < 0 or VO > VCC (2)
±20
mA
Continuous output current, IO
VO = 0 or VCC
±35
mA
±70
mA
150
°C
150
°C
Continuous current through VCC or GND
Junction Temperature, TJ
Storage temperature, Tstg
(1)
(2)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
6.2 ESD Ratings
SN74HC244
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC
VALUE
JS-001(1)
UNIT
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V
±1000
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(1)
VCC
Supply voltage
VIH
High-level input voltage
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
MIN
NOM
MAX
2
5
6
Low-level input voltage
V
4.2
0.5
VCC = 4.5 V
1.35
VCC = 6 V
V
1.8
VI
Input voltage
0
VCC
V
VO
Output voltage
0
VCC
V
VCC = 2 V
Δt/Δv
Cpd
TA
(1)
4
V
1.5
3.15
VCC = 2 V
VIL
UNIT
Input transition rise and fall time
1000
VCC = 4.5 V
500
VCC = 6 V
400
Power dissipation capacitance per buffer or driver (no load)
Operating free-air temperature
35
ns/V
pF
SN54HC244
–55
125
SN74HC244
–40
85
°C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See the Texas Instruments application
report, Implications of Slow or Floating CMOS Inputs, SCBA004.
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6.4 Thermal Information
SN74HC244
THERMAL METRIC
DW (SOIC)
DB (SSOP)
N (PDIP)
NS (SO)
PW (TSSOP)
20 PINS
20 PINS
20 PINS
20 PINS
20 PINS
UNIT
109.1
122.7
84.6
113.4
131.8
°C/W
76
81.6
72.5
78.6
72.2
°C/W
RθJA
Junction-to-ambient thermal
(1)
resistance
RθJC (top)
Junction-to-case (top) thermal
resistance
RθJB
Junction-to-board thermal
resistance
77.6
77.5
65.3
78.4
82.8
°C/W
ΨJT
Junction-to-top characterization
parameter
51.5
46.1
55.3
47.1
21.5
°C/W
ΨJB
Junction-to-board
characterization parameter
77.1
77.1
65.2
78.1
82.4
°C/W
RθJC (bot)
Junction-to-case (bottom)
thermal resistance
N/A
N/A
N/A
N/A
N/A
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics
TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –20 µA
VOH
VI = VIH or VIL
MIN
TYP
VCC = 2 V
1.9
1.998
VCC = 4.5 V
4.4
4.499
5.9
5.999
3.98
4.3
VCC = 6 V
IOH = –6 mA, VCC = 4.5 V
IOH = –7.8 mA, VCC = 6 V
5.8
0.002
0.1
VCC = 4.5 V
0.001
0.1
VCC = 6 V
0.001
0.1
IOL = 6 mA, VCC = 4.5 V
0.17
0.26
IOL = 7.8 mA, VCC = 6 V
0.15
0.26
VI = VIH or VIL
II
VI = VCC or 0, VCC = 6 V
IOZ
VO = VCC or 0, VI = VIH or VIL, VCC = 6 V
ICC
VI = VCC or 0, IO = 0, VCC = 6 V
Ci
VCC = 2 V to 6 V
UNIT
V
VCC = 2 V
IOL = 20 µA
VOL
5.48
MAX
V
±0.1
±100
nA
±0.01
±0.5
µA
8
µA
3
10
pF
6.6 Electrical Characteristics – SN54HC244
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –20 µA
VOH
VI = VIH or VIL
MIN
VCC = 2 V
1.9
VCC = 4.5 V
4.4
VCC = 6 V
5.9
IOH = –6 mA, VCC = 4.5 V
3.7
IOH = –7.8 mA, VCC = 6 V
5.2
TYP
MAX
UNIT
V
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over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOL = 20 µA
VOL
VI = VIH or VIL
MIN
TYP
0.1
VCC = 4.5 V
0.1
VCC = 6 V
0.1
IOL = 6 mA, VCC = 4.5 V
VI = VCC or 0, VCC = 6 V
IOZ
ICC
Ci
VCC = 2 V to 6 V
UNIT
V
0.4
IOL = 7.8 mA, VCC = 6 V
II
MAX
VCC = 2 V
0.4
±1000
nA
VO = VCC or 0, VI = VIH or VIL, VCC = 6 V
±10
µA
VI = VCC or 0, IO = 0, VCC = 6 V
160
µA
10
pF
6.7 Electrical Characteristics – SN74HC244
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –20 µA
VOH
VI = VIH or VIL
1.9
VCC = 4.5 V
4.4
VCC = 6 V
5.9
IOH = –6 mA, VCC = 4.5 V
3.84
IOH = –7.8 mA, VCC = 6 V
5.34
IOL = 20 µA
VOL
MIN
VCC = 2 V
VI = VIH or VIL
TYP
VCC = 2 V
0.1
VCC = 4.5 V
0.1
VCC = 6 V
0.1
IOZ
ICC
Ci
V
0.33
IOL = 7.8 mA, VCC = 6 V
VI = VCC or 0, VCC = 6 V
UNIT
V
IOL = 6 mA, VCC = 4.5 V
II
MAX
0.33
±1000
nA
VO = VCC or 0, VI = VIH or VIL, VCC = 6 V
±5
µA
VI = VCC or 0, IO = 0, VCC = 6 V
80
µA
VCC = 2 V to 6 V
10
pF
UNIT
6.8 Switching Characteristics
TA = 25°C (unless otherwise noted; see Figure 7-1)
PARAMETER
TEST CONDITIONS
VCC = 2 V
tpd
From A (input) to Y (output)
VCC = 4.5 V
VCC = 6 V
VCC = 2 V
ten
From OE (input) to Y (output)
VCC = 4.5 V
VCC = 6 V
6
TYP
MAX
CL = 50 pF
MIN
40
115
CL = 150 pF
56
165
CL = 50 pF
13
23
CL = 150 pF
18
33
CL = 50 pF
11
20
CL = 150 pF
15
28
CL = 50 pF
75
150
CL = 150 pF
100
200
CL = 50 pF
15
30
CL = 150 pF
20
40
CL = 50 pF
13
26
CL = 150 pF
17
34
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ns
ns
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TA = 25°C (unless otherwise noted; see Figure 7-1)
PARAMETER
tdis
TEST CONDITIONS
From OE (input) to Y (output)
TYP
MAX
VCC = 2 V
CL = 50 pF
75
150
VCC = 4.5 V
CL = 50 pF
15
30
VCC = 6 V
CL = 50 pF
13
26
CL = 50 pF
28
60
CL = 150 pF
45
210
CL = 50 pF
8
12
CL = 150 pF
17
42
CL = 50 pF
6
10
CL = 150 pF
13
36
VCC = 2 V
tt
To Y (output)
VCC = 4.5 V
VCC = 6 V
MIN
UNIT
ns
ns
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6.9 Switching Characteristics – CL = 50 pF
over recommended operating free-air temperature range (unless otherwise noted; see Figure 7-1)
PARAMETER
TEST CONDITIONS
VCC = 2 V
tpd
From A (input) to Y (output)
VCC = 4.5 V
VCC = 6 V
VCC = 2 V
ten
From OE (input) to Y (output)
VCC = 4.5 V
VCC = 6 V
VCC = 2 V
tdis
From OE (input) to Y (output)
VCC = 4.5 V
VCC = 6 V
VCC = 2 V
tt
VCC = 4.5 V
To Y (output)
VCC = 6 V
MIN
TYP
MAX
SN54HC244
170
SN74HC244
145
SN54HC244
34
SN74HC244
29
SN54HC244
29
SN74HC244
25
SN54HC244
225
SN74HC244
190
SN54HC244
45
SN74HC244
38
SN54HC244
38
SN74HC244
32
SN54HC244
225
SN74HC244
190
SN54HC244
45
SN74HC244
38
SN54HC244
38
SN74HC244
32
SN54HC244
90
SN74HC244
75
SN54HC244
18
SN74HC244
15
SN54HC244
15
SN74HC244
13
UNIT
ns
ns
ns
ns
6.10 Switching Characteristics – CL = 150 pF
over recommended operating free-air temperature range (unless otherwise noted; see Figure 7-1)
PARAMETER
TEST CONDITIONS
VCC = 2 V
tpd
From A (input) to Y (output)
VCC = 4.5 V
VCC = 6 V
VCC = 2 V
ten
From OE (input) to Y (output)
VCC = 4.5 V
VCC = 6 V
8
MIN
TYP
MAX
SN54HC244
245
SN74HC244
210
SN54HC244
49
SN74HC244
42
SN54HC244
42
SN74HC244
35
SN54HC244
300
SN74HC244
250
SN54HC244
60
SN74HC244
50
SN54HC244
51
SN74HC244
43
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UNIT
ns
ns
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over recommended operating free-air temperature range (unless otherwise noted; see Figure 7-1)
PARAMETER
TEST CONDITIONS
MIN
VCC = 2 V
tt
To Y (output)
VCC = 4.5 V
VCC = 6 V
TYP
MAX
SN54HC244
315
SN74HC244
265
SN54HC244
63
SN74HC244
53
SN54HC244
53
SN74HC244
45
UNIT
ns
6.11 Typical Characteristic
60
50
tpd (ns)
40
30
20
10
CL 50pF
CL 150pF
0
2
3
4
5
VCC (V)
6
C001
Figure 6-1. Propagation Delay
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SCLS130F – DECEMBER 1982 – REVISED MAY 2022
7 Parameter Measurement Information
VCC
Test
Point
From Output
Under Test
S1
RL
CL
(see Note A)
S2
Figure 7-1. Load Circuit
VCC
Input
50%
50%
0V
tPLH
In-Phase
Output
tPHL
50%
10%
90%
VOH
50%
10% V
OL
tf
90%
tr
tPHL
tPLH
90%
Out-of-Phase
Output
50%
10%
90%
50%
10%
VOH
VOL
tf
tr
Figure 7-2. Propagation Delay and
Output Transition Times
Input
50%
10%
90%
90%
VCC
50%
10% 0 V
tr
tf
Figure 7-3. Input Rise and Fall Times
Output
Control
(Low-Level
Enabling)
VCC
50%
50%
0V
tPZL
Output
Waveform 1
(See Note B)
tPLZ
10%
tPZH
Output
Waveform 2
(See Note B)
≈VCC
≈VCC
50%
VOL
tPHZ
50%
90%
VOH
≈0 V
Figure 7-4. Enable and Disable Times
for 3-State Outputs
10
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Note
NOTE:
A. CL includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when
disabled by the output control. Waveform 2 is for an output with internal conditions such that the
output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by
generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Table 7-1. Switching Information Table
PARAMETER
ten
tdis
RL
CL
tPZH
1 kΩ
tPZL
1 kΩ
tPHZ
1 kΩ
tPLZ
1 kΩ
—
tpd or tt
S1
S2
50 pF or 150 pF
Open
Closed
50 pF or 150 pF
Closed
Open
50 pF
Open
Closed
50 pF
Closed
Open
50 pF or 150 pF
Open
Open
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8 Detailed Description
8.1 Overview
The SNx4HC244 device is organized as two 4-bit buffers and line drivers with separate output-enable ( OE)
inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the
outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the
current-sinking capability of the driver.
8.2 Functional Block Diagram
2OE 19
1OE 1
2
18 1Y1
2A1
4
16 1Y1
2A2
6
14 1Y1
2A3
8
12 1Y4
2A4
1A1
1A2
1A3
1A4
11
9 1Y1
13
7 1Y1
15
5 1Y1
17
3 1Y4
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8.3 Feature Description
The SNx4HC244 has a wide operating voltage of 2 V to 6 V. Inputs accept voltage levels up to VCC. This device
has a low power consumption of ICC 80 µA (maximum). The SNx4HC244 device can drive ±6 mA at VCC of 5 V.
8.4 Device Functional Modes
Table 8-1 lists the functions of the SNx4HC244.
Table 8-1. Function Table
(Each Buffer or Driver)
INPUTS
12
OUTPUT
OE
A
Y
L
H
H
L
L
L
H
X
Z
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
SN74HC244 is a high-drive CMOS device that can be used for a multitude of bus interface type applications
where output drive or PCB trace length is a concern.
9.2 Typical Application
Regulated 3V
SN74HC244
1OE
x
x
x
MCU or
System
Logic
A1
x
x
x
A4
VCC
Y1
x
x
x
Y4
x
x
x
MCU System
Logic LEDS
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 9-1. SN74HC244 Application Schematic
9.2.1 Design Requirements
This device uses CMOS technology and has balanced output drive. Take care to avoid bus contention because
it can drive currents that would exceed maximum limits. The high drive also creates fast edges into light loads so
routing and load conditions should be considered to prevent ringing.
9.2.2 Detailed Design Procedure
1. Recommended input conditions:
• For rise time and fall time specifications, see Δt/ΔV in Section 6.3.
• For specified high and low levels, see VIH and VIL in Section 6.3.
2. Recommend output conditions:
• Load currents should not exceed IO max per output and should not exceed the continuous current
through VCC or GND total current for the part. These limits are located in Section 6.1.
• Outputs should not be pulled above VCC.
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Product Folder Links: SN54HC244 SN74HC244
13
SN54HC244, SN74HC244
www.ti.com
SCLS130F – DECEMBER 1982 – REVISED MAY 2022
9.2.3 Application Curve
100
90
80
ten (ns)
70
60
50
40
30
20
10
CL 50pF
CL 150pF
0
2
3
4
5
VCC (V)
6
C002
Figure 9-2. Enable Time
10 Power Supply Recommendations
The power supply can be any voltage between the MIN and MAX supply voltage rating located in the Section
6.3.
Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, TI recomments a 0.1-μF capacitor. If there are multiple VCC terminals, then TI recommends 0.01-μF or
0.022-μF capacitors for each power terminal. It is ok to parallel multiple bypass capacitors to reject different
frequencies of noise. Multiple bypass capacitors may be paralleled to reject different frequencies of noise. The
bypass capacitor should be installed as close to the power terminal as possible for the best results.
11 Layout
11.1 Layout Guidelines
When using multiple bit logic devices, inputs should not float. In many cases, functions or parts of functions of
digital logic devices are unused. Some examples are when only two inputs of a triple-input and gate are used,
or when only 3 of the 4-buffer gates are used. Such input pins should not be left unconnected because the
undefined voltages at the outside connections result in undefined operational states.
Specified in Figure 11-1 are rules that must be observed under all circumstances. All unused inputs of digital
logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should
be applied to any particular unused input depends on the function of the device. Generally they will be tied to
GND or VCC, whichever makes more sense or is more convenient.
11.2 Layout Example
VCC
Unused Input
Input
Output
Unused Input
Output
Input
Figure 11-1. Layout Diagram
14
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Product Folder Links: SN54HC244 SN74HC244
SN54HC244, SN74HC244
www.ti.com
SCLS130F – DECEMBER 1982 – REVISED MAY 2022
12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Links
Table 12-1 lists quick access links. Categories include technical documents, support and community resources,
tools and software, and quick access to sample or buy.
Table 12-1. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
SN54HC244
Click here
Click here
Click here
Click here
Click here
SN74HC244
Click here
Click here
Click here
Click here
Click here
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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Product Folder Links: SN54HC244 SN74HC244
15
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
5962-8409601VRA
ACTIVE
CDIP
J
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-8409601VR
A
SNV54HC244J
5962-8409601VSA
ACTIVE
CFP
W
20
25
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-8409601VS
A
SNV54HC244W
84096012A
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
84096012A
SNJ54HC
244FK
8409601RA
ACTIVE
CDIP
J
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
8409601RA
SNJ54HC244J
Samples
8409601SA
ACTIVE
CFP
W
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
8409601SA
SNJ54HC244W
Samples
JM38510/65705B2A
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
JM38510/
65705B2A
Samples
JM38510/65705BRA
ACTIVE
CDIP
J
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
JM38510/
65705BRA
Samples
JM38510/65705BSA
ACTIVE
CFP
W
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
JM38510/
65705BSA
Samples
M38510/65705B2A
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
JM38510/
65705B2A
Samples
M38510/65705BRA
ACTIVE
CDIP
J
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
JM38510/
65705BRA
Samples
M38510/65705BSA
ACTIVE
CFP
W
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
JM38510/
65705BSA
Samples
SN54HC244J
ACTIVE
CDIP
J
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
SN54HC244J
Samples
SN74HC244APWR
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC244A
Samples
SN74HC244DBR
ACTIVE
SSOP
DB
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC244
Samples
SN74HC244DW
ACTIVE
SOIC
DW
20
25
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC244
Samples
SN74HC244DWE4
ACTIVE
SOIC
DW
20
25
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC244
Samples
Addendum-Page 1
Samples
Samples
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
10-Jun-2022
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN74HC244DWR
ACTIVE
SOIC
DW
20
2000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 85
HC244
Samples
SN74HC244DWRE4
ACTIVE
SOIC
DW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC244
Samples
SN74HC244DWRG4
ACTIVE
SOIC
DW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC244
Samples
SN74HC244N
ACTIVE
PDIP
N
20
20
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 85
SN74HC244N
Samples
SN74HC244NE4
ACTIVE
PDIP
N
20
20
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 85
SN74HC244N
Samples
SN74HC244NSR
ACTIVE
SO
NS
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC244
Samples
SN74HC244NSRG4
ACTIVE
SO
NS
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC244
Samples
SN74HC244PW
ACTIVE
TSSOP
PW
20
70
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC244
Samples
SN74HC244PWE4
ACTIVE
TSSOP
PW
20
70
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC244
Samples
SN74HC244PWG4
ACTIVE
TSSOP
PW
20
70
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC244
Samples
SN74HC244PWR
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC244
Samples
SN74HC244PWRE4
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC244
Samples
SN74HC244PWRG4
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC244
Samples
SN74HC244PWT
ACTIVE
TSSOP
PW
20
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC244
Samples
SN74HC244QDWRG4Q1
ACTIVE
SOIC
DW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
HC244Q
Samples
SNJ54HC244FK
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
84096012A
SNJ54HC
244FK
SNJ54HC244J
ACTIVE
CDIP
J
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
8409601RA
SNJ54HC244J
Samples
SNJ54HC244W
ACTIVE
CFP
W
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
8409601SA
SNJ54HC244W
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2022
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of