SCLS308D − JANUARY 1996 − REVISED OCTOBER 2003
D Wide Operating Voltage Range of 2 V to 6 V
D High-Current 3-State Outputs Drive Bus
D
D
D
D
D
Lines, Buffer-Memory Address Registers,
or Drive Up To 15 LSTTL Loads
True Outputs
Low Power Consumption, 80-µA Max ICC
Typical tpd = 10 ns
±6-mA Output Drive at 5 V
Low Input Current of 1 µA Max
SN54HC365 . . . J OR W PACKAGE
SN74HC365 . . . D, N, NS, OR PW PACKAGE
(TOP VIEW)
OE1
A1
Y1
A2
Y2
A3
Y3
GND
description/ordering information
These hex buffers and line drivers are designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters. The ’HC365 devices contain six
independent buffers/drivers with dual-gated
output-enable (OE1 and OE2) inputs. When OE1
and OE2 are both low, the devices pass
noninverted data from the A inputs to the
Y outputs. If either (or both) output-enable
terminal(s) is high, the outputs are in the
high-impedance state.
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
OE2
A6
Y6
A5
Y5
A4
Y4
A1
OE1
NC
VCC
OE2
SN54HC365 . . . FK PACKAGE
(TOP VIEW)
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
A6
Y6
NC
A5
Y5
Y3
GND
NC
Y4
A4
Y1
A2
NC
Y2
A3
NC − No internal connection
ORDERING INFORMATION
PACKAGE†
TA
PDIP − N
SN74HC365N
Tube of 40
SN74HC365D
Reel of 2500
SN74HC365DR
Reel of 250
SN74HC365DT
Reel of 2000
SN74HC365NSR
Reel of 90
SN74HC365PW
Reel of 2000
SN74HC365PWR
Reel of 250
SN74HC365PWT
CDIP − J
Tube of 25
SNJ54HC365J
SNJ54HC365J
CFP − W
Tube of 150
SNJ54HC365W
SNJ54HC365W
LCCC − FK
Tube of 55
SNJ54HC365FK
SOP − NS
TSSOP − PW
−55°C
−55
C to 125
125°C
C
TOP-SIDE
MARKING
Tube of 25
SOIC − D
−40°C to 85°C
ORDERABLE
PART NUMBER
SN74HC365N
HC365
HC365
HC365
SNJ54HC365FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
!"# $ %& ' # "$ (&)*%"# +"#',
+&%#$ % ! # $('% %"# $ (' #-' #' !$ '."$ $# &!' #$
$#" +" + /" " #0, +&%# ( %'$$ 1 + '$ # '%'$$" *0 %*&+'
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( +&%#$ % !(*" # # 23 "** (" "!'#' $ " ' #'$#'+
& *'$$ #-' /$' #'+, "** #-' ( +&%#$ ( +&%#
( %'$$ 1 + '$ # '%'$$" *0 %*&+' #'$# 1 "** (" "!'#' $,
POST OFFICE BOX 655303
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1
SCLS308D − JANUARY 1996 − REVISED OCTOBER 2003
FUNCTION TABLE
(each buffer/driver)
INPUTS
OE1
OE2
A
OUTPUT
Y
H
X
X
Z
X
H
X
Z
L
L
H
H
L
L
L
L
logic diagram (positive logic)
OE1
OE2
A1
1
15
2
3
Y1
To Five Other Channels
Pin numbers shown are for the D, J, N, NS, PW, and W packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
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SCLS308D − JANUARY 1996 − REVISED OCTOBER 2003
recommended operating conditions (see Note 3)
SN54HC365
VCC
VIH
Supply voltage
VCC = 2 V
VCC = 4.5 V
High-level input voltage
VCC = 6 V
VCC = 2 V
VIL
VI
VO
∆t/∆v
MIN
NOM
MAX
2
5
6
Input voltage
MAX
2
5
6
3.15
3.15
4.2
4.2
0
VCC = 6 V
UNIT
V
V
0.5
0.5
1.35
1.35
1.8
1.8
VCC
VCC
VCC = 2 V
VCC = 4.5 V
Input transition rise/fall time
NOM
1.5
0
Output voltage
MIN
1.5
VCC = 4.5 V
VCC = 6 V
Low-level input voltage
SN74HC365
0
VCC
VCC
0
1000
1000
500
500
400
400
V
V
V
ns
TA
Operating free-air temperature
−55
125
−40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VOH
VOL
TEST CONDITIONS
VI = VCC or 0,
MIN
MAX
SN74HC365
MIN
MAX
UNIT
1.9
1.998
1.9
1.9
IOH = −20 µA
4.4
4.499
4.4
4.4
6V
5.9
5.999
5.9
5.9
IOH = −6 mA
IOH = −7.8 mA
4.5 V
3.98
4.3
3.7
3.84
6V
5.48
5.8
5.2
5.34
2V
0.002
0.1
0.1
0.1
IOL = 20 µA
4.5 V
0.001
0.1
0.1
0.1
6V
0.001
0.1
0.1
0.1
4.5 V
0.17
0.26
0.4
0.33
6V
0.15
0.26
0.4
0.33
6V
±0.1
±100
±1000
±1000
nA
6V
±0.01
±0.5
±10
±5
µA
8
160
80
µA
10
10
10
pF
IOL = 6 mA
IOL = 7.8 mA
ICC
Ci
SN54HC365
2V
VI = VIH or VIL
VI = VCC or 0
VO = VCC or 0
TA = 25°C
MIN
TYP
MAX
4.5 V
VI = VIH or VIL
II
IOZ
VCC
IO = 0
6V
2 V to 6 V
POST OFFICE BOX 655303
3
• DALLAS, TEXAS 75265
V
V
3
SCLS308D − JANUARY 1996 − REVISED OCTOBER 2003
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
TA = 25°C
TYP
MAX
SN54HC365
SN74HC365
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
2V
50
95
145
120
tpd
A
Y
4.5 V
12
19
29
24
6V
10
16
25
20
ten
OE
tdis
OE
tt
Y
Y
Any
MIN
MIN
MAX
MIN
MAX
2V
100
190
285
238
4.5 V
26
38
57
48
6V
21
32
48
41
2V
50
175
265
240
4.5 V
21
35
53
48
6V
19
30
45
41
2V
28
60
90
75
4.5 V
8
12
18
15
6V
6
10
15
13
UNIT
ns
ns
ns
ns
switching characteristics over recommended operating free-air temperature range, CL = 150 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
tpd
ten
tt
FROM
(INPUT)
A
OE
TA = 25°C
MIN
TYP
MAX
SN54HC365
SN74HC365
TO
(OUTPUT)
VCC
2V
70
120
180
150
Y
4.5 V
17
24
36
30
6V
14
20
31
25
2V
140
230
345
285
4.5 V
30
46
69
57
6V
28
39
59
48
2V
45
210
315
265
4.5 V
17
42
63
53
6V
13
36
53
45
Y
Any
MIN
MAX
MIN
MAX
UNIT
ns
ns
ns
operating characteristics, TA = 25°C
PARAMETER
Cpd
4
TEST CONDITIONS
Power dissipation capacitance per buffer/driver
POST OFFICE BOX 655303
No load
• DALLAS, TEXAS 75265
TYP
35
UNIT
pF
SCLS308D − JANUARY 1996 − REVISED OCTOBER 2003
PARAMETER MEASUREMENT INFORMATION
VCC
PARAMETER
Test
Point
From Output
Under Test
S1
ten
RL
CL
(see Note A)
RL
tPZH
tdis
S2
tPZL
tPHZ
tPLZ
1 kΩ
1 kΩ
−−
tpd or tt
LOAD CIRCUIT
CL
S1
S2
50 pF
or
150 pF
Open
Closed
Closed
Open
Open
Closed
Closed
Open
Open
Open
50 pF
50 pF
or
150 pF
VCC
Input
50%
50%
0V
tPLH
In-Phase
Output
50%
10%
tPHL
90%
VOH
50%
10% V
OL
tf
90%
tr
tPHL
Out-of-Phase
Output
90%
tPLH
50%
10%
50%
10%
90%
VOH
VOL
tf
tr
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
Output
Control
(Low-Level
Enabling)
VCC
50%
50%
0V
tPZL
Output
Waveform 1
(See Note B)
tPLZ
10%
tPZH
Input
50%
10%
90%
VCC
90%
50%
10% 0 V
tr
Output
Waveform 2
(See Note B)
≈VCC
≈VCC
50%
VOL
tPHZ
50%
90%
VOH
≈0 V
tf
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
NOTES: A. CL includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. tPLH and tPHL are the same as tpd.
F. tPLZ and tPHZ are the same as tdis.
G. tPZL and tPZH are the same as ten.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
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5
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
8500101EA
ACTIVE
CDIP
J
16
1
TBD
A42
N / A for Pkg Type
-55 to 125
8500101EA
SNJ54HC365J
JM38510/65706BEA
ACTIVE
CDIP
J
16
1
TBD
A42
N / A for Pkg Type
-55 to 125
JM38510/
65706BEA
M38510/65706BEA
ACTIVE
CDIP
J
16
1
TBD
A42
N / A for Pkg Type
-55 to 125
JM38510/
65706BEA
SN54HC365J
ACTIVE
CDIP
J
16
1
TBD
A42
N / A for Pkg Type
-55 to 125
SN54HC365J
SN74HC365D
ACTIVE
SOIC
D
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC365
SN74HC365DR
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC365
SN74HC365DRE4
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC365
SN74HC365N
ACTIVE
PDIP
N
16
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
-40 to 85
SN74HC365N
SN74HC365NE4
ACTIVE
PDIP
N
16
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
-40 to 85
SN74HC365N
SN74HC365NSR
ACTIVE
SO
NS
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC365
SN74HC365PW
ACTIVE
TSSOP
PW
16
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC365
SN74HC365PWR
ACTIVE
TSSOP
PW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC365
SN74HC365PWT
ACTIVE
TSSOP
PW
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC365
SN74HC365PWTE4
ACTIVE
TSSOP
PW
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC365
SNJ54HC365J
ACTIVE
CDIP
J
16
1
TBD
A42
N / A for Pkg Type
-55 to 125
8500101EA
SNJ54HC365J
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
