SN54HC368, SN74HC368
SCLS310F – JANUARY 1996 – REVISED JUNE 2022
SNx4HC368 Hex Inverting Buffers and Line Drivers With 3-State Outputs
1 Features
2 Description
•
•
These hex inverting buffers and line drivers are
designed specifically to improve both the performance
and density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and transmitters.
The ’HC368 devices are organized as dual 4-line and
2-line buffers/drivers with active-low output-enable
(1OE and 2OE) inputs. When OE is low, the device
passes inverted data from the A inputs to the Y
outputs. When OE is high, the outputs are in the highimpedance state.
•
•
•
•
•
Wide operating voltage range of 2 V to 6 V
High-Current 3-State outputs drive bus lines, buffer
memory address registers, or drive up to 15
LSTTL loads
Inverting outputs
Low power consumption, 80-µA max ICC
Typical tpd = 10 ns
±6-mA output drive at 5 V
Low input current of 1 μA max
Device Information
(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN54HC368J
CDIP (16)
24.38 mm × 6.92 mm
SN74HC368D
SOIC (16)
9.90 mm × 3.90 mm
SN74HC368N
PDIP (16)
19.31 mm × 6.35 mm
SN74HC368NS
SO (16)
6.20 mm × 5.30 mm
SN74HC368PW
TSSOP (16)
5.00 mm × 4.40 mm
SN54HC368FK
LCCC (20)
8.89 mm × 8.45 mm
(1)
For all available packages, see the orderable addendum at
the end of the data sheet.
Functional Block Diagram
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN54HC368, SN74HC368
www.ti.com
SCLS310F – JANUARY 1996 – REVISED JUNE 2022
Table of Contents
1 Features............................................................................1
2 Description.......................................................................1
3 Revision History.............................................................. 2
4 Pin Configuration and Functions...................................3
5 Specifications.................................................................. 4
5.1 Absolute Maximum Ratings........................................ 4
(1)
5.2 Recommended Operating Conditions ..................... 4
5.3 Thermal Information....................................................4
5.4 Electrical Characteristics.............................................6
5.5 Switching Characteristics ...........................................6
5.6 Operating Characteristics........................................... 7
6 Parameter Measurement Information............................ 8
7 Detailed Description........................................................9
7.1 Overview..................................................................... 9
7.2 Functional Block Diagram........................................... 9
7.3 Device Functional Modes............................................9
8 Power Supply Recommendations................................10
9 Layout.............................................................................10
9.1 Layout Guidelines..................................................... 10
10 Device and Documentation Support..........................11
10.1 Documentation Support.......................................... 11
10.2 Receiving Notification of Documentation Updates.. 11
10.3 Support Resources................................................. 11
10.4 Trademarks............................................................. 11
10.5 Electrostatic Discharge Caution.............................. 11
10.6 Glossary.................................................................. 11
11 Mechanical, Packaging, and Orderable
Information.................................................................... 11
3 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (February 2022) to Revision F (June 2022)
Page
• Junction-to-ambient thermal resistance values increased. D was 73 is now 117.2, N was 67 is now 68.6, NS
was 64 is now 87.4, PW was 108 is now 137.5..................................................................................................4
Changes from Revision D (October 2003) to Revision E (February 2022)
Page
• Updated the numbering, formatting, tables, figures, and cross-references throughout the doucment to reflect
modern data sheet standards............................................................................................................................. 1
2
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SCLS310F – JANUARY 1996 – REVISED JUNE 2022
4 Pin Configuration and Functions
J, D, N, NS, PW package
16-Pin CDIP, SOIC, PDIP, SO, TSSOP
Top View
FK package
20-Pin LCCC
Top View
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SCLS310F – JANUARY 1996 – REVISED JUNE 2022
5 Specifications
5.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
VCC
Supply voltage range
(2)
IIK
Input clamp current
IOK
Output clamp current
IO
Continuous output current
(2)
MIN
MAX
-0.5
7
Junction temperature
Tstg
Storage temperature
(1)
(2)
V
(VI < 0 or VI > VCC)
±20
mA
(VO < 0 or VO > VCC)
±20
mA
(VO = 0 to VCC)
±25
mA
±50
mA
150
°C
150
°C
Continuous current through VCC or GND
TJ
UNIT
-65
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
(1)
5.2 Recommended Operating Conditions
SN54HC368
VCC
Supply voltage
VCC = 2 V
VIH
VCC = 4.5 V
High-level input voltage
VCC = 6 V
NOM
MAX
2
5
6
Low-level input voltage
VI
Input voltage
VO
Output voltage
(1)
2
5
6
3.15
4.2
4.2
0
0.5
0.5
1.35
0
VCC
0
V
VCC
V
VCC = 4.5 V
500
500
VCC = 6 V
400
400
125
V
VCC
1000
– 55
V
1.8
VCC
1000
Operating free-air temperature
UNIT
V
1.35
1.8
0
VCC = 2 V
TA
MAX
3.15
VCC = 4.5 V
Input transition rise/fall time
NOM
1.5
VCC = 6 V
tt
MIN
1.5
VCC = 2 V
VIL
SN74HC368
MIN
– 40
85
ns
°C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report
Implications of Slow or Floating SMOS Inputs, literature number SCBA004.
5.3 Thermal Information
THERMAL METRIC
4
D (SOIC)
N (PDIP)
NS (SO)
PW (TSSOP)
16 PINS
16 PINS
16 PINS
16 PINS
UNIT
RθJA
Junction-to-ambient thermal
(1)
resistance
117.2
68.6
87.4
137.5
°C/W
RθJC(top)
Junction-to-case (top) thermal
resistance
77.2
61.1
44.9
75.3
°C/W
RθJB
Junction-to-board thermal
resistance
75.6
48.6
49.6
82.2
°C/W
ψJT
Junction-to-top characterization
parameter
38.1
33.9
12.2
25.1
°C/W
ψJB
Junction-to-board characterization
parameter
75.3
48.4
49.2
81.8
°C/W
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SCLS310F – JANUARY 1996 – REVISED JUNE 2022
5.3 Thermal Information (continued)
THERMAL METRIC
RθJC(bot)
(1)
Junction-to-case (bottom) thermal
resistance
D (SOIC)
N (PDIP)
NS (SO)
PW (TSSOP)
16 PINS
16 PINS
16 PINS
16 PINS
UNIT
N/A
N/A
N/A
N/A
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application
report.
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SCLS310F – JANUARY 1996 – REVISED JUNE 2022
5.4 Electrical Characteristics
Over recommended operating free-air temperature range (unless otherwise noted)
TEST CONDITIONS
PARAMETER
VCC (V)
IOH = – 20 μA
VOH
MAX
MIN
SN74HC368
TYP
2
1.9
1.998
1.9
1.9
4.5
4.4
4.499
4.4
4.4
6
5.9
5.999
5.9
5.9
4.5
3.98
4.3
3.7
3.84
6
5.48
5.8
5.2
5.34
IOH = – 7.8 mA
VOL
SN74HC368
MIN
VI = VIH or VIL
IOH - 6 mA
TA = 25°C
MAX
MIN
MAX
V
2
0.002
0.1
0.1
0.1
IOL = 20 μA
4.5
0.001
0.1
0.1
0.1
6
0.001
0.1
0.1
0.1
IOL = 6 mA
4.5
0.17
0.26
0.4
0.33
6
0.17
0.26
0.4
0.33
VI = VIH or VIL
IOL = 7.8 mA
UNIT
V
II
VI = VCC or 0
6
±0.1
±100
±1000
±1000
nA
IOZ
VO = VCC or 0
6
±0.01
±0.5
±10
±5
μA
ICC
VI = VCC or 0, IO = 0
8
160
80
μA
3
10
10
10
pF
6
Ci
2 to 6
5.5 Switching Characteristics
Over recommended operating free-air temperature range, CL = 50 pF. See Parameter Measurement Information
PARAMETER
tpd
ten
tdis
FROM
(INPUT)
A
OE
OE
tt
6
TO
(OUTPUT)
Y
Y
Y
Any
VCC (V)
TA = 25°C
MIN
SN54HC368
MIN
SN74HC368
TYP
MAX
2
50
95
MAX
145
MIN
MAX
120
4.5
12
19
29
24
6
10
16
25
20
2
100
190
285
238
4.5
26
38
57
48
6
21
32
48
41
2
50
175
265
240
4.5
21
35
53
48
6
19
30
45
41
2
28
60
90
75
4.5
8
12
18
15
6
6
10
15
13
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ns
ns
ns
ns
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SCLS310F – JANUARY 1996 – REVISED JUNE 2022
5.5 Switching Characteristics
Over recommended operating free-air temperature range, CL = 150 pF. See Parameter Measurement Information
PARAMETER
tpd
ten
tt
FROM
(INPUT)
TO
(OUTPUT)
VCC (V)
A
Y
OE
Y
Any
TA = 25°C
MIN
SN54HC368
MIN
SN74HC368
TYP
MAX
MAX
MIN
MAX
2
70
120
180
150
4.5
17
24
36
30
6
14
20
31
25
2
140
1230
345
285
4.5
30
46
69
57
6
28
39
59
48
2
45
210
315
265
4.5
17
42
63
53
6
13
36
53
45
ns
ns
ns
5.6 Operating Characteristics
TA = 25°C
Cpd
Power dissipation capacitance per buffer/driver
Test Conditions
TYP
UNIT
No load
35
pF
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SCLS310F – JANUARY 1996 – REVISED JUNE 2022
6 Parameter Measurement Information
tpd is the maximum between tPLH and tPHL
tt is the maximum between tTLH and tTHL
Figure 6-1.
Figure 6-2. Voltage Waveforms
Propagation Delay and Output Transitions Times
Figure 6-3. Voltage Waveforms
Enable and Disable Times for 3-State Outputs
Figure 6-4. Voltage Waveform
Input Rise and Fall Times
A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when diabled by the
output control.
Waveform 2 is for an output with internal conditions such that the output is high except when diabled by the
output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators
having the following charactersitics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
8
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SCLS310F – JANUARY 1996 – REVISED JUNE 2022
7 Detailed Description
7.1 Overview
These hex inverting buffers and line drivers are designed specifically to improve both the performance
and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The ’HC368 devices are organized as dual 4-line and 2-line buffers/drivers with active-low output-enable (1OE
and 2OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE
is high, the outputs are in the high-impedance state.
7.2 Functional Block Diagram
Figure 7-1. Functional Block Diagram
7.3 Device Functional Modes
Function Table
(Each buffer/driver)
INPUTS
OE
A
OUTPUT
Y
H
X
Z
L
H
L
L
L
H
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SCLS310F – JANUARY 1996 – REVISED JUNE 2022
www.ti.com
8 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in the
Recommended Operating Conditions. Each VCC terminal should have a good bypass capacitor to prevent power
disturbance. A 0.1-μF capacitor is recommended for this device. It is acceptable to parallel multiple bypass caps
to reject different frequencies of noise. The 0.1-μF and 1-μF capacitors are commonly used in parallel. The
bypass capacitor should be installed as close to the power terminal as possible for best results.
9 Layout
9.1 Layout Guidelines
When using multiple-input and multiple-channel logic devices inputs must not ever be left floating. In many
cases, functions or parts of functions of digital logic devices are unused; for example, when only two inputs of a
triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such unused input pins must not be left
unconnected because the undefined voltages at the outside connections result in undefined operational states.
All unused inputs of digital logic devices must be connected to a logic high or logic low voltage, as defined by the
input voltage specifications, to prevent them from floating. The logic level that must be applied to any particular
unused input depends on the function of the device. Generally, the inputs are tied to GND or VCC, whichever
makes more sense for the logic function or is more convenient.
10
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SCLS310F – JANUARY 1996 – REVISED JUNE 2022
10 Device and Documentation Support
TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device,
generate code, and develop solutions are listed below.
10.1 Documentation Support
10.1.1 Related Documentation
10.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
10.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
10.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
10.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
10.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
11 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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11
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
5962-86812012A
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
596286812012A
SNJ54HC
368FK
5962-8681201EA
ACTIVE
CDIP
J
16
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-8681201EA
SNJ54HC368J
Samples
JM38510/65709BEA
ACTIVE
CDIP
J
16
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
JM38510/
65709BEA
Samples
M38510/65709BEA
ACTIVE
CDIP
J
16
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
JM38510/
65709BEA
Samples
SN54HC368J
ACTIVE
CDIP
J
16
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
SN54HC368J
Samples
SN74HC368D
ACTIVE
SOIC
D
16
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC368
Samples
SN74HC368DR
ACTIVE
SOIC
D
16
2500
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 85
HC368
Samples
SN74HC368N
ACTIVE
PDIP
N
16
25
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 85
SN74HC368N
Samples
SN74HC368NE4
ACTIVE
PDIP
N
16
25
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 85
SN74HC368N
Samples
SN74HC368NSR
ACTIVE
SO
NS
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC368
Samples
SN74HC368PW
ACTIVE
TSSOP
PW
16
90
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC368
Samples
SN74HC368PWR
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC368
Samples
SNJ54HC368FK
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
596286812012A
SNJ54HC
368FK
SNJ54HC368J
ACTIVE
CDIP
J
16
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-8681201EA
SNJ54HC368J
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
Addendum-Page 1
Samples
Samples
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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