SN74HC4040DT

SN54HC4040, SN74HC4040 SCLS160E – DECEMBER 1982 – REVISED MARCH 2022 SNx4HC4040 12-Bit Asynchronous Binary Counters 1 Features 2 Description • • • • • • The ’HC4040 devices are 12-stage asynchronous binary counters, with the outputs of all stages available externally. A high level at the clear (CLR) input asynchronously clears the counter and resets all outputs low. The count is advanced on a high-tolow transition at the clock (CLK) input. Applications include time-delay circuits, counter controls, and frequency-dividing circuits. Wide operating voltage range of 2 V to 6 V Outputs can drive up to 10 LSTTL loads Low power consumption, 80-µA max ICC Typical tpd = 12 ns ±4-mA output drive at 5 V Low input current of 1 µA max Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) SN74HC4040D SOIC (16) 9.90 mm × 3.90 mm SN74HC4040N PDIP (16) 19.31 mm × 6.35 mm SN74HC4040NS SO (16) 6.20 mm × 5.30 mm SN74HC4040PW TSSOP (16) 5.00 mm × 4.40 mm SN54HC4040J CDIP (16) 24.38 mm × 6.92 mm SNJ54HC4040FK LCCC (20) 8.89 mm × 8.45 mm SNJ54HC4040W CFP (16) 10.16 mm × 6.73 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Functional Block Diagram An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN54HC4040, SN74HC4040 www.ti.com SCLS160E – DECEMBER 1982 – REVISED MARCH 2022 Table of Contents 1 Features............................................................................1 2 Description.......................................................................1 3 Revision History.............................................................. 2 4 Pin Configuration and Functions...................................3 5 Specifications.................................................................. 4 5.1 Absolute Maximum Ratings........................................ 4 (1) 5.2 Recommended Operating Conditions ..................... 4 5.3 Thermal Information....................................................4 5.4 Electrical Characteristics.............................................5 5.5 Timing Characteristics.................................................5 5.6 Switching Characteristics ...........................................6 5.7 Operating Characteristics........................................... 6 6 Parameter Measurement Information............................ 7 7 Detailed Description........................................................8 7.1 Overview..................................................................... 8 7.2 Functional Block Diagram........................................... 8 7.3 Device Functional Modes............................................8 8 Power Supply Recommendations..................................9 9 Layout...............................................................................9 9.1 Layout Guidelines....................................................... 9 10 Device and Documentation Support..........................10 10.1 Documentation Support.......................................... 10 10.2 Receiving Notification of Documentation Updates..10 10.3 Support Resources................................................. 10 10.4 Trademarks............................................................. 10 10.5 Electrostatic Discharge Caution..............................10 10.6 Glossary..................................................................10 11 Mechanical, Packaging, and Orderable Information.................................................................... 10 3 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision D (September 2003) to Revision E (March 2022) Page • Updated the numbering, formatting, tables, figures, and cross-references throughout the doucment to reflect modern data sheet standards............................................................................................................................. 1 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC4040 SN74HC4040 SN54HC4040, SN74HC4040 www.ti.com SCLS160E – DECEMBER 1982 – REVISED MARCH 2022 4 Pin Configuration and Functions J, W, D, DB, N, NS, or PW Package 16-Pin CDIP, CFP, SOIC, SSOP, PDIP, SO, or TSSOP Top View FK Package 20-Pin LCCC Top View Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC4040 SN74HC4040 3 SN54HC4040, SN74HC4040 www.ti.com SCLS160E – DECEMBER 1982 – REVISED MARCH 2022 5 Specifications 5.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) VCC Supply voltage range (2) IIK Input clamp current IOK Output clamp current IO Continuous output current (2) MIN MAX -0.5 7 Junction temperature Tstg Storage temperature (1) (2) V (VI < 0 or VI > VCC) ±20 mA (VO < 0 or VO > VCC) ±20 mA (VO = 0 to VCC) ±25 mA ±50 mA 150 °C 150 °C Continuous current through VCC or GND TJ UNIT -65 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. (1) 5.2 Recommended Operating Conditions SN54HC4040 VCC Supply voltage VCC = 2 V VIH High-level input voltage VCC = 4.5 V VCC = 6 V NOM MAX 2 5 6 Low-level input voltage VI Input voltage VO Output voltage TA (1) MAX 2 5 6 3.15 3.15 4.2 4.2 VCC = 4.5 V 0 0.5 0.5 1.35 1.35 0 VCC 0 V VCC V VCC = 4.5 V 500 500 VCC = 6 V 400 400 125 V VCC 1000 -55 V 1.8 VCC 1000 Operating free-air temperature UNIT V 1.8 0 VCC = 2 V Input transition rise/fall time NOM 1.5 VCC = 6 V tt MIN 1.5 VCC = 2 V VIL SN74HC4040 MIN -40 85 ns °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating SMOS Inputs, literature number SCBA004. 5.3 Thermal Information THERMAL METRIC RθJA (1) 4 Junction-to-ambient thermal resistance(1) D (SOIC) DB (SSOP) N (PDIP) NS (SO) PW (TSSOP) 16 PINS 16 PINS 16 PINS 16 PINS 16 PINS UNIT 73 82 67 64 108 °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application report. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC4040 SN74HC4040 SN54HC4040, SN74HC4040 www.ti.com SCLS160E – DECEMBER 1982 – REVISED MARCH 2022 5.4 Electrical Characteristics over recommended operating free-air temperature range (unelss otherwise noted) PARAMETER TEST CONDITIONS(1) IOH = – 20 μA VOH High-level output voltage IOH = – 4 mA IOH = – 5.2 mA VOL SN54HC4040 SN74HC4040 MIN TYP 2 1.9 1.998 1.9 1.9 4.5 4.4 4.499 4.4 4.4 6 5.9 5.999 5.9 5.9 4.5 3.98 4.3 3.7 3.84 6 5.48 5.8 5.2 5.34 MAX MIN MAX MIN MAX UNIT V 2 0.002 0.1 0.1 0.1 IOL = 20 μA 4.5 0.001 0.1 0.1 0.1 6 0.001 0.1 0.1 0.1 IOL = 4 mA 4.5 0.17 0.26 0.4 0.33 IOL = 5.2 mA 6 0.15 0.26 0.4 0.33 ±0.1 ±100 ±1000 ±1000 nA 8 160 80 μA 10 10 10 pF Low-level output voltage II Input hold current VI = VCC or 0 6 ICC Supply current VI = VCC or 0. IO = 0 6 Ci Input capacitance (1) TA = 25°C VCC (V) 2 to 6 3 V VI = VIH or VIL, unless otherwise noted. 5.5 Timing Characteristics over recommended operating free-air temperature range (unless otherwise noted) VCC (V) fCLK Clock frequency CLK high or low tW Pulse duration CLR high tsu Setup time, CLR inactive before CLK↓ TA = 25°C MIN SN54HC4040 MAX MIN SN74HC4040 MAX MIN MAX 2 5.5 3.7 4.3 4.5 28 19 22 6 33 22 25 2 90 135 115 4.5 18 27 23 6 15 23 20 2 70 105 90 4.5 14 21 18 6 12 18 15 2 60 90 75 4.5 12 18 15 6 10 15 13 UNIT MHz ns ns Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC4040 SN74HC4040 5 SN54HC4040, SN74HC4040 www.ti.com SCLS160E – DECEMBER 1982 – REVISED MARCH 2022 5.6 Switching Characteristics CL = 50 pF. See Parameter Measurement Information PARAMETER FROM (INPUT) TO (OUTPUT) fmax tpd CLK tPHL QA CLR Any tt Any VCC (V) TA = 25°C SN54HC4040 MAX MIN SN74HC4040 MIN TYP MAX MIN 2 5.5 10 3.7 4.3 4.5 28 45 19 22 6 33 53 22 25 MAX UNIT ns 2 62 150 225 190 4.5 16 30 45 38 6 12 26 38 32 2 63 140 210 175 4.5 17 28 42 35 6 13 24 36 30 2 28 75 110 95 4.5 8 15 22 19 6 6 13 19 16 ns ns ns 5.7 Operating Characteristics TA = 25°C PARAMETER Cpd 6 Power dissipation capacitance TEST CONDITIONS TYP UNIT No load 88 pF Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC4040 SN74HC4040 SN54HC4040, SN74HC4040 www.ti.com SCLS160E – DECEMBER 1982 – REVISED MARCH 2022 6 Parameter Measurement Information Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tt < 6 ns. For clock inputs, fmax is measured when the input duty cycle is 50%. The outputs are measured one at a time with one input transition per measurement. Test Point From Output Under Test CL(1) (1) CL includes probe and test-fixture capacitance. Figure 6-1. Load Circuit for Push-Pull Outputs tw VCC Clock Input VCC Input 50% 50% 50% 0V 0V Figure 6-2. Voltage Waveforms, Standard CMOS Inputs Pulse Duration th tsu VCC Data Input 50% 50% 0V Figure 6-3. Voltage Waveforms, Standard CMOS Inputs Setup and Hold Times VCC Input 50% 90% Input 50% (1) tPHL 10% 10% 0V tPLH tr(1) (1) VOH Output 50% VOL (1) tPLH 50% 90% VOH 90% 10% 50% 10% tr(1) (1) VOH Output 0V tf(1) Output 50% tPHL VCC 90% tf(1) VOL (1) The greater between tr and tf is the same as tt. Figure 6-5. Voltage Waveforms, Input and Output Transition Times for Standard CMOS Inputs VOL (1) The greater between tPLH and tPHL is the same as tpd. Figure 6-4. Voltage Waveforms, Propagation Delays for Standard CMOS Inputs Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC4040 SN74HC4040 7 SN54HC4040, SN74HC4040 www.ti.com SCLS160E – DECEMBER 1982 – REVISED MARCH 2022 7 Detailed Description 7.1 Overview The ’HC4040 devices are 12-stage asynchronous binary counters, with the outputs of all stages available externally. A high level at the clear (CLR) input asynchronously clears the counter and resets all outputs low. The count is advanced on a high-to-low transition at the clock (CLK) input. Applications include time-delay circuits, counter controls, and frequency-dividing circuits. 7.2 Functional Block Diagram 7.3 Device Functional Modes Function Table (each buffer) INPUTS 8 FUNCTION CLK CLR ↑ L No change ↓ L Advance to next stage X H All outputs L Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC4040 SN74HC4040 SN54HC4040, SN74HC4040 www.ti.com SCLS160E – DECEMBER 1982 – REVISED MARCH 2022 8 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in the Recommended Operating Conditions. Each VCC terminal should have a good bypass capacitor to prevent power disturbance. A 0.1-μF capacitor is recommended for this device. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. The 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor should be installed as close to the power terminal as possible for best results. 9 Layout 9.1 Layout Guidelines When using multiple-input and multiple-channel logic devices inputs must not ever be left floating. In many cases, functions or parts of functions of digital logic devices are unused; for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such unused input pins must not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. All unused inputs of digital logic devices must be connected to a logic high or logic low voltage, as defined by the input voltage specifications, to prevent them from floating. The logic level that must be applied to any particular unused input depends on the function of the device. Generally, the inputs are tied to GND or VCC, whichever makes more sense for the logic function or is more convenient. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC4040 SN74HC4040 9 SN54HC4040, SN74HC4040 www.ti.com SCLS160E – DECEMBER 1982 – REVISED MARCH 2022 10 Device and Documentation Support TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device, generate code, and develop solutions are listed below. 10.1 Documentation Support 10.1.1 Related Documentation 10.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 10.3 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 10.4 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 10.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 10.6 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 11 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 10 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC4040 SN74HC4040 PACKAGE OPTION ADDENDUM www.ti.com 29-Nov-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 85004012A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 85004012A SNJ54HC 4040FK 8500401EA ACTIVE CDIP J 16 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8500401EA SNJ54HC4040J Samples 8500401FA ACTIVE CFP W 16 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8500401FA SNJ54HC4040W Samples SN54HC4040J ACTIVE CDIP J 16 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SN54HC4040J Samples SN74HC4040D ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC4040 Samples SN74HC4040DBR ACTIVE SSOP DB 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC4040 Samples SN74HC4040DR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC4040 Samples SN74HC4040DT ACTIVE SOIC D 16 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC4040 Samples SN74HC4040N ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74HC4040N Samples SN74HC4040NE4 ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74HC4040N Samples SN74HC4040NSR ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC4040 Samples SN74HC4040PW ACTIVE TSSOP PW 16 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC4040 Samples SN74HC4040PWG4 ACTIVE TSSOP PW 16 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC4040 Samples SN74HC4040PWR ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC4040 Samples SN74HC4040PWRE4 ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC4040 Samples SN74HC4040PWT ACTIVE TSSOP PW 16 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC4040 Samples SNJ54HC4040FK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 85004012A SNJ54HC 4040FK SNJ54HC4040J ACTIVE CDIP J 16 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8500401EA SNJ54HC4040J Addendum-Page 1 Samples Samples Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 29-Nov-2022 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) (3) Device Marking Samples (4/5) (6) SNJ54HC4040W ACTIVE CFP W 16 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8500401FA SNJ54HC4040W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of