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SN54HC541, SN74HC541
SCLS305D – JANUARY 1996 – REVISED SEPTEMBER 2016
SNx4HC541 Octal Buffers and Line Drivers With 3-State Outputs
1 Features
3 Description
•
•
These octal buffers and line drivers feature the
performance of the SNx4HC541 devices and a pinout
with inputs and outputs on opposite sides of the
package. This arrangement greatly facilitates printed
circuit board layout.
1
•
•
•
•
•
Wide Operating Voltage Range of 2 V to 6 V
High-Current 3-State Outputs Drive Bus Lines
Directly or Up to 15 LSTTL Loads
Low Power Consumption, 80-µA Maximum ICC
Typical tpd = 10 ns
±6-mA Output Drive at 5 V
Low Input Current of 1 µA Maximum
Data Flow-Through Pinout (All Inputs on Opposite
Side From Outputs)
Device Information(1)
2 Applications
•
•
•
•
•
The 3-state outputs are controlled by a two-input
NOR gate. If either output-enable (OE1 or OE2) input
is high, all eight outputs are in the high-impedance
state. The SNx4HC541 devices provide true data at
the outputs.
PART NUMBER
LEDs
Servers
PCs and Notebooks
Wearable Health and Wellness Devices
Electronic Points of Sale
PACKAGE
BODY SIZE (NOM)
SN74HC541DW
SOIC (20)
12.80 mm × 7.50 mm
SN74HC541DB
SSOP (20)
7.20 mm × 5.30 mm
SN74HC541N
PDIP (20)
24.33 mm × 6.35 mm
SN74HC541NS
SO (20)
12.60 mm × 5.30 mm
SN74HC541PW
TSSOP (20)
6.50 mm × 4.40 mm
SN54HC541J
CDIP (20)
24.20 mm × 6.92 mm
SN54HC541FK
LCCC (20)
8.89 mm × 8.89 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Diagram (Positive Logic)
1
OE1
OE2
A1
19
2
18
Y1
To Seven Other Channels
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
On products compliant to MIL-PRF-38535, all parameters are
tested unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54HC541, SN74HC541
SCLS305D – JANUARY 1996 – REVISED SEPTEMBER 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
4
4
4
5
5
5
6
6
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics, TA = 25°C ........................
Electrical Characteristics, SN54HC541 ....................
Electrical Characteristics, SN74HC541 ....................
Switching Characteristics, CL = 50 pF, TA = 25°C ....
Switching Characteristics, CL = 50 pF, SN54HC541
Switching Characteristics, CL = 50 pF,
SN74HC541 ...............................................................
6.11 Switching Characteristics, CL = 150 pF, TA = 25°C
6.12 Switching Characteristics, CL = 150 pF,
SN54HC541 ...............................................................
6.13 Switching Characteristics, CL = 150 pF,
SN74HC541 ...............................................................
6.14 Operating Characteristics........................................
4
7
7
7
8
8
6.15 Typical Characteristics ............................................ 8
7
8
Parameter Measurement Information .................. 9
Detailed Description ............................................ 10
8.1
8.2
8.3
8.4
9
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
10
10
10
10
Application and Implementation ........................ 11
9.1 Application Information............................................ 11
9.2 Typical Application .................................................. 11
10 Power Supply Recommendations ..................... 13
11 Layout................................................................... 13
11.1 Layout Guidelines ................................................. 13
11.2 Layout Example .................................................... 13
12 Device and Documentation Support ................. 14
12.1
12.2
12.3
12.4
12.5
12.6
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
14
14
14
14
14
14
13 Mechanical, Packaging, and Orderable
Information ........................................................... 14
Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (August 2003) to Revision D
Page
•
Added Applications section, Thermal Information table, ESD Ratings table, Feature Description section, Device
Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout
section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ..... 1
•
Deleted Ordering Information table, see Mechanical, Packaging, and Orderable Information at the end of the datasheet.. 1
•
Changed RθJA for DB package from 70°C/W: to 90.2°C/W .................................................................................................... 5
•
Changed RθJA for DW package from 58°C/W: to 77.5°C/W ................................................................................................... 5
•
Changed RθJA for N package from 69°C/W: to 45.2°C/W....................................................................................................... 5
•
Changed RθJA for NS package from 60°C/W: to 72.8°C/W .................................................................................................... 5
•
Changed RθJA for PW package from 83°C/W: to 98.3°C/W ................................................................................................... 5
2
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SCLS305D – JANUARY 1996 – REVISED SEPTEMBER 2016
5 Pin Configuration and Functions
DB, DW, N, NS, J, or PW Package
20-Pin SSOP, SOIC, PDIP, SO, CDIP, or TSSOP
Top View
5
16
Y3
A5
6
15
Y4
A6
7
14
Y5
A7
8
13
Y6
A8
9
12
Y7
10
11
Y8
A3
4
18
Y1
A4
5
17
Y2
A5
6
16
Y3
A6
7
15
Y4
A7
8
14
Y5
GND
A8
GND
OE2
A4
19
Y2
13
17
Y6
4
VCC
A3
20
Y1
12
18
Y7
3
OE1
A2
1
OE2
11
19
Y8
2
A1
A1
2
VCC
10
20
A2
1
9
OE1
3
FK Package
20-Pin LCCC
Top View
Not to scale
Not to scale
Pin Functions
PIN
NO.
NAME
I/O
DESCRIPTION
1
OE1
I
Output enable (active low) Both OE must be low to enable outputs
2
A1
I
Channel 1 input
3
A2
I
Channel 2 input
4
A3
I
Channel 3 input
5
A4
I
Channel 4 input
6
A5
I
Channel 5 input
7
A6
I
Channel 6 input
8
A7
I
Channel 7 input
9
A8
I
Channel 8 input
10
GND
—
Ground
11
Y8
O
Channel 8 output
12
Y7
O
Channel 7 output
13
Y6
O
Channel 6 output
14
Y5
O
Channel 5 output
15
Y4
O
Channel 4 output
16
Y3
O
Channel 3 output
17
Y2
O
Channel 2 output
18
Y1
O
Channel 1 output
19
OE2
I
Output enable (active low) both OE must be low to enable outputs
20
VCC
—
Power pin
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SCLS305D – JANUARY 1996 – REVISED SEPTEMBER 2016
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
VCC
Supply voltage
(2)
MIN
MAX
–0.5
7
UNIT
V
IIK
Input clamp current
VI < 0 or VI > VCC
±20
mA
IOK
Output clamp current (2)
VO < 0 or VO > VCC
±20
mA
IO
Continuous output current
VO = 0 to VCC
±35
mA
±70
mA
150
°C
Continuous current through VCC or GND
Tstg
(1)
(2)
Storage temperature
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic
discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
See note (1)
VCC
Supply voltage
VCC = 2 V
VIH
High-level input voltage
MIN
NOM
MAX
2
5
6
UNIT
V
1.5
VCC = 4.5 V
3.15
VCC = 6 V
V
4.2
VCC = 2 V
0.5
VIL
Low-level input voltage
VCC = 4.5 V
1.35
VI
Input voltage
0
VCC
V
VO
Output voltage
0
VCC
V
Δt/Δv
Input transition rise and fall time
VCC = 6 V
1.8
VCC = 2 V
TA
(1)
4
Operating free-air temperature
V
1000
VCC = 4.5 V
500
VCC = 6 V
400
SN54HC541
–55
125
SN74HC541
–40
85
ns
°C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See Implications of Slow or Floating
CMOS Inputs, SCBA004.
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SCLS305D – JANUARY 1996 – REVISED SEPTEMBER 2016
6.4 Thermal Information
SN74HC541
THERMAL METRIC (1)
DB
(SSOP)
DW
(SOIC)
N
(PDIP)
NS
(SO)
PW
(TSSOP)
UNIT
20 PINS
20 PINS
20 PINS
20 PINS
20 PINS
RθJA
Junction-to-ambient thermal resistance (2)
90.2
77.5
45.2
72.8
98.3
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
51.7
42.9
31.3
39.1
33.5
°C/W
RθJB
Junction-to-board thermal resistance
45.3
45.4
26.1
40.3
49.2
°C/W
ψJT
Junction-to-top characterization parameter
17.7
16.9
16.8
15.9
2.1
°C/W
ψJB
Junction-to-board characterization parameter
44.9
44.9
26.0
39.9
48.7
°C/W
(1)
(2)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
The package thermal impedance is calculated in accordance with JESD 51-7.
6.5 Electrical Characteristics, TA = 25°C
over operating free-air temperature range (unless otherwise noted)
PARAMETER
VOH
TEST CONDITIONS
VCC
MIN
TYP
2V
1.9
1.998
IOH = –20 µA
4.5 V
4.4
4.499
6V
5.9
5.999
IOH = –6 mA
4.5 V
3.98
4.3
6V
5.48
5.8
VI = VIH or VIL
IOH = –7.8 mA
IOL = 20 µA
VOL
VI = VIH or VIL
IOL = 6 mA
IOL = 7.8 mA
MAX
UNIT
V
2V
0.002
0.1
4.5 V
0.001
0.1
6V
0.001
0.1
4.5 V
0.17
0.26
6V
0.15
0.26
V
II
VI = VCC or 0
6V
±0.1
±100
nA
IOZ
VO = VCC or 0
6V
±0.01
±0.5
µA
ICC
VI = VCC or 0, IO = 0
6V
Ci
2 V to 6 V
8
µA
3
10
pF
TYP
MAX
6.6 Electrical Characteristics, SN54HC541
over operating free-air temperature range (unless otherwise noted)
PARAMETER
VOH
TEST CONDITIONS
VCC
MIN
2V
1.9
IOH = –20 µA
4.5 V
4.4
6V
5.9
IOH = –6 mA
4.5 V
3.7
6V
5.2
VI = VIH or VIL
IOH = –7.8 mA
IOL = 20 µA
VOL
VI = VIH or VIL
IOL = 6 mA
IOL = 7.8 mA
UNIT
V
2V
0.1
4.5 V
0.1
6V
0.1
4.5 V
0.4
V
6V
0.4
II
VI = VCC or 0
6V
±1000
nA
IOZ
VO = VCC or 0
6V
±10
µA
ICC
VI = VCC or 0, IO = 0
6V
160
µA
2 V to 6 V
10
pF
Ci
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6.7 Electrical Characteristics, SN74HC541
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –20 µA
VOH
VI = VIH or VIL
IOH = –6 mA
IOH = –7.8 mA
VOL
VCC
MIN
2V
1.9
4.5 V
4.4
6V
5.9
4.5 V
3.84
6V
5.34
TYP
MAX
V
2V
0.1
IOL = 20 µA
4.5 V
0.1
6V
0.1
IOL = 6 mA
4.5 V
0.33
6V
0.33
VI = VIH or VIL
IOL = 7.8 mA
UNIT
V
II
VI = VCC or 0
6V
±1000
nA
IOZ
VO = VCC or 0
6V
±5
µA
ICC
VI = VCC or 0, IO = 0
6V
80
µA
2 V to 6 V
10
pF
Ci
6.8 Switching Characteristics, CL = 50 pF, TA = 25°C
over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 3)
PARAMETER
tpd
ten
FROM
(INPUT)
TO
(OUTPUT)
VCC
A
Y
OE
tdis
OE
tt
Y
Y
Y
MIN
TYP
MAX
2V
40
115
4.5 V
12
23
6V
10
20
2V
80
150
4.5 V
17
30
6V
15
26
2V
40
150
4.5 V
18
30
6V
17
26
2V
28
60
4.5 V
8
12
6V
6
10
UNIT
ns
ns
ns
ns
6.9 Switching Characteristics, CL = 50 pF, SN54HC541
over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 3)
PARAMETER
tpd
ten
tdis
6
FROM
(INPUT)
A
OE
OE
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TO
(OUTPUT)
Y
Y
Y
VCC
MIN
TYP
MAX
2V
171
4.5 V
34
6V
29
2V
224
4.5 V
45
6V
38
2V
224
4.5 V
45
6V
38
UNIT
ns
ns
ns
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SCLS305D – JANUARY 1996 – REVISED SEPTEMBER 2016
Switching Characteristics, CL = 50 pF, SN54HC541 (continued)
over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 3)
PARAMETER
FROM
(INPUT)
tt
TO
(OUTPUT)
VCC
2V
90
Y
4.5 V
18
6V
15
MIN
TYP
MAX
UNIT
ns
6.10 Switching Characteristics, CL = 50 pF, SN74HC541
over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 3)
PARAMETER
tpd
ten
FROM
(INPUT)
TO
(OUTPUT)
VCC
2V
144
A
Y
4.5 V
29
OE
tdis
Y
OE
Y
tt
Y
MIN
TYP
MAX
6V
25
2V
188
4.5 V
38
6V
32
2V
188
4.5 V
38
6V
32
2V
75
4.5 V
15
6V
13
UNIT
ns
ns
ns
ns
6.11 Switching Characteristics, CL = 150 pF, TA = 25°C
over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 3)
PARAMETER
tpd
ten
FROM
(INPUT)
TO
(OUTPUT)
VCC
A
Y
OE
Y
tt
Y
MIN
TYP
MAX
2V
65
165
4.5 V
16
33
6V
14
28
2V
100
200
4.5 V
20
40
6V
17
34
2V
45
210
4.5 V
17
42
6V
13
36
UNIT
ns
ns
ns
6.12 Switching Characteristics, CL = 150 pF, SN54HC541
over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 3)
PARAMETER
tpd
ten
FROM
(INPUT)
TO
(OUTPUT)
VCC
2V
246
A
Y
4.5 V
49
OE
Y
MIN
TYP
MAX
6V
42
2V
298
4.5 V
60
6V
51
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UNIT
ns
ns
7
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SCLS305D – JANUARY 1996 – REVISED SEPTEMBER 2016
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Switching Characteristics, CL = 150 pF, SN54HC541 (continued)
over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 3)
FROM
(INPUT)
PARAMETER
TO
(OUTPUT)
VCC
2V
315
Y
4.5 V
63
6V
53
tt
MIN
TYP
MAX
UNIT
ns
6.13 Switching Characteristics, CL = 150 pF, SN74HC541
over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 3)
PARAMETER
tpd
ten
FROM
(INPUT)
TO
(OUTPUT)
VCC
2V
206
A
Y
4.5 V
41
OE
Y
tt
Y
MIN
TYP
MAX
6V
35
2V
250
4.5 V
50
6V
43
2V
265
4.5 V
53
6V
45
UNIT
ns
ns
ns
6.14 Operating Characteristics
TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
TYP
UNIT
No load
35
pF
Power dissipation capacitance per buffer/driver
6.15 Typical Characteristics
80
100
tpd
ten
tdis
tt
70
80
70
50
Time (ns)
Time (ns)
60
40
30
60
50
40
20
30
10
20
0
10
2
2.5
3
3.5
4
4.5
Vcc (Volts)
5
5.5
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6
2
2.5
3
D001
Figure 1. Typical Delay vs. VCC for CL = 50 pF
8
tpd
ten
tt
90
3.5
4
4.5
Vcc (Volts)
5
5.5
6
D001
Figure 2. Typical Delay vs. VCC for CL = 150 pF
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SCLS305D – JANUARY 1996 – REVISED SEPTEMBER 2016
7 Parameter Measurement Information
VCC
PARAMETER
Test
Point
From Output
Under Test
tPZH
S1
1 kΩ
t en
RL
CL
(see Note A)
RL
tPZL
tPHZ
t dis
S2
tPLZ
t pd or t t
1 kΩ
––
LOAD CIRCUIT
CL
S1
S2
50 pF
or
150 pF
Open
Closed
Closed
Open
Open
Closed
Closed
Open
Open
Open
50 pF
50 pF
or
150 pF
VCC
Input
50%
50%
0V
tPLH
In-Phase
Output
50%
10%
tPHL
90%
VOH
50%
10% V
OL
tf
90%
tr
tPHL
Out-of-Phase
Output
90%
tPLH
50%
10%
50%
10%
90%
VOH
VOL
tf
tr
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
Output
Control
(Low-Level
Enabling)
VCC
50%
50%
0V
tPZL
tPLZ
Output
Waveform 1
(See Note B)
10%
tPZH
Input
50%
10%
90%
90%
tr
VCC
50%
10% 0 V
≈VCC
≈VCC
50%
VOL
tPHZ
Output
Waveform 2
(See Note B)
50%
90%
VOH
≈0 V
tf
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
A.
CL includes probe and test-fixture capacitance.
B.
Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output
control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output
control.
C.
Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having
the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
D.
The outputs are measured one at a time with one input transition per measurement.
E.
tPLZ and tPHZ are the same as tdis.
F.
tPZL and tPZH are the same as ten.
G.
tPLH and tPHL are the same as tpd.
Figure 3. Load Circuit and Voltage Waveforms
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8 Detailed Description
8.1 Overview
The SN74HC541 device has 8 inputs and outputs where data from the A inputs go to the Y outputs. The output
enables of the device control whether the information from the A inputs go to the Y outputs. These enable pins
cause the device to go into high Z if either OE1 or OE2 are high. The OEs should be tied to VCC through a pull
up resistor to ensure the high impedance state during power up or power down; the minimum value of the
resistor is determined by the current sinking capability of the driver.
8.2 Functional Block Diagram
1
OE1
OE2
A1
19
2
18
Y1
To Seven Other Channels
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Figure 4. Logic Diagram (Positive Logic)
8.3 Feature Description
The SNx4HC541 has a wide operating voltage range of 2 V to 6 V. The device has multiple enable pins, and the
device pinout enables simple board layout with outputs across from inputs.
8.4 Device Functional Modes
Table 1 lists the functional modes of the SNx4HC541.
Table 1. Function Table (Each Buffer/Driver)
INPUTS
10
OE2
L
L
L
L
L
L
H
H
H
X
X
Hi-Z
X
H
X
Hi-Z
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A
OUTPUT
Y
OE1
Copyright © 1996–2016, Texas Instruments Incorporated
Product Folder Links: SN54HC541 SN74HC541
SN54HC541, SN74HC541
www.ti.com
SCLS305D – JANUARY 1996 – REVISED SEPTEMBER 2016
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
SN74HC541 is a wide range CMOS device that can be used over large voltage ranges. The device can be used
anywhere from 2 to 6 Volts. The device can drive up to 6 mA of current at 5 Volts. This makes it perfect for
driving bus lines directly or up to 15 LSTTL Loads. It can be used to drive anything from micro controllers and
system logic devices to LEDs.
9.2 Typical Application
OE1
VCC
OE2
A1
Microcontroller or
System Logic
A8
Y1
Y8
Microcontroller
System Logic
LEDs
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 5. Typical Application Diagram
9.2.1 Design Requirements
This device uses CMOS technology and has a wide voltage range. Take care to avoid pulling too much current
from the outputs as to not exceed 6 mA. Also, take care to not go over VCC voltage to avoid damage to the
device.
9.2.2 Detailed Design Procedure
1. Recommended Input Conditions
– Rise time and fall time specs: See (Δt/ΔV) in the Recommended Operating Conditions table.
– Specified high and low levels: See (VIH and VIL) in the Recommended Operating Conditions table.
– Inputs should not be pulled above VCC.
2. Recommended Output Conditions
– Load currents should not exceed 6 mA for the part
– Outputs should not be pulled above VCC.
Copyright © 1996–2016, Texas Instruments Incorporated
Product Folder Links: SN54HC541 SN74HC541
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SN54HC541, SN74HC541
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Typical Application (continued)
9.2.3 Application Curve
1000
950
Input Transition Time (ns)
900
850
800
750
700
650
600
550
500
450
400
2
2.5
3
3.5
4
4.5
Vcc (Volts)
5
5.5
6
D001
Figure 6. Input Transition Time vs. VCC
12
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Product Folder Links: SN54HC541 SN74HC541
SN54HC541, SN74HC541
www.ti.com
SCLS305D – JANUARY 1996 – REVISED SEPTEMBER 2016
10 Power Supply Recommendations
The power supply can be any voltage between the MIN and MAX supply voltage rating located in the
Recommended Operating Conditions table.
Each VCC pin should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, 0.1-μF is recommended; if there are multiple VCC pins, then 0.01-μF or 0.022-μF is recommended for
each power pin. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. A 0.1-μF
and a 1-μF are commonly used in parallel. The bypass capacitor should be installed as close to the power pin as
possible for best results.
11 Layout
11.1 Layout Guidelines
When using multiple bit logic devices inputs should never float.
In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two
inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins should not be
left unconnected because the undefined voltages at the outside connections result in undefined operational
states. The Recommended Operating Conditions section specifies the rules that must be observed under all
circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them
from floating. The logic level that should be applied to any particular unused input depends on the function of the
device. Generally they will be tied to GND or VCC whichever makes more sense or is more convenient. It is
generally acceptable to float outputs, unless the part is a transceiver. If the transceiver has an output enable pin,
it disables the output section of the part when asserted. This does not disable the input section of the I/Os, so
they cannot float when disabled.
11.2 Layout Example
Vcc
Input
Unused Input
Output
Unused Input
Output
Input
Figure 7. Layout Diagram
Copyright © 1996–2016, Texas Instruments Incorporated
Product Folder Links: SN54HC541 SN74HC541
Submit Documentation Feedback
13
SN54HC541, SN74HC541
SCLS305D – JANUARY 1996 – REVISED SEPTEMBER 2016
www.ti.com
12 Device and Documentation Support
12.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 2. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
SN54HC541
Click here
Click here
Click here
Click here
Click here
SN74HC541
Click here
Click here
Click here
Click here
Click here
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
14
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Copyright © 1996–2016, Texas Instruments Incorporated
Product Folder Links: SN54HC541 SN74HC541
PACKAGE OPTION ADDENDUM
www.ti.com
6-Feb-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
JM38510/65711BRA
ACTIVE
CDIP
J
20
1
TBD
Call TI
N / A for Pkg Type
-55 to 125
JM38510/
65711BRA
M38510/65711BRA
ACTIVE
CDIP
J
20
1
TBD
Call TI
N / A for Pkg Type
-55 to 125
JM38510/
65711BRA
SN54HC541J
ACTIVE
CDIP
J
20
1
TBD
Call TI
N / A for Pkg Type
-55 to 125
SN54HC541J
SN74HC541DBR
ACTIVE
SSOP
DB
20
2000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC541
SN74HC541DW
ACTIVE
SOIC
DW
20
25
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC541
SN74HC541DWE4
ACTIVE
SOIC
DW
20
25
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC541
SN74HC541DWG4
ACTIVE
SOIC
DW
20
25
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC541
SN74HC541DWR
ACTIVE
SOIC
DW
20
2000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC541
SN74HC541N
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
NIPDAU
N / A for Pkg Type
-40 to 85
SN74HC541N
SN74HC541NE4
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
NIPDAU
N / A for Pkg Type
-40 to 85
SN74HC541N
SN74HC541NSR
ACTIVE
SO
NS
20
2000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC541
SN74HC541PW
ACTIVE
TSSOP
PW
20
70
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC541
SN74HC541PWG4
ACTIVE
TSSOP
PW
20
70
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC541
SN74HC541PWR
ACTIVE
TSSOP
PW
20
2000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC541
SN74HC541PWT
ACTIVE
TSSOP
PW
20
250
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HC541
SNJ54HC541FK
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
SNJ54HC
541FK
SNJ54HC541J
ACTIVE
CDIP
J
20
1
TBD
Call TI
N / A for Pkg Type
-55 to 125
SNJ54HC541J
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
6-Feb-2020
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
