SN74HC682N

SN54HC682, SN74HC682 SCLS018E – MARCH 1984 – REVISED FEBRUARY 2022 SNx4HC682 8-Bit Magnitude Comparators 1 Features 2 Description • • • • • • These magnitude comparators perform comparisons of two 8-bit binary or BCD words. The ’HC682 devices feature 100-kΩ pullup termination resistors on the Q inputs for analog or switch data. Wide operating voltage range of 2 V to 6 V High-current outputs drive up to 10 LSTTL loads Typical tpd = 22 ns ±4-mA output drive at 5 V Compare two 8-bit words 100-kΩ pullup resistors are on the Q inputs Device Information (1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74HC682DW SOIC (20) 12.8 mm × 7.50 mm SN74HC682N PDIP (20) 25.40 mm × 6.35 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN54HC682, SN74HC682 www.ti.com SCLS018E – MARCH 1984 – REVISED FEBRUARY 2022 Table of Contents 1 Features............................................................................1 2 Description.......................................................................1 3 Revision History.............................................................. 2 4 Pin Configuration and Functions...................................3 5 Specifications.................................................................. 4 5.1 Absolute Maximum Ratings........................................ 4 5.2 Recommended Operating Conditions(1) .................... 4 5.3 Thermal Information....................................................4 5.4 Electrical Characteristics.............................................5 5.5 Switching Characteristics ...........................................5 5.6 Operating Characteristics........................................... 5 6 Parameter Measurement Information............................ 6 7 Detailed Description........................................................7 7.1 Overview..................................................................... 7 7.2 Functional Block Diagram........................................... 7 7.3 Device Functional Modes............................................8 8 Power Supply Recommendations..................................9 9 Layout...............................................................................9 9.1 Layout Guidelines....................................................... 9 10 Device and Documentation Support..........................10 10.1 Receiving Notification of Documentation Updates..10 10.2 Support Resources................................................. 10 10.3 Trademarks............................................................. 10 10.4 Electrostatic Discharge Caution..............................10 10.5 Glossary..................................................................10 11 Mechanical, Packaging, and Orderable Information.................................................................... 10 3 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision D (March 2003) to Revision E (February 2022) Page • Updated the numbering, formatting, tables, figures, and cross-references throughout the doucment to reflect modern data sheet standards............................................................................................................................. 1 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC682 SN74HC682 SN54HC682, SN74HC682 www.ti.com SCLS018E – MARCH 1984 – REVISED FEBRUARY 2022 4 Pin Configuration and Functions J, W, DW, or N Package 20-Pin CDIP, CDP, SOIC, PDIP Top VIew FK Package 20-Pin LCCC Top View Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC682 SN74HC682 3 SN54HC682, SN74HC682 www.ti.com SCLS018E – MARCH 1984 – REVISED FEBRUARY 2022 5 Specifications 5.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) VCC Supply voltage range current(2) MIN MAX –0.5 7 UNIT V IIK Input clamp VI < 0 or VI > VCC ±20 mA IOK Output clamp current(2) VO < 0 or VO > VCC ±20 mA IO Continuous output current VO = 0 to VCC ±25 mA ±50 mA 150 ℃ 150 ℃ Continuous current through VCC or GND TJ Junction temperature Tstg Storage temperature range (1) (2) –65 Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 5.2 Recommended Operating Conditions(1) SN54HC682(2) VCC Supply voltage VCC = 2 V VIH High-level input voltage VCC = 4.5 V VCC = 6 V NOM MAX 2 5 6 Low-level input voltage VI Input voltage VO Output voltage TA (1) (2) MAX 2 5 6 3.15 3.15 4.2 4.2 VCC = 4.5 V 0 0.5 0.5 1.35 0 VCC 0 V VCC V VCC = 4.5 V 500 500 VCC = 6 V 400 400 125 V VCC 1000 –55 V 1.8 VCC 1000 Operating free-air temperature UNIT V 1.35 1.8 0 VCC = 2 V Inputt ransition (rise and fall) time NOM 1.5 VCC = 6 V tt MIN 1.5 VCC = 2 V VIL SN74HC682 MIN –40 85 ns °C All unused inputs of the device must be held at VCCor GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. SN54HC682 is in product preview. 5.3 Thermal Information THERMAL METRIC RθJA (1) 4 Junction-to-ambient thermal resistance (1) D (SOIC) N (PDIP) 20 PINS 20 PINS UNIT 58 69 °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application report. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC682 SN74HC682 SN54HC682, SN74HC682 www.ti.com SCLS018E – MARCH 1984 – REVISED FEBRUARY 2022 5.4 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TES TCONDITIONS VCC IOH = –20 μA VOH VI = VIH or VIL IOH = –4 mA IOH = –5.2 mA VOL ICC VI = VCC or 0, MIN MAX MIN 2V 1.9 1.998 1.9 1.9 4.5 V 4.4 4.499 4.4 4.4 6V 5.9 5.999 5.9 5.9 4.5 V 3.98 4.3 3.7 3.84 6V 5.48 5.8 5.2 5.34 MAX UNIT V 0.002 0.1 0.1 0.1 0.001 0.1 0.1 0.1 6V 0.001 0.1 0.1 0.1 IOL = 4 mA 4.5 V 0.17 0.26 0.4 0.33 6V 0.15 0.26 0.4 0.33 V 6V 0.1 100 1000 1000 nA Q inputs 6V –50 –90 –160 –140 μA All other inputs 6V –0.1 –100 –1000 –1000 nA IO = 0 6V 480 700 1300 1100 μA 3 10 10 10 pF Ci (1) TYP 2V VI = VCC VI = 0 MIN 4.5 V VI = VIH or VIL IIL MAX SN74HC682 IOL = 20 μA IOL = 5.2 mA IIH SN54HC682(1) TA = 25°C 2 V to 6 V SN54HC682 is in product preview. 5.5 Switching Characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Parameter Measurement Information) PARAMETER FROM (INPUT) TO (OUTPUT) VCC tpd P or Q Any tt (1) Any SN54HC682(1) TA = 25°C MIN MIN SN74HC682 TYP MAX MAX MIN 2V 130 275 413 344 4.5 V 26 55 88 69 UNIT MAX 6V 22 47 70 58 2V 38 75 110 95 4.5 V 8 15 22 19 6V 6 13 19 16 ns ns SN54HC682 is in product preview. 5.6 Operating Characteristics TA = 25℃ PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance No load TYP 40 UNIT pF Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC682 SN74HC682 5 SN54HC682, SN74HC682 www.ti.com SCLS018E – MARCH 1984 – REVISED FEBRUARY 2022 6 Parameter Measurement Information Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tt < 6 ns. For clock inputs, fmax is measured when the input duty cycle is 50%. The outputs are measured one at a time with one input transition per measurement. Test Point From Output Under Test CL(1) (1) CL includes probe and test-fixture capacitance. Figure 6-1. Load Circuit for Push-Pull Outputs VCC Input 50% 90% tPLH tPHL 10% 10% 0V (1) tr(1) (1) VOH Output 50% VOL tPLH(1) VOH Output 50% 0V tf(1) 90% VOH 90% Output 50% tPHL(1) VCC 90% Input 50% 50% 10% 10% tr(1) tf(1) VOL (1) The greater between tr and tf is the same as tt. Figure 6-3. Voltage Waveforms, Input and Output Transition Times for Standard CMOS Inputs VOL (1) The greater between tPLH and tPHL is the same as tpd. Figure 6-2. Voltage Waveforms, Propagation Delays for Standard CMOS Inputs 6 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC682 SN74HC682 www.ti.com SN54HC682, SN74HC682 SCLS018E – MARCH 1984 – REVISED FEBRUARY 2022 7 Detailed Description 7.1 Overview These magnitude comparators perform comparisons of two 8-bit binary or BCD words. The ’HC682 devices feature 100-kΩ pullup termination resistors on the Q inputs for analog or switch data. 7.2 Functional Block Diagram Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC682 SN74HC682 7 SN54HC682, SN74HC682 www.ti.com SCLS018E – MARCH 1984 – REVISED FEBRUARY 2022 7.3 Device Functional Modes Table 7-1. Function Table(1) (1) 8 OUTPUTS DATA INPUTS P, Q P=Q P>Q P=Q L H P>Q H L P Q to a 2-input NAND gate. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC682 SN74HC682 SN54HC682, SN74HC682 www.ti.com SCLS018E – MARCH 1984 – REVISED FEBRUARY 2022 8 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in the Recommended Operating Conditions. Each VCC terminal should have a good bypass capacitor to prevent power disturbance. A 0.1-μF capacitor is recommended for this device. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. The 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor should be installed as close to the power terminal as possible for best results. 9 Layout 9.1 Layout Guidelines When using multiple-input and multiple-channel logic devices inputs must not ever be left floating. In many cases, functions or parts of functions of digital logic devices are unused; for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such unused input pins must not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. All unused inputs of digital logic devices must be connected to a logic high or logic low voltage, as defined by the input voltage specifications, to prevent them from floating. The logic level that must be applied to any particular unused input depends on the function of the device. Generally, the inputs are tied to GND or VCC, whichever makes more sense for the logic function or is more convenient. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC682 SN74HC682 9 SN54HC682, SN74HC682 www.ti.com SCLS018E – MARCH 1984 – REVISED FEBRUARY 2022 10 Device and Documentation Support TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device, generate code, and develop solutions are listed below. 10.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 10.2 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 10.3 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 10.4 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 10.5 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 11 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 10 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HC682 SN74HC682 PACKAGE OPTION ADDENDUM www.ti.com 24-Feb-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74HC682DW ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC682 SN74HC682DWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC682 SN74HC682N ACTIVE PDIP N 20 20 RoHS & Non-Green NIPDAU N / A for Pkg Type -40 to 85 SN74HC682N (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of