SN74LS00N

Order Now Product Folder Technical Documents Support & Community Tools & Software SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 SDLS025D – DECEMBER 1983 – REVISED MAY 2017 SNx400, SNx4LS00, and SNx4S00 Quadruple 2-Input Positive-NAND Gates 1 Features 3 Description • The SNx4xx00 devices contain four independent, 2-input NAND gates. The devices perform the Boolean function Y = A .B or Y = A + B in positive logic. 1 • • • • Package Options Include: – Plastic Small-Outline (D, NS, PS) – Shrink Small-Outline (DB) – Ceramic Flat (W) – Ceramic Chip Carriers (FK) – Standard Plastic (N) – Ceramic (J) Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package Inputs Are TTL Compliant; VIH = 2 V and VIL = 0.8 V Inputs Can Accept 3.3-V or 2.5-V Logic Inputs SN5400, SN54LS00, and SN54S00 are Characterized For Operation Over the Full Military Temperature Range of –55ºC to 125ºC 2 Applications • • • • • • AV Receivers Portable Audio Docks Blu-Ray Players Home Theater MP3 Players or Recorders Personal Digital Assistants (PDAs) Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74LS00DB SSOP (14) 6.20 mm × 5.30 mm SN7400D, SN74LS00D, SN74S00D SOIC (14) 8.65 mm × 3.91 mm SN74LS00NSR PDIP (14) 19.30 × 6.35 mm SNJ5400J, SNJ54LS00J, SNJ54S00J CDIP (14) 19.56 mm × 6.67 mm SNJ5400W, SNJ54LS00W, SNJ54S00W CFP (14) 9.21 mm × 5.97 mm SN54LS00FK, SN54S00FK LCCC (20) 8.89 mm × 8.89 mm SN7400NS, SN74LS00NS, SN74S00NS SO (14) 10.30 mm × 5.30 mm SN7400PS, SN74LS00PS SO (8) 6.20 mm × 5.30 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Logic Diagram, Each Gate (Positive Logic) A Y B 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 SDLS025D – DECEMBER 1983 – REVISED MAY 2017 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 6.11 4 4 4 6 6 6 6 7 7 7 8 Absolute Maximum Ratings ...................................... ESD Ratings: SN74LS00 .......................................... Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics: SNx400 ............................ Electrical Characteristics: SNx4LS00 ....................... Electrical Characteristics: SNx4S00 ......................... Switching Characteristics: SNx400 ........................... Switching Characteristics: SNx4LS00....................... Switching Characteristics: SNx4S00....................... Typical Characteristics ............................................ Parameter Measurement Information .................. 9 7.1 Propagation Delays, Setup and Hold Times, and Pulse Width................................................................ 9 8 Detailed Description ............................................ 10 8.1 Overview ................................................................. 8.2 Functional Block Diagram ....................................... 8.3 Feature Description................................................. 8.4 Device Functional Modes....................................... 9 10 10 10 10 Application and Implementation ........................ 11 9.1 Application Information............................................ 11 9.2 Typical Application .................................................. 11 10 Power Supply Recommendations ..................... 12 11 Layout................................................................... 13 11.1 Layout Guidelines ................................................. 13 11.2 Layout Example .................................................... 13 12 Device and Documentation Support ................. 14 12.1 12.2 12.3 12.4 12.5 12.6 12.7 Documentation Support ........................................ Related Links ........................................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 14 14 14 14 14 14 14 13 Mechanical, Packaging, and Orderable Information ........................................................... 15 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (November 2016) to Revision D • Page Changed Typical Application Diagram see Application and Implementation section............................................................. 1 Changes from Revision B (October 2003) to Revision C Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1 • Changed Ordering Information table to Device Comparison Table; see Package Option Addendum at the end of the data sheet ............................................................................................................................................................................... 1 • Changed Package thermal impedance, RθJA, values in Thermal Information table From: 86°C/W To: 90.9°C/W (D), From: 96°C/W To: 102.8°C/W (DB), From: 80°C/W To: 54.8°C/W (N), and From: 76°C/W To: 89.7°C/W (NS)................... 6 2 Submit Documentation Feedback Copyright © 1983–2017, Texas Instruments Incorporated Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00 SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 www.ti.com SDLS025D – DECEMBER 1983 – REVISED MAY 2017 5 Pin Configuration and Functions SN5400 J, SN54xx00 J and W, SN74x00 D, N, and NS, or SN74LS00 D, DB, N, and NS Packages 14-Pin CDIP, CFP, SOIC, PDIP, SO, or SSOP Top View 1A 1 14 VCC 1B 2 13 4A 1Y 3 12 4B 2A 4 11 4Y 2B 5 10 3A 2Y 6 9 3B GND 7 8 3Y SN74xx00 PS Package 18-Pin SO Top View Not to scale SN5400 W Package 14-Pin CFP Top View 1A 1 14 4Y 1B 2 13 4B 1Y 3 12 4A VCC 4 11 GND 2Y 5 10 3B 2A 6 9 3A 2B 7 8 3Y Not to scale 4B 19 Not to scale 4 18 4A NC 5 17 NC 2A 6 16 4Y NC 7 15 NC 2B 8 14 3B 2Y 9 1Y 13 2Y 3A 5 VCC 4 20 GND 12 2A 3Y 6 NC 3 1 1Y SN54xx00 FK Package 20-Pin LCCC Top View 11 2B NC 7 1A 2 2 1B 10 VCC GND 8 1B 1 3 1A Not to scale Pin Functions PIN CDIP, CFP, SOIC, PDIP, SO, SSOP SO (SN74xx00) CFP (SN5400) LCCC 1A 1 1 1 2 1B 2 2 2 1Y 3 3 3 2A 4 6 2B 5 2Y 6 3A 3B NAME I/O DESCRIPTION I Gate 1 input 3 I Gate 1 input 4 O Gate 1 output 6 6 I Gate 2 input 7 7 8 I Gate 2 input 5 5 9 O Gate 2 output 10 — 9 13 I Gate 3 input 9 — 10 14 I Gate 3 input Copyright © 1983–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00 3 SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 SDLS025D – DECEMBER 1983 – REVISED MAY 2017 www.ti.com Pin Functions (continued) PIN CDIP, CFP, SOIC, PDIP, SO, SSOP SO (SN74xx00) 3Y 8 4A 13 4B 4Y I/O DESCRIPTION CFP (SN5400) LCCC — 8 12 O Gate 3 output — 12 18 I Gate 4 input 12 — 13 19 I Gate 4 input 11 — 14 16 O Gate 4 output GND 7 4 11 10 — Ground NC — — — 1, 5, 7, 11, 15, 17 — No connect VCC 14 8 4 20 — Power supply NAME 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT 7 V Supply voltage, VCC (2) SNx400 and SNxS400 Input voltage 5.5 SNx4LS00 Junction temperature, TJ Storage temperature, Tstg (1) (2) V 7 –65 150 °C 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Voltage values are with respect to network ground terminal. 6.2 ESD Ratings: SN74LS00 VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±500 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) ±2000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250-V CDM is possible with the necessary precautions. Pins listed as ±2000 V may actually have higher performance. ESD Tested on SN74LS00N package. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage IOH High-level output current IOL Low-level output current MIN NOM SN54xx00 4.5 5 5.5 SN74xx00 4.75 5 5.25 2 0.8 SN54LS00 0.7 SN5400, SN54LS00, and SN74LS00 Submit Documentation Feedback UNIT V V SNx400, SN7LS400, and SNx4S00 –0.4 SNx4S00 –1 SNx400 16 SN5LS400 4 SN7LS400 8 SNx4S00 4 MAX V mA mA 20 Copyright © 1983–2017, Texas Instruments Incorporated Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00 SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 www.ti.com SDLS025D – DECEMBER 1983 – REVISED MAY 2017 Recommended Operating Conditions (continued) over operating free-air temperature range (unless otherwise noted) MIN TA Operating free-air temperature Copyright © 1983–2017, Texas Instruments Incorporated NOM MAX SN54xx00 –55 125 SN74xx00 0 70 Submit Documentation Feedback Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00 UNIT °C 5 SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 SDLS025D – DECEMBER 1983 – REVISED MAY 2017 www.ti.com 6.4 Thermal Information SN74LS00 THERMAL METRIC (1) (2) RθJA D (SOIC) DB (SSOP) N (PDIP) NS (SO) 14 PINS 14 PINS 14 PINS 14 PINS 90.9 102.8 54.8 89.7 °C/W 51.9 53.3 42.1 48.1 °C/W 48 53.4 34.8 50.1 °C/W Junction-to-ambient thermal resistance RθJC(top) Junction-to-case (top) thermal resistance UNIT RθJB Junction-to-board thermal resistance ψJT Junction-to-top characterization parameter 18.6 16.5 26.9 16.7 °C/W ψJB Junction-to-board characterization parameter 47.8 52.9 34.7 49.8 °C/W (1) (2) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. The package thermal impedance is calculated in accordance with JESD 51-7. 6.5 Electrical Characteristics: SNx400 over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT –1.5 V VIK VCC = MIN and II = –12 mA VOH VCC = MIN, VIL = 0.8 V, and IOH = –0.4 mA VOL VCC = MIN, VIH = 2 V, and IOL = 16 mA II VCC = MAX and VI = 5.5 V 1 mA IIH VCC = MAX and VI = 2.4 V 40 µA IIL VCC = MAX and VI = 0.4 V –1.6 mA IOS VCC = MAX ICCH VCC = MAX and VI = 0 V ICCL VCC = MAX and VI = 4.5 V 2.4 3.4 0.2 V 0.4 SN5400 –20 –55 SN7400 –18 –55 V mA 4 8 mA 12 22 mA TYP MAX UNIT –1.5 V 6.6 Electrical Characteristics: SNx4LS00 over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VIK VCC = MIN and II = –18 mA VOH VCC = MIN, VIL = MAX, and IOH = –0.4 mA MIN 2.5 3.4 V IOL = 4 mA 0.25 0.4 IOL = 8 mA (SN74LS00) 0.35 0.5 VOL VCC = MIN and VIH = 2 V V II VCC = MAX and VI = 7 V 0.1 mA IIH VCC = MAX and VI = 2.7 V 20 µA IIL VCC = MAX and VI = 0.4 V IOS VCC = MAX ICCH VCC = MAX and VI = 0 V ICCL VCC = MAX and VI = 4.5 V –0.4 mA –100 mA 0.8 1.6 mA 2.4 4.4 mA –20 6.7 Electrical Characteristics: SNx4S00 over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT –1.2 V VIK VCC = MIN and II = –18 mA VOH VCC = MIN, VIL = 0.8 V, and IOH = –1 mA VOL VCC = MIN, VIH = 2 V, and IOL = 20 mA II VCC = MAX and VI = 5.5 V 1 IIH VCC = MAX and VI = 2.7 V 50 µA IIL VCC = MAX and VI = 0.5 V –2 mA 6 Submit Documentation Feedback 2.5 3.4 V 0.5 V mA Copyright © 1983–2017, Texas Instruments Incorporated Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00 SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 www.ti.com SDLS025D – DECEMBER 1983 – REVISED MAY 2017 Electrical Characteristics: SNx4S00 (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP –40 MAX UNIT IOS VCC = MAX –100 mA ICCH VCC = MAX and VI = 0 V 10 16 mA ICCL VCC = MAX and VI = 4.5 V 20 36 mA 6.8 Switching Characteristics: SNx400 VCC = 5 V, TA = 25°C, and over operating free-air temperature range (unless otherwise noted). See Figure 2. PARAMETER tPLH FROM (INPUT) TO (OUTPUT) A or B tPHL Y TEST CONDITIONS MIN RL = 400 Ω and CL = 15 pF TYP MAX 11 22 7 15 TYP MAX 9 15 10 15 UNIT ns 6.9 Switching Characteristics: SNx4LS00 VCC = 5 V, TA = 25°C, and over operating free-air temperature range (unless otherwise noted). See Figure 2. PARAMETER tPLH tPHL FROM (INPUT) TO (OUTPUT) TEST CONDITIONS A or B Y RL = 2 kΩ and CL = 15 pF MIN UNIT ns 6.10 Switching Characteristics: SNx4S00 VCC = 5 V, TA = 25°C, and over operating free-air temperature range (unless otherwise noted). See Figure 2. PARAMETER tPLH tPHL FROM (INPUT) A or B A or B Copyright © 1983–2017, Texas Instruments Incorporated TO (OUTPUT) Y Y TYP MAX RL = 280 Ω and CL = 15 pF TEST CONDITIONS MIN 3 4.5 RL = 280 Ω and CL = 50 pF 4.5 RL = 280 Ω and CL = 15 pF 3 RL = 280 Ω and CL = 50 pF 5 5 Submit Documentation Feedback Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00 UNIT ns 7 SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 SDLS025D – DECEMBER 1983 – REVISED MAY 2017 www.ti.com 6.11 Typical Characteristics CL = 15 pF Figure 1. TPHL (Across Devices) 8 Submit Documentation Feedback Copyright © 1983–2017, Texas Instruments Incorporated Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00 SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 www.ti.com SDLS025D – DECEMBER 1983 – REVISED MAY 2017 7 Parameter Measurement Information 7.1 Propagation Delays, Setup and Hold Times, and Pulse Width VCC Test Point VCC RL (see Note B) From Output Under Test CL (see Note A) High-Level Pulse 1.5 V S2 LOAD CIRCUIT FOR 3-STATE OUTPUTS 3V Timing Input 1.5 V 1 kΩ Test Point LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS LOAD CIRCUIT FOR 2-STATE TOTEM-POLE OUTPUTS S1 (see Note B) CL (see Note A) RL CL (see Note A) RL From Output Under Test VCC From Output Under Test Test Point 1.5 V 0V tw Low-Level Pulse 1.5 V tsu Data Input 1.5 V VOLTAGE WAVEFORMS PULSE DURATIONS 1.5 V 1.5 V In-Phase Output (see Note D) tPHL VOH 1.5 V 0V 1.5 V 1.5 V 1.5 V 0V tPZL Waveform 1 (see Notes C and D) tPLZ VOL tPZH tPLH VOH 1.5 V 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES Waveform 2 (see Notes C and D) ≈1.5 V 1.5 V VOL tPHL Out-of-Phase Output (see Note D) 1.5 V 3V Output Control (low-level enabling) 0V tPLH 3V 1.5 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V Input th VOL + 0.5 V tPHZ VOH 1.5 V VOH − 0.5 V ≈1.5 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. All diodes are 1N3064 or equivalent. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. S1 and S2 are closed for tPLH, tPHL, tPHZ, and t PLZ; S1 is open and S2 is closed for t PZH; S1 is closed and S2 is open for t PZL. E. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω; tr and tf ≤ 7 ns for Series 54/74 devices and tr and tf ≤ 2.5 ns for Series 54S/74S devices. F. The outputs are measured one at a time with one input transition per measurement. Figure 2. Load Circuits and Voltage Waveforms Copyright © 1983–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00 9 SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 SDLS025D – DECEMBER 1983 – REVISED MAY 2017 www.ti.com 8 Detailed Description 8.1 Overview The SNx4xx00 devices are quadruple, 2-input NAND gates which perform the Boolean function Y = A .B or Y = A + B in positive logic. 8.2 Functional Block Diagram A Y B 8.3 Feature Description The operating voltage of SN74xx00 is from 4.75-V to 5.25-V VCC. The operating voltage of SN54xx00 is from 4.5V to 5.5-V VCC. The SN54xx00 devices are rated from –55°C to 125°C whereas SN74xx00 device are rated from 0°C to 70°C. 8.4 Device Functional Modes Table 1 lists the functions of the devices. Table 1. Functional Table (Each Gate) INPUTS 10 Submit Documentation Feedback OUTPUT A B Y H H L L X H X L H Copyright © 1983–2017, Texas Instruments Incorporated Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00 SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 www.ti.com SDLS025D – DECEMBER 1983 – REVISED MAY 2017 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The SNx4xx00 devices are quadruple, 2-input NAND gate. A typical application of NAND gate can be as an error indicator as shown in Figure 3. If either of the sensor has an error, the error flag is high to indicate system error. 9.2 Typical Application Sensor1 Error1 Error Flag Sensor2 Error2 Figure 3. Typical Application Diagram 9.2.1 Design Requirements These devices use BJT technology and have unbalanced output drive with IOL and IOH specified as per the Recommended Operating Conditions. 9.2.2 Detailed Design Procedure • Recommended Input Conditions: – The inputs are TTL compliant. – Because the base-emitter junction at the inputs breaks down, no voltage greater than 5.5 V must be applied to the inputs. – Specified high and low levels: See VIH and VIL in Recommended Operating Conditions. • Recommended Output Conditions: – No more than one output must be shorted at a time as per the Electrical Characteristics: SNx400 for thermal stability and reliability. – For high-current applications, consider thermal characteristics of the package listed in Thermal Information. Copyright © 1983–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00 11 SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 SDLS025D – DECEMBER 1983 – REVISED MAY 2017 www.ti.com Typical Application (continued) 9.2.3 Application Curve CL = 15 pF 25 TpLHmax D1 '00, D2 'LS00, D3 'S00 TpLHtyp D1 '00, D2 'LS00, D3 'S00 TPLH(ns) 20 15 10 5 0 1 2 Device 3 D001 Figure 4. TPLH (Across Devices) 10 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in Recommended Operating Conditions for each of the SNx4LS00, SNx4S00, and SNx400 devices. Each VCC pin must have a good bypass capacitor to prevent power disturbance. For devices with a single supply, 0.1 µF is recommended; if there are multiple VCC pins, then 0.01 µF or 0.022 µF is recommended for each power pin. It is acceptable to parallel multiple bypass capacitors to reject different frequencies of noise. A 0.1 µF and a 1 µF are commonly used in parallel. The bypass capacitor must be installed as close to the power pin as possible for best results. 12 Submit Documentation Feedback Copyright © 1983–2017, Texas Instruments Incorporated Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00 SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 www.ti.com SDLS025D – DECEMBER 1983 – REVISED MAY 2017 11 Layout 11.1 Layout Guidelines When using multiple bit logic, devices inputs must never float. Devices with multiple-emitter inputs (SN74 and SN74S series) need special care. Because no voltage greater than 5.5 V must be applied to the inputs (if exceeded, the base-emitter junction at the inputs breaks down), the inputs of these devices must be connected to the supply voltage, VCC, through series resistor, RS (see Figure 5). This resistor must be dimensioned such that the current flowing into the gate or gates, which results from overvoltage, does not exceed 1 mA. However, because the high-level input current of the circuits connected to the gate flows through this resistor, the resistor must be dimensioned so that the voltage drop across it still allows the required high level. Equation 1 and Equation 2 are for dimensioning resistor, RS, and several inputs can be connected to a high level through a single resistor if the following conditions are met. V 5.5 V RS(min) CCP 1mA (1) VCC(min) 2.4 V RS(max) n IIH where • • • • n = number of inputs connected IIH = high input current (typical 40 µA) VCC(min) = minimum supply voltage, VCC VCCP = maximum peak voltage of the supply voltage, VCC (about 7 V) (2) 11.2 Layout Example VCC Rs & Output Input Figure 5. Series Resistor Connected to Unused Inputs of Multiple-Emitter Transistors Copyright © 1983–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00 13 SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 SDLS025D – DECEMBER 1983 – REVISED MAY 2017 www.ti.com 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 Related Documentation For related documentation see the following: Designing With Logic (SDYA009) 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 2. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY SN5400 Click here Click here Click here Click here Click here SN54LS00 Click here Click here Click here Click here Click here SN54S00 Click here Click here Click here Click here Click here SN7400 Click here Click here Click here Click here Click here SN74LS00 Click here Click here Click here Click here Click here SN74S00 Click here Click here Click here Click here Click here 12.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.4 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.5 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.6 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.7 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 14 Submit Documentation Feedback Copyright © 1983–2017, Texas Instruments Incorporated Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00 SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 www.ti.com SDLS025D – DECEMBER 1983 – REVISED MAY 2017 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 1983–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00 15 PACKAGE OPTION ADDENDUM www.ti.com 15-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) JM38510/00104BCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 00104BCA Samples JM38510/00104BDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 00104BDA Samples JM38510/07001BCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 07001BCA Samples JM38510/07001BDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 07001BDA Samples JM38510/30001B2A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 30001B2A Samples JM38510/30001BCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 30001BCA Samples JM38510/30001BDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 30001BDA Samples JM38510/30001SCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/30001S CA Samples JM38510/30001SDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/30001S DA Samples M38510/00104BCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 00104BCA Samples M38510/00104BDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 00104BDA Samples M38510/07001BCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 07001BCA Samples M38510/07001BDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 07001BDA Samples M38510/30001B2A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 30001B2A Samples M38510/30001BCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 30001BCA Samples M38510/30001BDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 30001BDA Samples Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 15-Oct-2022 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) M38510/30001SCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/30001S CA Samples M38510/30001SDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/30001S DA Samples SN5400J ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SN5400J Samples SN54LS00J ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SN54LS00J Samples SN54S00J ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SN54S00J Samples SN7400D ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 7400 Samples SN7400DG4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 7400 Samples SN7400N ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN7400N Samples SN7400NE4 ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN7400N Samples SN74LS00D ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 LS00 Samples SN74LS00DBR ACTIVE SSOP DB 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 LS00 Samples SN74LS00DG4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 LS00 Samples SN74LS00DR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 LS00 Samples SN74LS00N ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN74LS00N Samples SN74LS00NE4 ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN74LS00N Samples SN74LS00NSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 74LS00 Samples SN74LS00NSRG4 ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 74LS00 Samples SN74LS00PSR ACTIVE SO PS 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 LS00 Samples SN74S00D ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 S00 Samples SN74S00N ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN74S00N Samples Addendum-Page 2 PACKAGE OPTION ADDENDUM www.ti.com 15-Oct-2022 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SNJ5400J ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SNJ5400J Samples SNJ5400W ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SNJ5400W Samples SNJ54LS00FK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SNJ54LS00FK Samples SNJ54LS00J ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SNJ54LS00J Samples SNJ54LS00W ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SNJ54LS00W Samples SNJ54S00FK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SNJ54S 00FK Samples SNJ54S00J ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SNJ54S00J Samples SNJ54S00W ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SNJ54S00W Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of