SN54LV14A, SN74LV14A
HEX SCHMITT-TRIGGER INVERTERS
www.ti.com
SCLS386 J – SEPTEMBER 1997 – REVISED APRIL 2005
FEATURES
1
•
•
•
•
•
2-V to 5.5-V VCC Operation
Max tpd of 10 ns at 5 V
Typical VOLP (Output Ground Bounce) 2.3 V
at VCC = 3.3 V, TA = 25°C
Support Mixed-Mode Voltage Operation on All
Ports
•
•
•
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN54LV14A...FK PACKAGE
(TOP VIEW)
SN74LV14A...RGY PACKAGE
(TOP VIEW)
SN54LV14A...J OR W PACKAGE
SN74LV14A...D, DB, DGV, NS
OR PW PACKAGE
(TOP VIEW)
NC – No internal connection
DESCRIPTION/ORDERING INFORMATION
These hex Schmitt-trigger inverters are designed for 2-V to 5.5-V VCC operation.
The ’LV14A devices contain six independent inverters. These devices perform the Boolean function Y = A.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
ORDERING INFORMATION
TA
PACKAGE
QFN – RGY
(1)
(2)
TOP-SIDE MARKING
SN74LV14ARGYR
Tube of 50
SN74LV14AD
Reel of 2500
SN74LV14ADR
SOP – NS
Reel of 2000
SN74LV14ANSR
74LV14A
SSOP – DB
Reel of 2000
SN74LV14ADBR
LV14A
Tube of 90
SN74LV14APW
Reel of 2000
SN74LV14APWR
Reel of 250
SN74LV14APWT
TVSOP – DGV
Reel of 2000
SN74LV14ADGVR
LV14A
CDIP – J
Tube of 25
SNJ54LV14AJ
SNJ54LV14AJ
CFP – W
Tube of 150
SNJ54LV14AW
SNJ54LV14AW
LCCC – FK
Tube of 55
SNJ54LV14AFK
SNJ54LV14AFK
TSSOP – PW
–55°C to 125°C
ORDERABLE PART NUMBER
Reel of 1000
SOIC – D
–40°C to 85°C
(1) (2)
LV14A
LV14A
LV14A
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2005, Texas Instruments Incorporated
SN54LV14A, SN74LV14A
HEX SCHMITT-TRIGGER INVERTERS
www.ti.com
SCLS386 J – SEPTEMBER 1997 – REVISED APRIL 2005
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H
L
L
H
LOGIC DIAGRAM, EACH INVERTER (POSITIVE LOGIC)
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
7
V
VI
Input voltage range (2)
–0.5
7
V
VO
Voltage range applied to any output in the high-impedance or power-off state (2)
–0.5
7
V
–0.5
VCC + 0.5
(2) (3)
VO
Output voltage range
IIK
Input clamp current
VI < 0
–20
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
VO = 0 to VCC
±25
mA
±50
mA
Continuous current through VCC or GND
D package (4)
86
DB package (4)
θJA
Package thermal impedance
DGV package
(1)
(2)
(3)
(4)
(5)
2
96
(4)
127
NS package (4)
76
PW package (4)
113
RGY package
Tstg
V
(5)
°C/W
47
Storage temperature range
–65
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
This value is limited to 5.5 V maximum.
The package thermal impedance is calculated in accordance with JESD 51-7
The package thermal impedance is calculated in accordance with JESD 51-5.
Submit Documentation Feedback
Copyright © 1997–2005, Texas Instruments Incorporated
Product Folder Link(s): SN54LV14A SN74LV14A
SN54LV14A, SN74LV14A
HEX SCHMITT-TRIGGER INVERTERS
www.ti.com
SCLS386 J – SEPTEMBER 1997 – REVISED APRIL 2005
RECOMMENDED OPERATING CONDITIONS (1)
SN54LV14A (2)
SN74LV14A
MIN
MAX
MIN
MAX
UNIT
VCC
Supply voltage
2
5.5
2
5.5
V
VI
Input voltage
0
5.5
0
5.5
V
VO
Output voltage
0
VCC
0
VCC = 2 V
IOH
High-level output current
VCC
V
–50
–50
µA
–2
–2
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
–6
–6
–12
–12
50
50
2
2
VCC = 2 V
IOL
Low-level output current
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
TA
(1)
(2)
Operating free-air temperature
–55
6
6
12
12
125
–40
85
mA
µA
mA
°C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Product Preview
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VT+
Positive-going
threshold
VT–
Negative-going
threshold
ΔVT
Hysteresis
(VT+ – VT–)
VOH
VOL
(1)
VCC
SN54LV14A (1)
MIN
SN74LV14A
TYP MAX
MIN
TYP MAX
2.5 V
1.75
1.75
3.3 V
2.31
2.31
5V
3.5
3.5
2.5 V
0.75
0.75
3.3 V
0.99
0.99
5V
1.5
1.5
2.5 V
0.25
0.25
3.3 V
0.33
0.33
5V
0.5
0.5
VCC – 0.1
VCC – 0.1
IOH = –50 µA
2 V to 5.5 V
IOH = –2 mA
2.3 V
2
2
IOH = –6 mA
3V
2.48
2.48
IOH = –12 mA
4.5 V
3.8
3.8
UNIT
V
V
V
V
IOL = 50 µA
2 V to 5.5 V
0.1
IOL = 2 mA
2.3 V
0.4
0.4
IOL = 6 mA
3V
0.44
0.44
IOL = 12 mA
4.5 V
0.55
0.55
0 to 5.5 V
±1
±1
µA
5.5 V
20
20
µA
0
5
5
µA
II
VI = VCC or GND
ICC
VI = VCC or GND,
Ioff
VI or VO = 0 to 5.5 V
Ci
VI = VCC or GND
IO = 0
0.1
3.3 V
2.3
2.3
5V
2.3
2.3
V
pF
Product Preview
Copyright © 1997–2005, Texas Instruments Incorporated
Product Folder Link(s): SN54LV14A SN74LV14A
Submit Documentation Feedback
3
SN54LV14A, SN74LV14A
HEX SCHMITT-TRIGGER INVERTERS
www.ti.com
SCLS386 J – SEPTEMBER 1997 – REVISED APRIL 2005
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tpd
A
Y
(1)
(2)
LOAD
CAPACITANCE
SN54LV14A (1)
TA = 25°C
MIN
SN74LV14A
TYP
MAX
MIN
MAX
MIN
MAX
CL = 15 pF
10.2 (2)
19.7 (2)
1 (2)
22 (2)
1
22
CL = 50 pF
13.3
24
1
27
1
27
UNIT
ns
Product Preview
On products compliant to MIL-PRF-38535, this parameter is not production tested.
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tpd
A
Y
(1)
(2)
LOAD
CAPACITANCE
SN54LV14A (1)
TA = 25°C
MIN
SN74LV14A
TYP
MAX
MIN
MAX
MIN
MAX
CL = 15 pF
7.3 (2)
12.8 (2)
1 (2)
15.9 (2)
1
15
CL = 50 pF
9.6
16.3
1
19.4
1
18.5
UNIT
ns
Product Preview
On products compliant to MIL-PRF-38535, this parameter is not production tested.
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tpd
A
Y
(1)
(2)
LOAD
CAPACITANCE
SN54LV14A (1)
TA = 25°C
MIN
SN74LV14A
TYP
MAX
MIN
MAX
MIN
MAX
CL = 15 pF
5.1 (2)
8.6 (2)
1 (2)
10 (2)
1
10
CL = 50 pF
6.7
10.6
1
12
1
12
UNIT
ns
Product Preview
On products compliant to MIL-PRF-38535, this parameter is not production tested.
NOISE CHARACTERISTICS
VCC = 3.3 V, CL = 50 pF, TA = 25°C (1)
SN74LV14A
MIN
TYP
UNIT
MAX
VOL(P)
Quiet output, maximum dynamic
0.2
0.8
V
VOL(V)
Quiet output, minimum dynamic
–0.1
–0.8
V
VOH(V)
Quiet output, minimum dynamic
3.1
VIH(D)
High-level dynamic input voltage
VIL(D)
Low-level dynamic input voltage
(1)
V
2.31
V
0.99
V
Characteristics are for surface-mount packages only.
OPERATING CHARACTERISTICS
TA = 25°C
PARAMETER
Cpd
4
Power dissipation capacitance
Submit Documentation Feedback
TEST CONDITIONS
CL = 50 pF,
f = 10 MHz
VCC
TYP
3.3 V
8.8
5V
9.6
UNIT
pF
Copyright © 1997–2005, Texas Instruments Incorporated
Product Folder Link(s): SN54LV14A SN74LV14A
SN54LV14A, SN74LV14A
HEX SCHMITT-TRIGGER INVERTERS
www.ti.com
SCLS386 J – SEPTEMBER 1997 – REVISED APRIL 2005
PARAMETER MEASUREMENT INFORMATION
Test
Point
From Output
Under Test
RL = 1 kΩ
From Output
Under Test
VCC
Open
S1
TESTS1
GND
CL
(see Note A)
CL
(see Note A)
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
Open
VCC
GND
VCC
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
VCC
50% V CC
Timing Input
0V
tw
tsu
VCC
50% V CC
50% V CC
Input
th
VCC
50% V CC
Data Input
50% V CC
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VCC
50% V CC
Input
50% V CC
tPLH
In-Phase
Output
VOH
50% V CC
VOL
50% V CC
VOH
50% V CC
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
50% V CC
0V
tPLZ
Output
Waveform 1
S1 at V CC
(see Note B)
tPLH
50% V CC
50% V CC
tPZL
tPHL
tPHL
Out-of-Phase
Output
0V
VCC
Output
Control
≈VCC
50% V CC
VOL + 0.3 V
VOL
tPHZ
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
50% V CC
VOH - 0.3 V
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
A.
CL includes probe and jig capacitance.
B.
Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output
control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the
output control.
C.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns,
tf ≤ 3 ns.
D.
The outputs are measured one at a time, with one input transition per measurement.
E.
tPLZ and tPHZ are the same as tdis.
F.
tPZL and tPZH are the same as ten.
G.
tPHL and tPLH are the same as tpd.
H.
All parameters and waveforms are not applicable to all devices.
VOH
Figure 1. Load Circuit and Voltage Waveforms
Copyright © 1997–2005, Texas Instruments Incorporated
Product Folder Link(s): SN54LV14A SN74LV14A
Submit Documentation Feedback
5
PACKAGE OPTION ADDENDUM
www.ti.com
18-Oct-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
Device Marking
(4/5)
SN74LV14AD
ACTIVE
SOIC
D
14
SN74LV14ADBLE
OBSOLETE
SSOP
DB
14
TBD
Call TI
Call TI
-40 to 85
SN74LV14ADBR
ACTIVE
SSOP
DB
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14ADBRE4
ACTIVE
SSOP
DB
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14ADBRG4
ACTIVE
SSOP
DB
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14ADE4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14ADG4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14ADGVR
ACTIVE
TVSOP
DGV
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14ADGVRE4
ACTIVE
TVSOP
DGV
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14ADGVRG4
ACTIVE
TVSOP
DGV
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14ADR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14ADRE4
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14ADRG4
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14ANSR
ACTIVE
SO
NS
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
74LV14A
SN74LV14ANSRE4
ACTIVE
SO
NS
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
74LV14A
SN74LV14ANSRG4
ACTIVE
SO
NS
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
74LV14A
SN74LV14APW
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
Addendum-Page 1
LV14A
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
18-Oct-2013
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
SN74LV14APWE4
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14APWG4
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14APWLE
OBSOLETE
TSSOP
PW
14
TBD
Call TI
Call TI
-40 to 85
SN74LV14APWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14APWRE4
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14APWRG3
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14APWRG4
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14APWT
ACTIVE
TSSOP
PW
14
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14APWTE4
ACTIVE
TSSOP
PW
14
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14APWTG4
ACTIVE
TSSOP
PW
14
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
LV14A
SN74LV14ARGYR
ACTIVE
VQFN
RGY
14
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
LV14A
SN74LV14ARGYRG4
ACTIVE
VQFN
RGY
14
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
LV14A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
18-Oct-2013
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LV14A :
• Automotive: SN74LV14A-Q1
• Enhanced Product: SN74LV14A-EP
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Oct-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SN74LV14ADBR
SSOP
DB
14
2000
330.0
16.4
8.2
6.6
2.5
12.0
16.0
Q1
SN74LV14ADGVR
TVSOP
DGV
14
2000
330.0
12.4
6.8
4.0
1.6
8.0
12.0
Q1
SN74LV14ADR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
SN74LV14ADR
SOIC
D
14
2500
330.0
16.8
6.5
9.5
2.3
8.0
16.0
Q1
SN74LV14ADR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
SN74LV14ADRG4
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
SN74LV14APWR
TSSOP
PW
14
2000
330.0
12.4
7.0
5.6
1.6
8.0
12.0
Q1
SN74LV14APWRG3
TSSOP
PW
14
2000
330.0
12.4
7.0
5.6
1.6
8.0
12.0
Q1
SN74LV14APWRG4
TSSOP
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
SN74LV14APWT
TSSOP
PW
14
250
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
SN74LV14ARGYR
VQFN
RGY
14
3000
330.0
12.4
3.75
3.75
1.15
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Oct-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74LV14ADBR
SSOP
DB
14
2000
367.0
367.0
38.0
SN74LV14ADGVR
TVSOP
DGV
14
2000
367.0
367.0
35.0
SN74LV14ADR
SOIC
D
14
2500
333.2
345.9
28.6
SN74LV14ADR
SOIC
D
14
2500
364.0
364.0
27.0
SN74LV14ADR
SOIC
D
14
2500
367.0
367.0
38.0
SN74LV14ADRG4
SOIC
D
14
2500
333.2
345.9
28.6
SN74LV14APWR
TSSOP
PW
14
2000
364.0
364.0
27.0
SN74LV14APWRG3
TSSOP
PW
14
2000
364.0
364.0
27.0
SN74LV14APWRG4
TSSOP
PW
14
2000
367.0
367.0
35.0
SN74LV14APWT
TSSOP
PW
14
250
367.0
367.0
35.0
SN74LV14ARGYR
VQFN
RGY
14
3000
367.0
367.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
0,23
0,13
24
13
0,07 M
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–8°
1
0,75
0,50
12
A
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,08
14
16
20
24
38
48
56
A MAX
3,70
3,70
5,10
5,10
7,90
9,80
11,40
A MIN
3,50
3,50
4,90
4,90
7,70
9,60
11,20
DIM
4073251/E 08/00
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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