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SN74LV14ANSRG4

SN74LV14ANSRG4

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC14

  • 描述:

    IC INVERT SCHMITT 6CH 6-IN 14SOP

  • 数据手册
  • 价格&库存
SN74LV14ANSRG4 数据手册
SN74LV14A SCLS386L – SEPTEMBER 1997 – REVISED DECEMBER 2022 SN74LV14A Hex Schmitt-Trigger Inverters 1 Features • • • • • • • 2 Applications VCC operation of 2 V to 5.5 V Max tpd of 10 ns at 5 V Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) > 2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 • • • • • Network Switches Wearable Health and Fitness Devices PDAs LCD TVs Power Infrastructure 3 Description These hex Schmitt-trigger inverters are designed for 2 V to 5.5 V VCC operation. The SN74LV14A devices contain six independent inverters. These devices perform the Boolean function Y = A. Package Information PART NUMBER SN74LV14A (1) PACKAGE (1) BODY SIZE (NOM) TVSOP (14) 3.60 mm × 4.40 mm SOIC (14) 8.65 mm × 3.91 mm SSOP (14) 6.20 mm × 5.30 mm TSSOP (14) 5.00 mm × 4.40 mm For all available packages, see the orderable addendum at the end of the data sheet. Figure 3-1. Simplified Schematic An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA. SN74LV14A www.ti.com SCLS386L – SEPTEMBER 1997 – REVISED DECEMBER 2022 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................3 Pin Functions.................................................................... 3 6 Specifications.................................................................. 4 6.1 Absolute Maximum Ratings........................................ 4 6.2 ESD Ratings............................................................... 4 6.3 Recommended Operating Conditions.........................4 6.4 Thermal Information....................................................5 6.5 Electrical Characteristics.............................................5 6.6 Switching Characteristics, VCC = 2.5 V ± 0.2 V...........6 6.7 Switching Characteristics, VCC = 3.3 V ± 0.3 V...........6 6.8 Switching Characteristics, VCC = 5 V ± 0.5 V..............6 6.9 Noise Characteristics.................................................. 6 6.10 Operating Characteristics......................................... 6 6.11 Typical Characteristics.............................................. 7 7 Parameter Measurement Information............................ 8 8 Detailed Description........................................................9 8.1 Overview..................................................................... 9 8.2 Functional Block Diagram........................................... 9 8.3 Feature Description.....................................................9 8.4 Device Functional Modes............................................9 9 Application and Implementation.................................. 10 9.1 Application Information............................................. 10 9.2 Typical Application.................................................... 10 10 Power Supply Recommendations..............................12 11 Layout........................................................................... 12 11.1 Layout Guidelines................................................... 12 11.2 Layout Example...................................................... 12 12 Device and Documentation Support..........................13 12.1 Related Links.......................................................... 13 12.2 Receiving Notification of Documentation Updates..13 12.3 Support Resources................................................. 13 12.4 Trademarks............................................................. 13 12.5 Electrostatic Discharge Caution..............................13 12.6 Glossary..................................................................13 13 Mechanical, Packaging, and Orderable Information.................................................................... 13 4 Revision History Changes from Revision K (September 2014) to Revision L (December 2022) Page • Updated the format for tables, figures, and cross-references throughout the document....................................1 Changes from Revision J (September 1997) to Revision K (September 2014) Page • Updated document to new TI data sheet format.................................................................................................1 • Removed Ordering Information table..................................................................................................................1 • Added Applications............................................................................................................................................. 1 • Added Device Information table..........................................................................................................................1 • Added Pin Functions table..................................................................................................................................3 • Changed MAX operating temperature to 125°C in Recommended Operating Conditions table. ...................... 4 • Added Thermal Information table....................................................................................................................... 5 • Added Typical Characteristics............................................................................................................................ 7 • Added Application and Implementation section................................................................................................10 • Added Power Supply Recommendations and Layout sections........................................................................ 12 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LV14A SN74LV14A www.ti.com SCLS386L – SEPTEMBER 1997 – REVISED DECEMBER 2022 5 Pin Configuration and Functions Figure 5-1. SN74LV14A D, DB, DGV, NS OR PW Package Top View Figure 5-2. SN74LV14A RGY Package Top View Pin Functions PIN SN74LV14A NAME TYPE(1) DESCRIPTION D, DB, DGV, NS, PW RGY 1A 1 1 I Input 1A 1Y 2 2 O Output 1Y 2A 3 3 I Input 2A 2Y 4 4 O Output 2Y 3A 5 5 I Input 3A 3Y 6 6 O Output 3Y 4Y 8 8 O Output 4Y 4A 9 9 I Input 4A 5Y 10 10 O Output 5Y 5A 11 11 I Input 5A 6Y 12 12 O Output 6Y 6A 13 13 I Input 6A GND 7 7 — Ground Pin NC — — — No Connection VCC 14 14 — Power Pin (1) Signal Types: I = Input, O = Output, I/O = Input or Output. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LV14A 3 SN74LV14A www.ti.com SCLS386L – SEPTEMBER 1997 – REVISED DECEMBER 2022 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) VCC MIN MAX Supply voltage range –0.5 7 V range(2) –0.5 7 V –0.5 7 V –0.5 VCC + 0.5 VI Input voltage VO Voltage range applied to any output in the high-impedance or power-off state(2) range(2) (3) UNIT VO Output voltage IIK Input clamp current VI < 0 –20 mA V IOK Output clamp current VO < 0 –50 mA IO Continuous output current VO = 0 to VCC ±25 mA Continuous current through VCC or GND ±50 mA TJ Junction temperature 150 °C Tstg Storage temperature range 150 °C (1) (2) (3) –65 Stresses beyond those listed under Section 6.1 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Section 6.3 is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. This value is limited to 5.5-V maximum. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±1000 Machine Model ±200 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted)(1) SN74LV14A MIN MAX VCC Supply voltage 2 5.5 V VI Input voltage 0 5.5 V VO Output voltage 0 VCC V –50 μA VCC = 2 V IOH High-level output current VCC = 2.3 V to 2.7 V –2 VCC = 3 V to 3.6 V –6 VCC = 4.5 V to 5.5 V IOL Low-level output current TA Operating free-air temperature 50 VCC = 2.3 V to 2.7 V 2 VCC = 3 V to 3.6 V 6 VCC = 4.5 V to 5.5 V (1) mA –12 VCC = 2 V 4 UNIT μA mA 12 –40 125 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs (SCBA004). Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LV14A SN74LV14A www.ti.com SCLS386L – SEPTEMBER 1997 – REVISED DECEMBER 2022 6.4 Thermal Information SN74LV14A THERMAL METRIC(1) D DB DGV NS PW RGY UNIT 14 PINS RθJA Junction-to-ambient thermal resistance 94.9 107.4 130.4 91.4 122.6 57.6 Rθ Junction-to-case (top) thermal resistance 56.3 59.9 53.4 49.0 51.3 70.4 RθJB Junction-to-board thermal resistance 49.2 54.7 63.5 50.2 64.4 33.6 ψJT Junction-to-top characterization parameter 20.7 21.0 7.3 15.3 6.8 3.5 ψJB Junction-to-board characterization parameter 48.9 51.2 62.8 49.8 63.8 33.7 Rθ Junction-to-case (bottom) thermal resistance – – – – – 14.1 JC(top) JC(bot) (1) °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953). 6.5 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC SN74LV14A –40°C to 85°C MIN VT+ VT– Positive-going threshold Negative-going threshold ΔVT (VT+ – VT–) Hysteresis VOH VOL High-level output voltage Low-level output voltage TYP SN74LV14A –40°C to 125°C MAX MIN TYP UNIT MAX 2.5 V 1.75 1.75 3.3 V 2.31 2.31 5V 3.5 3.5 2.5 V 0.75 0.75 3.3 V 0.99 0.99 5V 1.5 1.5 2.5 V 0.25 0.25 3.3 V 0.33 0.33 5V 0.5 0.5 V V IOH = –50 μA 2 V to 5.5 V VCC – 0.1 VCC – 0.1 IOH = –2 mA 2.3 V 2 2 IOH = –6 mA 3V 2.48 2.48 IOH = –12 mA 4.5 V 3.8 3.8 IOL = 50 μA 2 V to 5.5 V 0.1 0.1 IOL = 2 mA 2.3 V 0.4 0.4 IOL = 6 mA 3V 0.44 0.44 4.5 V IOL = 12 mA II Input leakage current VI = VCC or GND ICC Static supply current VI = VCC or GND, IO = 0 Ioff Input/Output Power-Off Leakage Current VI or VO = 0 to 5.5 V Ci Input capacitance VI = VCC or GND V V V 0.55 0.55 0 to 5.5 V ±1 ±1 μA 5.5 V 20 20 μA 0 5 5 μA 3.3 V 2.3 2.3 5V 2.3 2.3 pF Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LV14A 5 SN74LV14A www.ti.com SCLS386L – SEPTEMBER 1997 – REVISED DECEMBER 2022 6.6 Switching Characteristics, VCC = 2.5 V ± 0.2 V over recommended operating free-air temperature range (unless otherwise noted) (see Figure 7-1) PARAMETER tpd (1) FROM (INPUT) TO (OUTPUT) A Y LOAD CAPACITANCE SN74LV14A –40°C to 85°C TA = 25°C MIN SN74LV14A –40°C to 125°C UNIT TYP MAX MIN MAX MIN MAX CL = 15 pF 10.2(1) 19.7(1) 1 22 1 23 CL = 50 pF 13.3 24 1 27 1 28 ns On products compliant to MIL-PRF-38535, this parameter is not production tested. 6.7 Switching Characteristics, VCC = 3.3 V ± 0.3 V over recommended operating free-air temperature range (unless otherwise noted) (see Figure 7-1) PARAMETER tpd (1) FROM (INPUT) TO (OUTPUT) A Y LOAD CAPACITANCE SN74LV14A –40°C to 85°C TA = 25°C MIN TYP MAX MIN CL = 15 pF 7.3(1) 12.8(1) CL = 50 pF 9.6 16.3 SN74LV14A –40°C to 125°C UNIT MAX MIN MAX 1 15 1 16 1 18.5 1 19.5 ns On products compliant to MIL-PRF-38535, this parameter is not production tested. 6.8 Switching Characteristics, VCC = 5 V ± 0.5 V over recommended operating free-air temperature range (unless otherwise noted) (see Figure 7-1) PARAMETER tpd (1) FROM (INPUT) TO (OUTPUT) A Y LOAD CAPACITANCE SN74LV14A –40°C to 85°C TA = 25°C MIN SN74LV14A –40°C to 125°C UNIT TYP MAX MIN MAX MIN MAX CL = 15 pF 5.1(1) 8.6(1) 1 10 1 11 CL = 50 pF 6.7 10.6 1 12 1 13 ns On products compliant to MIL-PRF-38535, this parameter is not production tested. 6.9 Noise Characteristics VCC = 3.3 V, CL = 50 pF, TA = 25°C(1) SN74LV14A MIN TYP UNIT MAX VOL(P) Quiet output, maximum dynamic 0.2 0.8 V VOL(V) Quiet output, minimum dynamic –0.1 –0.8 V VOH(V) Quiet output, minimum dynamic VIH(D) High-level dynamic input voltage VIL(D) Low-level dynamic input voltage (1) 3.1 V 2.31 V 0.99 V Characteristics are for surface-mount packages only. 6.10 Operating Characteristics TA = 25°C PARAMETER Cpd 6 Power dissipation capacitance TEST CONDITIONS CL = 50 pF Submit Document Feedback f = 10 MHz VCC TYP UNIT 3.3 V 8.8 5V 9.6 pF Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LV14A SN74LV14A www.ti.com SCLS386L – SEPTEMBER 1997 – REVISED DECEMBER 2022 6.11 Typical Characteristics Figure 6-1. TPD vs VCC Figure 6-2. TPD vs Temperature Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LV14A 7 SN74LV14A www.ti.com SCLS386L – SEPTEMBER 1997 – REVISED DECEMBER 2022 7 Parameter Measurement Information 7.1 A. B. C. D. E. F. G. H. CL includes probe and jig capacitance. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. The outputs are measured one at a time, with one input transition per measurement. tPLZ and tPHZ are the same as tdis. tPZL and tPZH are the same as ten. tPHL and tPLH are the same as tpd. All parameters and waveforms are not applicable to all devices. Figure 7-1. Load Circuit and Voltage Waveforms 8 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LV14A SN74LV14A www.ti.com SCLS386L – SEPTEMBER 1997 – REVISED DECEMBER 2022 8 Detailed Description 8.1 Overview These hex Schmitt-trigger inverters are designed for 2 V to 5.5 V VCC operation. The SN74LV14A devices contain six independent inverters. These devices perform the Boolean function Y = A. These devices are fully specified for partial-power-down application using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. 8.2 Functional Block Diagram Figure 8-1. Logic Diagram, Each Inverter (Positive Logic) 8.3 Feature Description • • • • Wide operating voltage range – Operates From 2 V to 5.5 V Allows up or down voltage translation – Inputs and outputs accept voltages to 5.5 V Ioff feature – Allows voltages on the inputs and outputs when VCC is 0 V Schmitt-trigger inputs allow for slow or noisy inputs 8.4 Device Functional Modes Table 8-1. Function Table (Each Inverter) (1) (2) INPUT(1) A OUTPUT(2) Y H L L H H = High Voltage Level, L = Low Voltage Level, X = Don’t Care H = Driving High, L = Driving Low, Z = High Impedance State Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LV14A 9 SN74LV14A www.ti.com SCLS386L – SEPTEMBER 1997 – REVISED DECEMBER 2022 9 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 9.1 Application Information Schmitt triggers should be used anytime you need to translate a sign wave into a square wave as shown in Figure 9-1. They may also be used where a slow or noisy input needs to be sped up or cleaned up as shown in Figure 9-2. 9.2 Typical Application Figure 9-1. Oscillator Application Schematic Figure 9-2. Switch De-bouncer Schematic 10 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LV14A www.ti.com SN74LV14A SCLS386L – SEPTEMBER 1997 – REVISED DECEMBER 2022 9.2.1 Design Requirements This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads so routing and load conditions should be considered to prevent ringing. 9.2.2 Detailed Design Procedure 1. Recommended Input Conditions: • For rise time and fall time specifcations, see Δt/ΔV in Section 6.3 table. • For specified high and low levels, see VIH and VIL in Section 6.3 table. • Inputs and outputs are overvoltage tolerant allowing them to go as high as 5.5 V at any valid VCC. 2. Recommend Output Conditions: • Load currents should not exceed 35 mA per output and 50 mA total for the part. 9.2.3 Application Curves Figure 9-3. Schmitt Trigger Curves Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LV14A 11 SN74LV14A www.ti.com SCLS386L – SEPTEMBER 1997 – REVISED DECEMBER 2022 10 Power Supply Recommendations The power supply can be any voltage between the MIN and MAX supply voltage rating located in the Section 6.3 table. Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single supply, a 0.1 μF capacitor is recommended. If there are multiple VCC terminals then 0.01 μF or 0.022 μF capacitors are recommended for each power terminal. It is ok to parallel multiple bypass capacitors to reject different frequencies of noise. 0.1 μF and 1.0 μF capacitors are commonly used in parallel. The bypass capacitor should be installed as close to the power terminal as possible for the best results. 11 Layout 11.1 Layout Guidelines When using multiple bit logic devices, inputs should not float. In many cases, functions or parts of functions of digital logic devices are unused. Some examples are when only two inputs of a triple-input AND gate are used, or when only 3 of the 4-buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Specified in the Figure 11-1 are rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or VCC, whichever makes more sense or is more convenient. It is acceptable to float outputs unless the part is a transceiver. 11.2 Layout Example Vcc Unused Input Input Output Unused Input Output Input Figure 11-1. Layout Diagram 12 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LV14A SN74LV14A www.ti.com SCLS386L – SEPTEMBER 1997 – REVISED DECEMBER 2022 12 Device and Documentation Support 12.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 12-1. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY SN54LV14A Click here Click here Click here Click here Click here SN74LV14A Click here Click here Click here Click here Click here 12.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.3 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 12.4 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 12.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 12.6 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LV14A 13 PACKAGE OPTION ADDENDUM www.ti.com 5-Dec-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN74LV14AD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV14A Samples SN74LV14ADBR ACTIVE SSOP DB 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV14A Samples SN74LV14ADGVR ACTIVE TVSOP DGV 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV14A Samples SN74LV14ADR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 LV14A Samples SN74LV14ADRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV14A Samples SN74LV14ANSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 74LV14A Samples SN74LV14APW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV14A Samples SN74LV14APWG4 ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV14A Samples SN74LV14APWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 LV14A Samples SN74LV14APWRG3 ACTIVE TSSOP PW 14 2000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 LV14A Samples SN74LV14APWRG4 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV14A Samples SN74LV14APWT ACTIVE TSSOP PW 14 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV14A Samples SN74LV14ARGYR ACTIVE VQFN RGY 14 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 LV14A Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
SN74LV14ANSRG4 价格&库存

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