SN74LV245AT
www.ti.com
SCLS605D – DECEMBER 2004 – REVISED JULY 2013
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
Check for Samples: SN74LV245AT
FEATURES
DESCRIPTION
•
•
•
•
This octal bus transceiver is designed for
asynchronous two-way communication between data
buses. The control-function implementation minimizes
external timing requirements.
•
•
•
To ensure the high-impedance state during power up
or power down, OE should be tied to VCC through a
pullup resistor; the minimum value of the resistor is
determined by the current-sinking capability of the
driver.
This device is fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow
through the device when it is powered down.
DB, DGV, DW, NS, OR PW PACKAGE
(TOP VIEW)
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
RGY PACKAGE
(TOP VIEW)
A1
A2
A3
A4
A5
A6
A7
A8
VCC
•
The SN74LV245AT allows data transmission from the
A bus to the B bus or from the B bus to the A bus,
depending on the logic level at the direction-control
(DIR) input. The output-enable (OE) input can be
used to disable the device so that the buses are
effectively isolated.
1
20
19 OE
18 B1
2
3
4
5
6
17 B2
16 B3
15 B4
7
8
14 B5
13 B6
12 B7
9
GND
10
11
B8
•
Inputs Are TTL-Voltage Compatible
4.5-V to 5.5-V VCC Operation
Typical tpd of 3.5 ns at 5 V
Typical VOLP (Output Ground Bounce) 2.3 V
at VCC = 5 V, TA = 25°C
Supports Mixed-Mode Voltage Operation on
All Ports
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 1000-V Charged-Device Model (C101)
DIR
1
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2013, Texas Instruments Incorporated
SN74LV245AT
SCLS605D – DECEMBER 2004 – REVISED JULY 2013
www.ti.com
FUNCTION TABLE
(EACH TRANSCEIVER)
INPUTS
OE
DIR
OPERATION
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
LOGIC DIAGRAM (POSITIVE LOGIC)
DIR
1
19
A1
OE
2
18
B1
To Seven Other Channels
2
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SN74LV245AT
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SCLS605D – DECEMBER 2004 – REVISED JULY 2013
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
7
V
VI
Input voltage range (2)
–0.5
7
V
VO
Voltage range applied to any output in the high-impedance or power-off state (2)
–0.5
7
V
VO
Output voltage range applied in the high or low state (2)
–0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0
–20
mA
IOK
Output clamp current
VO < 0 or VO > VCC
±50
mA
IO
Continuous output current
VO = 0 to VCC
±35
mA
±70
mA
(3)
Continuous current through VCC or GND
θJA
(1)
(2)
(3)
(4)
(5)
70
DGV package (4)
92
DW package
Package thermal impedance
Tstg
DB package (4)
(4)
58
NS package (4)
60
PW package (4)
83
RGY package (5)
37
Storage temperature range
–65
°C/W
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
This value is limited to 5.5 V maximum.
The package thermal impedance is calculated in accordance with JESD 51-7.
The package thermal impedance is calculated in accordance with JESD 51-5.
Recommended Operating Conditions (1)
VCC
Supply voltage
VIH
High-level input voltage
VCC = 4.5 V to 5.5 V
VIL
Low-level input voltage
VCC = 4.5 V to 5.5 V
VI
Input voltage
MIN
MAX
4.5
5.5
2
UNIT
V
V
0.8
V
V
0
5.5
High or low state
0
VCC
3-state
0
5.5
VO
Output voltage
IOH
High-level output current
VCC = 4.5 V to 5.5 V
–16
IOL
Low-level output current
VCC = 4.5 V to 5.5 V
16
mA
Δt/Δv
Input transition rise or fall rate
VCC = 4.5 V to 5.5 V
20
ns/V
TA
Operating free-air temperature
125
°C
(1)
–40
V
mA
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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SN74LV245AT
SCLS605D – DECEMBER 2004 – REVISED JULY 2013
www.ti.com
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VOH
VOL
TEST CONDITIONS
SN74LV245AT
SN74LV245AT
SN74LV244A
TA = 25°C
–40°C to
85°C
–40°Cto
125°C
Recommended
VCC
MIN
TYP
IOH = –50 μA
4.5 V
4.4
4.5
IOH = –16 mA
4.5 V
3.8
IOL = 50 μA
4.5 V
IOL = 16 mA
4.5 V
MAX
0
MIN
MAX
MIN
4.4
4.4
3.8
3.75
UNIT
MAX
V
0.1
0.1
0.1
0.55
0.55
0.55
V
II
VI = 5.5 V or GND
0 to 5.5 V
±0.1
±1
±1
μA
IOZ
VO = VCC or GND
5.5 V
±0.25
±2.5
±2.5
μA
ICC
VI = VCC or GND, IO = 0
5.5 V
2
20
20
μA
ΔICC
One input at 3.4 V, Other inputs at
VCC or GND
5.5 V
1.35
1.5
1.5
mA
0.5
5
5
μA
(1)
Ioff
VI or VO = 0 to 5.5 V
0
Ci
Control inputs VI = VCC or GND
5V
3
pF
Cio
A or B port
5V
7
pF
(1)
VO = VCC or GND
This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC.
Switching Characteristics
over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
tPZH
tPZL
tPHz
tPLZ
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
A or B
B or A
CL = 15 pF
OE
A or B
CL = 15 pF
OE
A or B
CL = 15 pF
A or B
B or A
CL = 50 pF
OE
A or B
CL = 50 pF
OE
A or B
CL = 50 pF
tsk(o)
4
–40°C to
85°C
TA = 25°C
–40°C to 125°C
Recommended
MIN
TYP
MAX
MIN
MAX
MIN
MAX
3.1
4.9
7.7
1
8.5
1
9.7
2.3
4.9
7.7
1
8.5
1
9.7
3.5
9.4
13.8
1
15
1
16.3
3.7
9.4
13.8
1
15
1
16.9
3.5
3.9
7.5
1
8
1
8.6
2.6
3.9
7.5
1
8
1
8.6
4.6
5.4
8.7
1
9.5
1
10.7
4.7
5.4
8.7
1
9.5
1
10.7
4.9
9.9
14.8
1
16
1
17.3
5.3
9.9
14.8
1
16
1
17.3
4.5
10.1
15.4
1
16.5
1
17
4.1
10.1
15.4
1
16.5
1
17
CL = 50 pF
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1
1
UNIT
ns
ns
ns
ns
ns
ns
ns
Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: SN74LV245AT
SN74LV245AT
www.ti.com
SCLS605D – DECEMBER 2004 – REVISED JULY 2013
Noise Characteristics (1)
VCC = 5 V, CL = 50 pF
TA = 25°C
PARAMETER
MIN
TYP
MAX
UNIT
VOL(P)
Quiet output, maximum dynamic VOL
1.1
1.5
V
VOL(V)
Quiet output, minimum dynamic VOL
–1.1
–1.5
V
VOH(V)
Quiet output, minimum dynamic VOH
4
VIH(D)
High-level dymanic input voltage
VIL(D)
Low-level dynamic input voltage
(1)
V
2
V
0.8
V
Characteristics are for surface-mount packages only.
Operating Characteristics
VCC = 5 V, TA = 25°C
PARAMETER
Cpd
Power dissipation capacitance
TEST CONDITIONS
Outputs enabled
CL = 50 pF,
f = 10 MHz
TYP
19
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UNIT
pF
5
SN74LV245AT
SCLS605D – DECEMBER 2004 – REVISED JULY 2013
www.ti.com
PARAMETER MEASUREMENT INFORMATION
VCC
From Output
Under Test
Test
Point
RL = 1 kΩ
From Output
Under Test
CL
(see Note A)
S1
Open
TEST
GND
S1
Open
VCC
GND
VCC
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
CL
(see Note A)
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3V
1.5 V
Timing Input
0V
tw
3V
1.5 V
Input
1.5 V
th
tsu
3V
1.5 V
Data Input
1.5 V
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
1.5 V
Input
1.5 V
0V
tPHL
tPLH
VOH
In-Phase
Output
50% VCC
Output
Waveform 1
S1 at VCC
(see Note B)
VOH
50% VCC
1.5 V
1.5 V
0V
tPLZ
tPZL
≈VCC
50% VCC
50% VCC
VOL
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOL + 0.3 V
VOL
tPHZ
tPZH
tPLH
tPHL
Out-of-Phase
Output
50% VCC
VOL
3V
Output
Control
50% VCC
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time, with one input transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPHL and tPLH are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuits and Voltage Waveforms
6
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Product Folder Links: SN74LV245AT
SN74LV245AT
www.ti.com
SCLS605D – DECEMBER 2004 – REVISED JULY 2013
REVISION HISTORY
Changes from Revision B (August 2005) to Revision C
•
Page
Removed Ordering Information table. ................................................................................................................................... 2
Changes from Revision C (October 2012) to Revision D
•
Page
Extended maximum temperature operating range from 85°C to 125°C. .............................................................................. 4
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
SN74LV245ATDBR
ACTIVE
SSOP
DB
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
LV245AT
SN74LV245ATDGVR
ACTIVE
TVSOP
DGV
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
LV245AT
SN74LV245ATDW
ACTIVE
SOIC
DW
20
25
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
LV245AT
SN74LV245ATDWR
ACTIVE
SOIC
DW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
LV245AT
SN74LV245ATNSR
ACTIVE
SO
NS
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
74LV245AT
SN74LV245ATPW
ACTIVE
TSSOP
PW
20
70
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
LV245AT
SN74LV245ATPWR
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
LV245AT
SN74LV245ATRGYR
ACTIVE
VQFN
RGY
20
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
VV245
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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