SN74LVC02APWTG4

SN54LVC02A, SN74LVC02A QUADRUPLE 2-INPUT POSITIVE-NOR GATES www.ti.com SCAS280Q – JANUARY 1993 – REVISED JULY 2005 FEATURES 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4Y 4B 4A 3Y 3B 3A 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC 1 1B NC 2Y NC 2A 13 4Y 2 3 12 4B 4 11 4A 10 3Y 5 6 9 3B 7 8 SN54LVC02A . . . FK PACKAGE (TOP VIEW) 4 3 2 1 20 19 18 5 17 6 16 7 8 15 14 9 10 11 12 13 4B NC 4A NC 3Y 2B GND NC 3A 3B 1 SN74LVC02A . . . RGY PACKAGE (TOP VIEW) VCC 1Y 1A 1B 2Y 2A 2B GND xxxxx 4Y SN54LVC02A . . . J OR W PACKAGE SN74LVC02A . . . D, DB, NS, OR PW PACKAGE (TOP VIEW) xxxxx xxxxx 3A • • Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) 1Y • • • • Operate From 1.65 V to 3.6 V Specified From –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C Inputs Accept Voltages to 5.5 V Max tpd of 4.4 ns at 3.3 V Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C GND • • NC - No internal connection DESCRIPTION/ORDERING INFORMATION The SN54LVC02A quadruple 2-input positive-NOR gate is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVC02A quadruple 2-input positive-NOR gate is designed for 1.65-V to 3.6-V VCC operation. The 'LVC02A devices perform the Boolean function Y = A + B or Y = A ⋅ B in positive logic. ORDERING INFORMATION PACKAGE (1) TA –40°C to 85°C QFN – RGY Tube of 50 SN74LVC02AD Reel of 2500 SN74LVC02ADR Reel of 250 SN74LVC02ADT SOP – NS Reel of 2000 SN74LVC02ANSR LVC02A SSOP – DB Reel of 2000 SN74LVC02ADBR LC02A Tube of 90 SN74LVC02APW Reel of 2000 SN74LVC02APWR Reel of 250 SN74LVC02APWT CDIP – J Tube of 25 SNJ54LVC02AJ SNJ54LVC02AJ CFP – W Tube of 150 SNJ54LVC02AW SNJ54LVC02AW LCCC – FK Tube of 55 SNJ54LVC02AFK SNJ54LVC02AFK TSSOP – PW –55°C to 125°C (1) TOP-SIDE MARKING SN74LVC02ARGYR SOIC – D –40°C to 125°C ORDERABLE PART NUMBER Reel of 1000 LC02A LVC02A LC02A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1993–2005, Texas Instruments Incorporated On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. SN54LVC02A, SN74LVC02A QUADRUPLE 2-INPUT POSITIVE-NOR GATES www.ti.com SCAS280Q – JANUARY 1993 – REVISED JULY 2005 DESCRIPTION/ORDERING INFORMATION (CONTINUED) Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. FUNCTION TABLE (EACH GATE) INPUTS A B OUTPUT Y H X L X H L L L H LOGIC DIAGRAM, EACH GATE (POSITIVE LOGIC) A Y B Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCC MIN MAX Supply voltage range –0.5 6.5 UNIT V range (2) –0.5 6.5 V –0.5 VCC + 0.5 VI Input voltage VO Output voltage range (2) (3) IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA Continuous current through VCC or GND θJA Package thermal impedance D package (4) 86 DB package (4) 96 NS package (4) 76 PW package (4) 113 RGY package (5) Tstg Storage temperature range Ptot Power dissipation (1) (2) (3) (4) (5) (6) (7) 2 °C/W 47 –65 TA = –40°C to 125°C (6) (7) V 150 °C 500 mW Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The value of VCC is provided in the recommended operating conditions table. The package thermal impedance is calculated in accordance with JESD 51-7. The package thermal impedance is calculated in accordance with JESD 51-5. For the D package: above 70°C, the value of Ptot derates linearly with 8 mW/K. For the DB, NS, and PW packages: above 60°C, the value of Ptot derates linearly with 5.5 mW/K. SN54LVC02A, SN74LVC02A QUADRUPLE 2-INPUT POSITIVE-NOR GATES www.ti.com SCAS280Q – JANUARY 1993 – REVISED JULY 2005 Recommended Operating Conditions (1) SN54LVC02A –55°C to 125°C MAX 2 3.6 Operating VCC Supply voltage VIH High-level input voltage VCC = 2.7 V to 3.6 V VIL Low-level input voltage VCC = 2.7 V to 3.6 V VI Input voltage VO Output voltage Data retention only IOH High-level output current IOL Low-level output current (1) MIN 1.5 2 UNIT V V 0.8 V 0 5.5 V 0 VCC V VCC = 2.7 V –12 VCC = 3 V –24 VCC = 2.7 V 12 VCC = 3 V 24 mA mA All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Recommended Operating Conditions (1) SN74LVC02A TA = 25°C VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage VI Input voltage VO Output voltage IOH High-level output current Operating Data retention only VCC = 1.65 V to 1.95 V (1) Low-level output current –40°C to 125°C UNIT MIN MAX MIN MAX MIN MAX 1.65 3.6 1.65 3.6 1.65 3.6 1.5 1.5 1.5 0.65 × VCC 0.65 × VCC 0.65 × VCC VCC = 2.3 V to 2.7 V 1.7 1.7 1.7 VCC = 2.7 V to 3.6 V 2 2 2 V V 0.35 × VCC 0.35 × VCC 0.35 × VCC VCC = 2.3 V to 2.7 V 0.7 0.7 0.7 VCC = 2.7 V to 3.6 V 0.8 0.8 0.8 VCC = 1.65 V to 1.95 V V 0 5.5 0 5.5 0 5.5 V 0 VCC 0 VCC 0 VCC V VCC = 1.65 V –4 –4 –4 VCC = 2.3 V –8 –8 –8 VCC = 2.7 V –12 –12 –12 VCC = 3 V –24 –24 –24 4 4 4 VCC = 1.65 V IOL –40°C to 85°C VCC = 2.3 V 8 8 8 VCC = 2.7 V 12 12 12 VCC = 3 V 24 24 24 mA mA All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 3 SN54LVC02A, SN74LVC02A QUADRUPLE 2-INPUT POSITIVE-NOR GATES www.ti.com SCAS280Q – JANUARY 1993 – REVISED JULY 2005 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54LVC02A PARAMETER TEST CONDITIONS VCC –55°C to 125°C MIN IOH = –100 µA VOH VOL 2.7 V to 3.6 V ICC ∆ICC Ci (1) UNIT MAX VCC – 0.2 2.7 V 2.2 3V 2.4 IOH = –24 mA 3V 2.2 IOL = 100 µA 2.7 V to 3.6 V 0.2 IOL = 12 mA 2.7 V 0.4 3V 0.55 IOH = –12 mA IOL = 24 mA II TYP V V VI = 5.5 V or GND 3.6 V ±5 µA VI = VCC or GND, IO = 0 3.6 V 10 µA 2.7 V to 3.6 V 500 µA One input at VCC – 0.6 V, Other inputs at VCC or GND VI = VCC or GND 5 (1) 3.3 V pF TA = 25°C Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) SN74LVC02A PARAMETER TEST CONDITIONS VCC TA = 25°C MIN IOH = –100 µA VOH VOL ICC ∆ICC Ci 4 MIN MAX –40°C to 125°C MIN VCC – 0.2 VCC – 0.2 VCC – 0.3 1.65 V 1.29 1.2 1.05 IOH = –8 mA 2.3 V 1.9 1.7 1.55 2.7 V 2.2 2.2 2.05 3V 2.4 2.4 2.25 IOH = –24 mA 3V 2.3 2.2 2 IOL = 100 µA UNIT MAX V 1.65 V to 3.6 V 0.1 0.2 IOL = 4 mA 1.65 V 0.24 0.45 0.6 IOL = 8 mA 2.3 V 0.3 0.7 0.75 IOL = 12 mA 2.7 V 0.4 0.4 0.6 3V IOL = 24 mA II –40°C to 85°C MAX IOH = –4 mA IOH = –12 mA 1.65 V to 3.6 V TYP 0.3 V 0.55 0.55 0.8 VI = 5.5 V or GND 3.6 V ±1 ±5 ±20 µA VI = VCC or GND, IO = 0 3.6 V 1 10 40 µA 500 500 5000 µA One input at VCC – 0.6 V, Other inputs at VCC or GND VI = VCC or GND 2.7 V to 3.6 V 3.3 V 5 pF SN54LVC02A, SN74LVC02A QUADRUPLE 2-INPUT POSITIVE-NOR GATES www.ti.com SCAS280Q – JANUARY 1993 – REVISED JULY 2005 Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) SN54LVC02A FROM (INPUT) PARAMETER TO (OUTPUT) VCC –55°C to 125°C MIN tpd A or B 2.7 V Y 5.4 3.3 V ± 0.3 V 1 UNIT MAX 4.4 ns Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) SN74LVC02A PARAMETER tpd FROM (INPUT) A or B TO (OUTPUT) Y tsk(o) VCC TA = 25°C –40°C to 85°C –40°C to 125°C MIN TYP MAX MIN MAX MIN MAX 1.8 V ± 0.15 V 1 3.8 8.4 1 8.9 1 10.4 2.5 V ± 0.2 V 1 2.9 6.9 1 7.4 1 9.5 2.7 V 1 3 5.2 1 5.4 1 7 3.3 V ± 0.3 V 1 3.6 4.2 1 4.4 1 5.5 3.3 V ± 0.3 V 1 UNIT ns 1.5 ns VCC TYP UNIT 1.8 V 7.5 2.5 V 8.5 3.3 V 9.5 Operating Characteristics TA = 25°C PARAMETER Cpd Power dissipation capacitance per gate TEST CONDITIONS f = 10 MHz pF 5 SN54LVC02A, SN74LVC02A QUADRUPLE 2-INPUT POSITIVE-NOR GATES www.ti.com SCAS280Q – JANUARY 1993 – REVISED JULY 2005 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 2.7 V 3.3 V ± 0.3 V VI tr/tf VCC VCC 2.7 V 2.7 V ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V 1.5 V 2 × VCC 2 × VCC 6V 6V 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH VOH Output VM VOL tPHL VM VM 0V Output Waveform 1 S1 at VLOAD (see Note B) tPLH tPLZ VLOAD/2 VM tPZH VOH Output VM tPZL tPHL VM VI Output Control VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + V∆ VOL tPHZ VM VOH - V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 6 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-9760401Q2A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629760401Q2A SNJ54LVC 02AFK 5962-9760401QCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9760401QC A SNJ54LVC02AJ 5962-9760401QDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9760401QD A SNJ54LVC02AW SN74LVC02AD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LVC02A Samples SN74LVC02ADBR ACTIVE SSOP DB 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LC02A Samples SN74LVC02ADR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LVC02A Samples SN74LVC02ADRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LVC02A Samples SN74LVC02ANSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LVC02A Samples SN74LVC02APW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LC02A Samples SN74LVC02APWE4 ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LC02A Samples SN74LVC02APWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LC02A Samples SN74LVC02APWT ACTIVE TSSOP PW 14 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LC02A Samples SN74LVC02ARGYR ACTIVE VQFN RGY 14 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 LC02A Samples SNJ54LVC02AFK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629760401Q2A SNJ54LVC 02AFK SNJ54LVC02AJ ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9760401QC A SNJ54LVC02AJ Addendum-Page 1 Samples Samples Samples Samples Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 14-Oct-2022 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) (3) Device Marking Samples (4/5) (6) SNJ54LVC02AW ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9760401QD A SNJ54LVC02AW (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of