SN74LVC04APWR

Product Folder Sample & Buy Technical Documents Support & Community Tools & Software SN54LVC04A, SN74LVC04A SCAS281T – JANUARY 1993 – REVISED NOVEMBER 2016 SNx4LVC04A Hex Inverters 1 Features 3 Description • • The SNx4LVC04A hex inverters contains six independent inverters designed for 2.7-V to 3.6-V VCC operation, and the SN74LVC04A hex inverter contains six independent inverters designed for 1.65-V to 3.6-V VCC operation. The SNx4LVC04A devices perform the Boolean function Y = A. 1 • • • • • • Operate From 1.65 V to 3.6 V Specified From –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C Inputs Accept Voltages to 5.5 V Maximum tpd of 4.5 ns at 3.3 V Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) Inputs can be driven from 1.8-V or 3.3-V devices. This feature allows the use of these devices as translators in a mixed 1.8-V or 3.3-V system environment. Device Information(1) PART NUMBER SN54LVC04A 2 Applications • • • • • • Power Sub-Station Controls Ethernet Switches Flow Meters I/O Modules and Digital PLC/DCS Inputs Servers Tests and Measurement SN74LVC04A PACKAGE BODY SIZE (NOM) CDIP (14) 19.56 mm × 6.67 mm CFP (14) 9.21 mm × 5.97 mm LCCC (20) 8.89 mm × 8.89 mm SOIC (14) 8.65 mm × 3.91 mm SSOP (14) 6.20 mm × 5.30 mm TVSOP (14) 3.60 mm × 4.40 mm SOP (14) 6.20 mm × 5.30 mm TSSOP (14) 5.00 mm × 4.40 mm VQFN (14) 3.50 mm × 3.50 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Logic Diagram, Each Inverter (Positive Logic) A Y Copyright © 2016, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. SN54LVC04A, SN74LVC04A SCAS281T – JANUARY 1993 – REVISED NOVEMBER 2016 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 5 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 5 5 5 6 6 7 7 8 8 9 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information – SN54LVC04A ....................... Thermal Information – SN74LVC04A ....................... Electrical Characteristics – SN54LVC04A ................ Electrical Characteristics – SN74LVC04A ................ Switching Characteristics .......................................... Operating Characteristics.......................................... Typical Characteristics ............................................ Parameter Measurement Information ................ 10 Detailed Description ............................................ 11 8.1 Overview ................................................................. 11 8.2 Functional Block Diagram ....................................... 11 8.3 Feature Description................................................. 11 8.4 Device Functional Modes........................................ 11 9 Application and Implementation ........................ 12 9.1 Application Information............................................ 12 9.2 Typical Application .................................................. 12 10 Power Supply Recommendations ..................... 13 11 Layout................................................................... 13 11.1 Layout Guidelines ................................................. 13 11.2 Layout Example .................................................... 13 12 Device and Documentation Support ................. 14 12.1 12.2 12.3 12.4 12.5 12.6 12.7 Documentation Support ........................................ Related Links ........................................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 14 14 14 14 14 14 14 13 Mechanical, Packaging, and Orderable Information ........................................................... 14 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision S (October 2010) to Revision T Page • Added Applications section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section................................................................ 1 • Deleted Ordering Information table; see Package Option Addendum at the end of the data sheet ...................................... 1 • Added Thermal Information Table – SN54LVC04A ............................................................................................................... 6 • Changed Package thermal impedance, RθJA, values in Thermal Information – SN74LVC04A From: 96 To: 113.1 (DB), From: 127 To: 142.7 (DGV), From: 76 To: 95.4 (NS), From: 113 To: 129.5 (PW), and From: 47 To: 63.2 (RGY) ..... 6 2 Submit Documentation Feedback Copyright © 1993–2016, Texas Instruments Incorporated Product Folder Links: SN54LVC04A SN74LVC04A SN54LVC04A, SN74LVC04A www.ti.com SCAS281T – JANUARY 1993 – REVISED NOVEMBER 2016 5 Pin Configuration and Functions D, DB, DGV, J, NS, PW, or W Package 14-Pin SOIC, SSOP, TVSOP, CDIP, SOP, TSSOP, or CFP Top View 1Y 2 13 6A 2A 3 12 6Y 2Y 4 11 5A 3A 5 10 5Y 3Y 6 9 4A GND 7 8 4Y 1Y 2A 2Y 3A 3Y VCC VCC 1 14 2 13 6A 3 12 6Y 4 11 5A 5 10 5Y 6 9 4A 7 8 4Y 14 1A 1 GND 1A RGY Package 14-Pin VQFN With Exposed Thermal Pad Top View Not to scale 1Y 1A NC VCC 6A 3 2 1 20 19 FK Package 20-Pin LCCC Top View 5 17 NC 2Y 6 16 5A NC 7 15 NC 3A 8 14 5Y 4A 4Y NC GND 3Y 13 NC 12 6Y 11 18 10 4 9 2A Not to scale Copyright © 1993–2016, Texas Instruments Incorporated Product Folder Links: SN54LVC04A SN74LVC04A Submit Documentation Feedback 3 SN54LVC04A, SN74LVC04A SCAS281T – JANUARY 1993 – REVISED NOVEMBER 2016 www.ti.com Pin Functions PIN I/O DESCRIPTION D, DB, DGV, J, NS, PW, RGY, W FK, LCCC 1A 1 2 I Channel 1 input 1Y 2 3 O Channel 1 output 2A 3 4 I Channel 2 input 2Y 4 6 O Channel 2 output 3A 5 8 I Channel 3 input 3Y 6 9 O Channel 3 output 4A 9 13 I Channel 4 input 4Y 8 12 O Channel 4 output 5A 11 16 I Channel 5 input 5Y 10 14 O Channel 5 output 6A 13 19 I Channel 6 input 6Y 12 18 O Channel 6 output GND 7 10 — Ground NC — 1, 5, 7, 11, 15, 17 — No internal connection VCC 14 20 — Power supply NAME 4 Submit Documentation Feedback Copyright © 1993–2016, Texas Instruments Incorporated Product Folder Links: SN54LVC04A SN74LVC04A SN54LVC04A, SN74LVC04A www.ti.com SCAS281T – JANUARY 1993 – REVISED NOVEMBER 2016 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) Supply voltage, VCC Input voltage, VI (2) Output voltage, VO (2) (3) MIN MAX UNIT –0.5 6.5 V –0.5 6.5 V –0.5 VCC + 0.5 V Input clamp current, IIK VI < 0 –50 mA Output clamp current, IOK VO < 0 –50 mA Continuous output current, IO ±50 mA Continuous current through VCC or GND ±100 mA 500 mW 150 °C 150 °C Power dissipation, Ptot TA = –40°C to 125°C (4) (5) Maximum virtual junction temperature, TJ(MAX) Storage temperature, Tstg (1) (2) (3) (4) (5) –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The value of VCC is provided in Recommended Operating Conditions. For the D package: above 70°C, the value of Ptot derates linearly with 8 mW/K. For the DB, DGV, NS, and PW packages: above 60°C, the value of Ptot derates linearly with 5.5 mW/K. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) ±1000 Machine Model (MM) ±200 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) (1) VCC Supply voltage Operating MIN MAX SN54LVC04A 2 3.6 SN74LVC04A 1.65 3.6 Data retention only VCC = 1.65 V to 1.95 V, SN74LVC04A only VIH High-level input voltage VCC = 2.3 V to 2.7 V, SN74LVC04A only VCC = 2.7 V to 3.6 V UNIT V 1.5 0.65 × VCC 1.7 V 2 VCC = 1.65 V to 1.95 V, SN74LVC04A only 0.35 × VCC VIL Low-level input voltage VCC = 2.3 V to 2.7 V, SN74LVC04A only 0.7 VI Input voltage 0 5.5 V VO Output voltage 0 VCC V VCC = 2.7 V to 3.6 V VCC = 1.65 V, SN74LVC04A only IOH (1) High-level output current VCC = 2.3 V, SN74LVC04A only V 0.8 –4 –8 VCC = 2.7 V –12 VCC = 3 V –24 mA All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See TI application report, Implications of Slow or Floating CMOS Inputs (SCBA004). Copyright © 1993–2016, Texas Instruments Incorporated Product Folder Links: SN54LVC04A SN74LVC04A Submit Documentation Feedback 5 SN54LVC04A, SN74LVC04A SCAS281T – JANUARY 1993 – REVISED NOVEMBER 2016 www.ti.com Recommended Operating Conditions (continued) over operating free-air temperature range (unless otherwise noted)(1) MIN MAX VCC = 1.65 V, SN74LVC04A only IOL Low-level output current UNIT 4 VCC = 2.3 V, SN74LVC04A only 8 VCC = 2.7 V 12 VCC = 3 V 24 mA 6.4 Thermal Information – SN54LVC04A SN54LVC04A THERMAL METRIC (1) J (CDIP) W (CFP) FK (LCCC) 14 PINS 14 PINS 20 PINS UNIT 92 158.2 85 °C/W RθJA Junction-to-ambient thermal resistance RθJC(top) Junction-to-case (top) thermal resistance 55.1 88.7 62.5 °C/W RθJB Junction-to-board thermal resistance 80.5 156.5 61.2 °C/W ψJT Junction-to-top characterization parameter 40.2 58.5 55.8 °C/W ψJB Junction-to-board characterization parameter 74.2 135.5 61.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 25.3 15.3 10.4 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.5 Thermal Information – SN74LVC04A SN74LVC04A THERMAL METRIC (1) D (SOIC) DB (SSOP) DGV (TVSOP) NS (SOP) PW (TSSOP) RGY (VQFN) UNIT 14 PINS 14 PINS 14 PINS 14 PINS 14 PINS 14 PINS RθJA Junction-to-ambient thermal resistance 105.7 113.1 142.7 95.4 129.5 63.2 °C/W RθJC(top) Junction-to-case (top) thermal resistance 50.8 65.1 61.9 53.2 57.9 61 °C/W RθJB Junction-to-board thermal resistance 46.1 60.5 72.1 54.2 71.3 39.1 °C/W ψJT Junction-to-top characterization parameter 8.2 29.1 10.1 21.9 9.9 5.2 °C/W ψJB Junction-to-board characterization parameter 45.6 60 71.4 53.8 70.7 39.1 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance — — — — — 20.3 °C/W (1) 6 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Documentation Feedback Copyright © 1993–2016, Texas Instruments Incorporated Product Folder Links: SN54LVC04A SN74LVC04A SN54LVC04A, SN74LVC04A www.ti.com SCAS281T – JANUARY 1993 – REVISED NOVEMBER 2016 6.6 Electrical Characteristics – SN54LVC04A over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN IOH = –100 µA, VCC = 2.7 V to 3.6 V VOH High-level output voltage TYP IOH = –12 mA 2.2 VCC = 3 V 2.4 V 2.2 IOL = 100 µA, VCC = 2.7 V to 3.6 V Low-level output voltage UNIT VCC – 0.2 VCC = 2.7 V IOH = –24 mA, VCC = 3 V VOL MAX 0.2 IOL = 12 mA, VCC = 2.7 V 0.4 IOL = 24 mA, VCC = 3 V V 0.55 II Input current VI = 5.5 V or GND, VCC = 3.6 V ±5 µA ICC Supply current VI = VCC or GND, IO = 0, VCC = 3.6 V 10 µA Change in supply current One input at VCC – 0.6 V, Other inputs at VCC or GND, VCC = 2.7 V to 3.6 V 500 µA MAX UNIT ΔICC 6.7 Electrical Characteristics – SN74LVC04A over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –100 µA, VCC = 1.65 V to 3.6 V MIN TA = 25°C VCC – 0.2 TA = –40°C to 125°C VCC – 0.3 TA = 25°C IOH = –4 mA, VCC = 1.65 V 1.29 TA = –40°C to 85°C 1.2 TA = –40°C to 125°C 1.05 TA = 25°C IOH = –8 mA, VCC = 2.3 V VOH High-level output voltage 1.7 TA = –40°C to 125°C 1.55 IOH = –12 mA VCC = 3 V IOH = –24 mA, VCC = 3 V 1.9 TA = –40°C to 85°C VCC = 2.7 V TA = 25°C IOL = 4 mA, VCC = 1.65 V VOL Low-level output voltage IOL = 8 mA, VCC = 2.3 V IOL = 12 mA, VCC = 2.7 V IOL = 24 mA, VCC = 3 V II Input current VI = 5.5 V or GND, VCC = 3.6 V V 2.2 TA = –40°C to 125°C TA = 25°C 2.05 2.4 TA = –40°C to 125°C 2.25 TA = 25°C 2.3 TA = –40°C to 85°C 2.2 TA = –40°C to 125°C IOL = 100 µA, VCC = 1.65 V to 3.6 V TYP 2 TA = 25°C 0.1 TA = –40°C to 85°C 0.2 TA = –40°C to 125°C 0.3 TA = 25°C 0.24 TA = –40°C to 85°C 0.45 TA = –40°C to 125°C 0.6 TA = 25°C 0.3 TA = –40°C to 85°C 0.7 TA = –40°C to 125°C 0.85 TA = 25°C TA = –40°C to 125°C TA = 25°C 0.4 0.6 0.55 TA = –40°C to 125°C 0.8 TA = 25°C ±1 TA = –40°C to 85°C ±5 TA = –40°C to 125°C ±20 Copyright © 1993–2016, Texas Instruments Incorporated Product Folder Links: SN54LVC04A SN74LVC04A V Submit Documentation Feedback µA 7 SN54LVC04A, SN74LVC04A SCAS281T – JANUARY 1993 – REVISED NOVEMBER 2016 www.ti.com Electrical Characteristics – SN74LVC04A (continued) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX TA = 25°C ICC Supply current VI = VCC or GND, IO = 0, VCC = 3.6 V ΔICC One input at VCC – 0.6 V, Change in supply other inputs at VCC or GND, current VCC = 2.7 V to 3.6 V Ci Input capacitance VI = VCC or GND, VCC = 3.3 V UNIT 1 TA = –40°C to 85°C 10 TA = –40°C to 125°C 40 TA = 25°C µA 500 TA = –40°C to 125°C µA 5000 5 pF 6.8 Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted; see Figure 2) PARAMETER TEST CONDITIONS VCC = 1.8 V ±0.15 V, SN74LVC04A only VCC = 2.5 V ±0.2 V, SN74LVC04A only MIN TYP MAX UNIT TA = 25°C 1 TA = –40°C to 85°C 1 4.1 TA = –40°C to 125°C 1 TA = 25°C 1 TA = –40°C to 85°C 1 7.5 TA = –40°C to 125°C 1 9 8 9.5 3.6 TA = –55°C to 125°C, SN54LVC04A tpd Propagation (delay) time From A (input) to Y (output) VCC = 2.7 V VCC = 3.3 V ±0.3 V tsk(o) Skew (time), output VCC = 3.3 V ±0.3 V, SN74LVC04A only 7.5 7 5.5 TA = 25°C, SN74LVC04A 1 TA = –40°C to 85°C, SN74LVC04A 1 5.5 TA = –40°C to 125°C, SN74LVC04A 1 7 TA = –55°C to 125°C, SN54LVC04A 0.5 4.5 3 5.3 TA = 25°C, SN74LVC04A 1 TA = –40°C to 85°C, SN74LVC04A 1 4.5 TA = –40°C to 125°C, SN74LVC04A 1 6 2.5 TA = –40°C to 85°C ns 4.3 1 TA = –40°C to 125°C ns 1.5 6.9 Operating Characteristics TA = 25°C (unless otherwise noted) PARAMETER Cpd 8 Power dissipation capacitance per gate TEST CONDITIONS f = 10 MHz, TA = 25°C Submit Documentation Feedback MIN TYP VCC = 1.8 V 6 VCC = 2.5 V 7 VCC = 3.3 V 8 MAX UNIT pF Copyright © 1993–2016, Texas Instruments Incorporated Product Folder Links: SN54LVC04A SN74LVC04A SN54LVC04A, SN74LVC04A www.ti.com SCAS281T – JANUARY 1993 – REVISED NOVEMBER 2016 6.10 Typical Characteristics 3.6 VIH (MIN) VIL(MAX) Input or Output Voltage Level [V] 3.3 3 2.7 2.4 2.1 1.8 1.5 1.2 0.9 0.6 0.3 0 1.5 1.8 2.1 2.4 2.7 3 Supply Voltage (VCC) [V] 3.3 3.6 D002 Figure 1. VIH Minimum and VIL Maximum vs Supply Voltage Copyright © 1993–2016, Texas Instruments Incorporated Product Folder Links: SN54LVC04A SN74LVC04A Submit Documentation Feedback 9 SN54LVC04A, SN74LVC04A SCAS281T – JANUARY 1993 – REVISED NOVEMBER 2016 www.ti.com 7 Parameter Measurement Information VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 2.7 V 3.3 V ± 0.3 V VI tr/tf VCC VCC 2.7 V 2.7 V ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL VΔ VCC/2 VCC/2 1.5 V 1.5 V 2 × VCC 2 × VCC 6V 6V 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM th VI VM Data Input VM VM 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VI VM Input 0V VOH VM Output VM VOL VM 0V VLOAD/2 VM VOL + VΔ tPZH VOH Output VM tPLZ Output Waveform 1 S1 at VLOAD (see Note B) tPLH tPHL VM tPZL tPHL tPLH VI Output Control VM VM VOL tPHZ Output Waveform 2 S1 at GND (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VM VOH – VΔ ≈0 V CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. VOH VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING A. F. VOL Figure 2. Load Circuit and Voltage Waveforms 10 Submit Documentation Feedback Copyright © 1993–2016, Texas Instruments Incorporated Product Folder Links: SN54LVC04A SN74LVC04A SN54LVC04A, SN74LVC04A www.ti.com SCAS281T – JANUARY 1993 – REVISED NOVEMBER 2016 8 Detailed Description 8.1 Overview These hex inverters are designed for 1.65-V to 3.6-V VCC operation. The SN74LVC04A devices contain six independent inverters. These devices perform the Boolean function Y = A. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The inputs are high impedance when VCC = 0V. 8.2 Functional Block Diagram A Y Copyright © 2016, Texas Instruments Incorporated 8.3 Feature Description Wide operating voltage range from 1.65 V to 3.6 V. Allows down-voltage translation with inputs accept voltages to 3.6 V. IOFF feature supports live insertion, partial power down mode, and back drive protection. 8.4 Device Functional Modes Table 1 lists the functional modes of the SNx4LVC04A. Table 1. Function Table (Each Inverter) INPUT A OUTPUT Y H L L H Copyright © 1993–2016, Texas Instruments Incorporated Product Folder Links: SN54LVC04A SN74LVC04A Submit Documentation Feedback 11 SN54LVC04A, SN74LVC04A SCAS281T – JANUARY 1993 – REVISED NOVEMBER 2016 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information SN74LVC04A is a low-drive CMOS device that can be used for a multitude of bus interface type applications where output ringing is a concern. The low drive and slow edge rates minimize overshoot and undershoot on the outputs. The inputs can accept voltages to 3.6 V at any valid VCC making it Ideal for down translation. 9.2 Typical Application 3.3V regulated 1.8V or 3.3V accessory 0.1 µF Copyright © 2016, Texas Instruments Incorporated Figure 3. Typical Application Schematic 9.2.1 Design Requirements This device uses CMOS technology and has balanced output drive. Take care to avoid bus contention, because it can drive currents that would exceed maximum limits. The high drive also creates fast edges into light loads, so routing and load conditions must be considered to prevent ringing. 9.2.2 Detailed Design Procedure Recommended Input Conditions: • For rise time and fall time specifications, see Δt/ΔV in Recommended Operating Conditions. • For specified high and low levels, see VIH and VIL in Recommended Operating Conditions. • Inputs are overvoltage tolerant allowing them to go as high as 3.6 V at any valid VCC. Recommend Output Conditions: • Load currents must not exceed 25 mA per output and 50 mA total for the part. • Outputs must not be pulled above VCC. 12 Submit Documentation Feedback Copyright © 1993–2016, Texas Instruments Incorporated Product Folder Links: SN54LVC04A SN74LVC04A SN54LVC04A, SN74LVC04A www.ti.com SCAS281T – JANUARY 1993 – REVISED NOVEMBER 2016 Typical Application (continued) 9.2.3 Application Curves 4.2 Propagation Delay (tPD) [ns] 4 3.8 3.6 3.4 3.2 3 2.8 2.6 2.4 1.8 2 2.2 2.4 2.6 2.8 Supply Voltage (VCC) [V] 3 3.2 3.4 D001 Figure 4. Typical Application Curve 10 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in the Recommended Operating Conditions. Each VCC pin must have a good bypass capacitor to prevent power disturbance. For devices with a single supply, 0.1 µF is recommended. If there are multiple VCC pins, 0.01 µF or 0.022 µF is recommended for each power pin. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. A 0.1 µF and 1 µF are commonly used in parallel. The bypass capacitor must be installed as close to the power pin as possible for best results. 11 Layout 11.1 Layout Guidelines When using multiple bit logic devices, inputs must not float. In many cases, functions or parts of functions of digital logic devices are unused. Some examples are when only two inputs of a triple-input AND gate are used, or when only 3 of the 4-buffer gates are used. Such input pins must not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Specified in Figure 5 are rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that must be applied to any particular unused input depends on the function of the device. Generally they are tied to GND or VCC, whichever makes more sense or is more convenient. It is acceptable to float outputs unless the part is a transceiver. If the transceiver has an output enable pin, it disables the outputs section of the part when asserted. This does not disable the input section of the I/Os so they also cannot float when disabled. 11.2 Layout Example Vcc Input Unused Input Output Unused Input Output Input Figure 5. Layout Diagram Copyright © 1993–2016, Texas Instruments Incorporated Product Folder Links: SN54LVC04A SN74LVC04A Submit Documentation Feedback 13 SN54LVC04A, SN74LVC04A SCAS281T – JANUARY 1993 – REVISED NOVEMBER 2016 www.ti.com 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 Related Documentation For related documentation see the following: Implications of Slow or Floating CMOS Inputs (SCBA004) 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 2. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY SN54LVC04A Click here Click here Click here Click here Click here SN74LVC04A Click here Click here Click here Click here Click here 12.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.4 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.5 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.6 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.7 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 14 Submit Documentation Feedback Copyright © 1993–2016, Texas Instruments Incorporated Product Folder Links: SN54LVC04A SN74LVC04A PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-9760501Q2A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629760501Q2A SNJ54LVC 04AFK 5962-9760501QCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9760501QC A SNJ54LVC04AJ 5962-9760501QDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9760501QD A SNJ54LVC04AW SN74LVC04AD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LVC04A Samples SN74LVC04ADBR ACTIVE SSOP DB 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LC04A Samples SN74LVC04ADBRG4 ACTIVE SSOP DB 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LC04A Samples SN74LVC04ADGVR ACTIVE TVSOP DGV 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LC04A Samples SN74LVC04ADGVRE4 ACTIVE TVSOP DGV 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LC04A Samples SN74LVC04ADR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 LVC04A Samples SN74LVC04ADRG3 ACTIVE SOIC D 14 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 LVC04A Samples SN74LVC04ADRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LVC04A Samples SN74LVC04ADT ACTIVE SOIC D 14 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LVC04A Samples SN74LVC04ANSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LVC04A Samples SN74LVC04APW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LC04A Samples SN74LVC04APWE4 ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LC04A Samples SN74LVC04APWG4 ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LC04A Samples SN74LVC04APWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 LC04A Samples Addendum-Page 1 Samples Samples Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 10-Jun-2022 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN74LVC04APWRE4 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LC04A Samples SN74LVC04APWRG3 ACTIVE TSSOP PW 14 2000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 LC04A Samples SN74LVC04APWRG4 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LC04A Samples SN74LVC04APWT ACTIVE TSSOP PW 14 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LC04A Samples SN74LVC04APWTG4 ACTIVE TSSOP PW 14 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LC04A Samples SN74LVC04ARGYR ACTIVE VQFN RGY 14 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 LC04A Samples SN74LVC04ARGYRG4 ACTIVE VQFN RGY 14 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 LC04A Samples SNJ54LVC04AFK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629760501Q2A SNJ54LVC 04AFK SNJ54LVC04AJ ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9760501QC A SNJ54LVC04AJ SNJ54LVC04AW ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9760501QD A SNJ54LVC04AW (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of