SN74LVC06AMDREP

SN74LVC06A-EP HEX INVERTER BUFFER/DRIVER WITH OPEN DRAIN OUTPUTS www.ti.com SCAS832A – APRIL 2007 – REVISED MAY 2007 FEATURES • • • • • • • • • • (1) Controlled Baseline – One Assembly Site – One Test Site – One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product Change Notification Qualification Pedigree (1) Operates From 1.65 V to 3.6 V Inputs and Open Drain Outputs Accept Voltages up to 5.5 V Max tpd of 3.7 ns at 3.3 V Ioff Supports Partial Power Down Mode Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 D PACKAGE (TOP VIEW) 1A 1Y 2A 2Y 3A 3Y GND 1 14 2 13 3 12 4 11 5 10 6 7 9 8 VCC 6A 6Y 5A 5Y 4A 4Y Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. DESCRIPTION/ORDERING INFORMATION The SN74LVC06A is a hex inverter buffer/driver that is designed for 1.65-V to 3.6-V VCC operation. The outputs of the SN74LVC06A device are open drain and can be connected to other open-drain outputs to implement active low wired OR or active high wired AND functions. The maximum sink current is 24 mA. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5 V system environment. This device is fully specified for partial power down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. FUNCTION TABLE (EACH INVERTER) INPUT A OUTPUT Y H L L H Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007, Texas Instruments Incorporated SN74LVC06A-EP HEX INVERTER BUFFER/DRIVER WITH OPEN DRAIN OUTPUTS www.ti.com SCAS832A – APRIL 2007 – REVISED MAY 2007 LOGIC DIAGRAM, EACH INVERTER (POSITIVE LOGIC) A Y ORDERING INFORMATION (1) PACKAGE (2) TA –55°C to 125°C (1) (2) SOIC – D Reel of 2500 ORDERABLE PART NUMBER TOP-SIDE MARKING SN74LVC06AMDREP LVC06AM For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 6.5 V VI Input voltage range (2) –0.5 6.5 V VO Output voltage range –0.5 6.5 V IIK Input clamp current VI < 0 V –50 mA IOK Output clamp current VO < 0 V –50 mA IO Continuous output current ±50 mA ±100 Continuous current through VCC or GND θJA Package thermal impedance (3) Tstg Storage temperature range Ptot Power dissipation (4) (1) (2) (3) (4) 86 –65 TA = –55°C to 125°C mA °C/W 150 °C 500 mW Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51-7. Above 70°C the value of Ptot derates linearly with 8 mW/K. Recommended Operating Conditions (1) TA = 25°C VCC Supply voltage VIH High-level input voltage VIL Data retention only MAX MIN MAX 1.65 3.6 1.65 3.6 1.5 1.5 0.65 × VCC 0.65 × VCC VCC = 2.3 V to 2.7 V 1.7 1.7 VCC = 2.7 V to 3.6 V 2 2 VCC = 1.65 V to 1.95 V V V 0.35 × VCC 0.35 × VCC VCC = 2.3 V to 2.7 V 0.7 0.7 VCC = 2.7 V to 3.6 V 0.8 0.8 VCC = 1.65 V to 1.95 V UNIT V VI Input voltage 0 5.5 0 5.5 V VO Output voltage 0 5.5 0 5.5 V (1) 2 Low-level input voltage Operating –55°C to 125°C MIN All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Submit Documentation Feedback SN74LVC06A-EP HEX INVERTER BUFFER/DRIVER WITH OPEN DRAIN OUTPUTS www.ti.com SCAS832A – APRIL 2007 – REVISED MAY 2007 Recommended Operating Conditions (continued) TA = 25°C MIN IOL Low-level output current –55°C to 125°C MAX MIN MAX VCC = 1.65 V 4 4 VCC = 2.3 V 8 8 VCC = 2.7 V 12 12 VCC = 3 V 24 24 UNIT mA Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC IOL = 100 µA VOL MIN MAX IOL = 4 mA 1.65 V 0.24 0.6 IOL = 8 mA 2.3 V 0.3 0.75 IOL = 12 mA 2.7 V 0.4 0.6 3V VI = 5.5 V or GND VI or VO = 5.5 V ICC VI = VCC or GND, IO = 0 CI –55°C to 125°C MAX 0.1 Ioff ∆ICC TYP 1.65 V to 3.6 V IOL = 24 mA II TA = 25°C MIN One input at VCC – 0.6 V, Other inputs at VCC or GND 0.3 V 0.55 0.8 3.6 V ±1 ±20 µA 0V ±1 ±20 µA 3.6 V 1 40 µA 500 5000 µA 2.7 V to 3.6 V VI = VCC or GND UNIT 3.3 V 5 pF Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER tpd FROM (INPUT) A TO (OUTPUT) Y VCC TA = 25°C MIN –55°C to 125°C TYP MAX MIN MAX 1.8 V ± 0.15 V 1.4 3 5.1 1.4 7.6 2.5 V ± 0.2 V 1 1.9 2.8 1 4 2.7 V 1 2.4 3.7 1 5 3.3 V ± 0.3 V 1 2.2 3.5 1 5 VCC TYP 1.8 V 2.1 2.5 V 2.3 3.3 V 2.5 UNIT ns Operating Characteristics TA = 25°C PARAMETER Cpd Power dissipation capacitance per buffer/driver Submit Documentation Feedback TEST CONDITIONS f = 10 MHz UNIT pF 3 SN74LVC06A-EP HEX INVERTER BUFFER/DRIVER WITH OPEN DRAIN OUTPUTS www.ti.com SCAS832A – APRIL 2007 – REVISED MAY 2007 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test Open TEST GND RL CL (see Note A) S1 tPZL (see Notes E and F) VLOAD tPLZ (see Notes E and G) VLOAD tPHZ/tPZH VLOAD LOAD CIRCUIT INPUT VCC VI 1.8 V ± 0.15 V 2.5 V ± 0.2 V 2.7 V 3.3 V ± 0.3 V VM tr/tf ≤ 2 ns ≤ 2 ns ≤ 2.5 ns ≤ 2.5 ns VCC VCC 2.7 V 2.7 V VLOAD VCC/2 VCC/2 1.5 V 1.5 V 2 × VCC 2 × VCC 6V 6V CL RL V∆ 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu th VI VM Input VM VM Data Input VM 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VI VM Input VM 0V Output VM VOL tPHL VM VM 0V Output Waveform 1 S1 at VLOAD (see Note B) tPLH tPLZ VLOAD/2 VM tPZH VOH Output VM tPZL VOH VM VI Output Control tPHL tPLH VI VM VOL Output Waveform 2 S1 at VLOAD (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOL + V∆ VOL tPHZ VM VLOAD/2 - V∆ VLOAD/2 ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at VM. G. tPLZ is measured at VOL + V∆. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 4 Submit Documentation Feedback PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74LVC06AMDREP ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 LC06AM V62/06661-01XE ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 LC06AM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of