SN74LVC1T45-EP
www.ti.com........................................................................................................................................................................................... SCES768 – NOVEMBER 2008
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
FEATURES
1
•
•
•
•
•
•
•
•
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.65-V to
5.5-V Power-Supply Range
VCC Isolation Feature – If Either VCC Input Is at
GND, Both Ports Are in the High-Impedance
State
DIR Input Circuit Referenced to VCCA
Low Power Consumption, 4-µA Max ICC
±24-mA Output Drive at 3.3 V
Ioff Supports Partial-Power-Down Mode
Operation
Max Data Rates
– 420 Mbps (3.3-V to 5-V Translation)
– 210 Mbps (Translate to 3.3 V)
– 140 Mbps (Translate to 2.5 V)
– 75 Mbps (Translate to 1.8 V)
•
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SUPPORTS DEFENSE, AEROSPACE,
AND MEDICAL APPLICATIONS
•
•
•
•
•
•
•
Controlled Baseline
One Assembly/Test Site
One Fabrication Site
Available in Military (–55°C/125°C)
Temperature Range (1)
Extended Product Life Cycle
Extended Product-Change Notification
Product Traceability
(1)
Additional temperature ranges are available – contact factory
DCK PACKAGE
(TOP VIEW)
VCCA
1
6
VCCB
GND
2
5
DIR
A
3
4
B
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This single-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is
designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track
VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional
translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
ORDERING INFORMATION (1)
TA
–55°C to 125°C
(1)
(2)
(3)
PACKAGE (2)
SOT (SC-70) – DCK
ORDERABLE PART NUMBER
Reel of 3000
SN74LVC1T45MDCKREP
TOP-SIDE MARKING (3)
NXG
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
The actual top-side marking has one additional character that designates the assembly/test site.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
SN74LVC1T45-EP
SCES768 – NOVEMBER 2008........................................................................................................................................................................................... www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The SN74LVC1T45 is designed for asynchronous communication between two data buses. The logic levels of
the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data
from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the
A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic
HIGH or LOW level applied to prevent excess ICC and ICCZ.
The SN74LVC1T45 is designed so that the DIR input is powered by VCCA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance
state.
FUNCTION TABLE (1)
(1)
INPUT
DIR
OPERATION
L
B data to A bus
H
A data to B bus
Input circuits of the data I/Os
always are active.
LOGIC DIAGRAM (POSITIVE LOGIC)
DIR
A
5
3
4
VCCA
2
B
VCCB
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Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
Supply voltage range
–0.5
6.5
V
VI
Input voltage range (2)
–0.5
6.5
V
VO
Voltage range applied to any output in the high-impedance or power-off state (2)
–0.5
6.5
V
A port
–0.5
VCCA + 0.5
B port
–0.5
VCCB + 0.5
VCCA
VCCB
UNIT
VO
Voltage range applied to any output in the high or low state (2) (3)
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
Continuous current through VCC or GND
θJA
Package thermal impedance (4)
Tstg
Storage temperature range
(1)
(2)
(3)
(4)
–65
V
±100
mA
259
°C/W
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
The value of VCC is provided in the recommended operating conditions table.
The package thermal impedance is calculated in accordance with JESD 51-7.
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Recommended Operating Conditions (1) (2) (3)
VCCI
VCCA
VCCB
VCCO
Supply voltage
1.65 V to 1.95 V
High-level
input voltage
VIH
MAX
1.65
5.5
1.65
5.5
1.7
3 V to 3.6 V
VCCI × 0.7
1.65 V to 1.95 V
VIL
Data inputs (4)
VCCI × 0.35
2.3 V to 2.7 V
0.7
3 V to 3.6 V
0.8
4.5 V to 5.5 V
High-level
input voltage
DIR
(referenced to VCCA) (5)
VCCA × 0.65
2.3 V to 2.7 V
1.7
3 V to 3.6 V
V
2
4.5 V to 5.5 V
VCCA × 0.7
1.65 V to 1.95 V
DIR
(referenced to VCCA) (5)
V
VCCI × 0.3
1.65 V to 1.95 V
VIH
V
V
2
4.5 V to 5.5 V
Low-level
input voltage
UNIT
VCCI × 0.65
2.3 V to 2.7 V
Data inputs (4)
MIN
VCCA × 0.35
2.3 V to 2.7 V
0.7
3 V to 3.6 V
0.8
VIL
Low-level
input voltage
VI
Input voltage
0
5.5
V
VO
Output voltage
0
VCCO
V
4.5 V to 5.5 V
VCCA × 0.3
1.65 V to 1.95 V
IOH
High-level output current
IOL
Low-level output current
Δt/Δv
Input transition
rise or fall rate
Data inputs
Control inputs
TA
(1)
(2)
(3)
(4)
(5)
4
V
–4
2.3 V to 2.7 V
–8
3 V to 3.6 V
–24
4.5 V to 5.5 V
–32
1.65 V to 1.95 V
4
2.3 V to 2.7 V
8
3 V to 3.6 V
24
4.5 V to 5.5 V
32
1.65 V to 1.95 V
20
2.3 V to 2.7 V
20
3 V to 3.6 V
10
4.5 V to 5.5 V
5
1.65 V to 5.5 V
5
Operating free-air temperature
–55
125
mA
mA
ns/V
°C
VCCI is the VCC associated with the input port.
VCCO is the VCC associated with the output port.
All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
For VCCI values not specified in the data sheet, VIH min = VCCI × 0.7 V, VIL max = VCCI × 0.3 V.
For VCCI values not specified in the data sheet, VIH min = VCCA × 0.7 V, VIL max = VCCA × 0.3 V.
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Electrical Characteristics (1) (2)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –100 µA
IOH = –8 mA
1.65 V to 4.5 V
1.65 V to 4.5 V
1.65 V
1.65 V
1.2
2.3 V
2.3 V
1.9
VI = VIH
DIR
A port
Ioff
B port
A or B
port
IOZ
ICCA
A port
ΔICCA
MAX
V
3V
2.4
3.8
IOL = 100 µA
1.65 V to 4.5 V
1.65 V to 4.5 V
0.1
1.65 V
1.65 V
0.45
VI = VIL
2.3 V
2.3 V
0.3
IOL = 24 mA
3V
3V
0.55
IOL = 32 mA
4.5 V
4.5 V
0.55
1.65 V to 5.5 V
1.65 V to 5.5 V
±1
±2
0V
0 to 5.5 V
±1
±6
0 to 5.5 V
0V
±1
±6
1.65 V to 5.5 V
1.65 V to 5.5 V
±1
±6
1.65 V to 5.5 V
1.65 V to 5.5 V
4
5.5 V
0V
2
-4
VI = VCCA or GND
VI or VO = 0 to 5.5 V
VO = VCCO or GND
VI = VCCI or GND, IO = 0
0V
5.5 V
1.65 V to 5.5 V
1.65 V to 5.5 V
4
5.5 V
0V
-4
0V
5.5 V
2
1.65 V to 5.5 V
1.65 V to 5.5 V
4
3 V to 5.5 V
3 V to 5.5 V
A port at VCCA – 0.6 V,
DIR at VCCA, B port = open
DIR at VCCA – 0.6 V,
B port = open,
A port at VCCA or GND
ΔICCB
B port
B port at VCCB – 0.6 V,
DIR at GND,
A port = open
Ci
DIR
Cio
A or B
port
UNIT
VCCO
– 0.1
4.5 V
DIR
(1)
(2)
MIN
3V
VI = VCCI or GND, IO = 0
ICCA + ICCB
(see Table 1)
MAX
4.5 V
VI = VCCI or GND, IO = 0
ICCB
TYP
IOH = –32 mA
IOL = 8 mA
II
MIN
IOH = –24 mA
IOL = 4 mA
VOL
–55°C to 125°C
VCCB
IOH = –4 mA
VOH
TA = 25°C
VCCA
V
µA
µA
µA
µA
µA
µA
50
µA
50
50
µA
3 V to 5.5 V
3 V to 5.5 V
VI = VCCA or GND
3.3 V
3.3 V
2.5
pF
VO = VCCA/B or GND
3.3 V
3.3 V
6
pF
VCCO is the VCC associated with the output port.
VCCI is the VCC associated with the input port.
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Switching Characteristics
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
A
B
B
A
DIR
A
DIR
B
DIR
A
DIR
B
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH (1)
tPZL (1)
tPZH (1)
tPZL (1)
(1)
VCCB = 1.8 V
±0.15 V
VCCB = 2.5 V
±0.2 V
VCCB = 3.3 V
±0.3 V
VCCB = 5 V
±0.5 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
3
20.7
2.2
13.3
1.7
11.3
1.4
10.2
2.8
17.3
2.2
11.5
1.8
10.1
1.7
10
3
20.7
2.3
19
2.1
18.5
1.9
18.1
2.8
17.3
2.1
15.9
2
18.6
1.8
15.2
5.2
22.4
4.8
21.5
4.7
21.4
5.1
20.1
2.3
13.5
2.1
13.5
2.4
13.7
3.1
13.9
7.4
24.9
4.9
14.5
4.6
13.3
2.8
11.2
4.2
19
3.7
12.2
3.3
11.4
2.4
10.4
39.7
31.2
29.9
27.5
42.2
30.4
28.9
26.4
34.2
26.8
25
24.1
39.7
33
31.5
30.1
ns
ns
ns
ns
ns
ns
The enable time is a calculated value, derived using the formula shown in the enable times section.
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 1)
PARAMETER
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH (1)
tPZL (1)
tPZH (1)
tPZL
(1)
6
(1)
FROM
(INPUT)
TO
(OUTPUT)
A
B
B
A
DIR
A
DIR
B
DIR
A
DIR
B
VCCB = 1.8 V
±0.15 V
VCCB = 2.5 V
±0.2 V
VCCB = 3.3 V
±0.3 V
VCCB = 5 V
±0.5 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
2.3
19
1.5
11.5
1.3
9.4
1.1
8.1
2.1
15.9
1.4
10.5
1.3
8.4
0.9
7.6
2.2
13.3
1.5
11.5
1.4
11
1
10.5
2.2
11.5
1.4
10.5
1.3
10
0.9
9.2
3
11.1
3.1
11.1
2.8
11.1
3.2
11.1
1.3
8.9
1.3
8.9
1.3
8.9
1
8.8
6.5
26.7
4.1
14.4
3.9
13.2
2.4
10.1
3.9
21.9
3.2
12.6
2.8
11.4
1.8
8.3
35.2
24.1
22.4
18.8
38.2
24.9
23.2
19.3
27.9
20.4
18.3
16.9
27
21.6
19.5
18.7
ns
ns
ns
ns
ns
ns
The enable time is a calculated value, derived using the formula shown in the enable times section.
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Switching Characteristics
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
A
B
B
A
DIR
A
DIR
B
DIR
A
DIR
B
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH (1)
tPZL (1)
tPZH (1)
tPZL (1)
(1)
VCCB = 1.8 V
±0.15 V
VCCB = 2.5 V
±0.2 V
VCCB = 3.3 V
±0.3 V
VCCB = 5 V
±0.5 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
2.1
18.5
1.4
11
0.7
8.8
0.7
7.4
2
15.6
1.3
10
0.8
8
0.7
7
1.7
11.3
1.3
9.4
0.7
8.8
0.6
8.4
1.8
10.1
1.3
8.4
0.8
8
0.7
7.5
2.9
10.3
3
10.3
2.8
10.3
3.4
10.3
1.8
8.6
1.6
8.6
2.2
8.7
2.2
8.7
5.4
23.5
3.9
13.1
2.9
11.8
2.4
9.8
3.3
17.5
2.9
10.8
2.4
10.1
1.7
7.9
28.8
20.2
18.9
16.3
31.6
21.5
19.8
17.3
27.1
19.6
17.5
16.1
25.9
20.3
18.3
17.3
ns
ns
ns
ns
ns
ns
The enable time is a calculated value, derived using the formula shown in the enable times section.
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 5 V ±0.5 V (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
A
B
B
A
DIR
A
DIR
B
DIR
A
DIR
B
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH (1)
tPZL (1)
tPZH (1)
tPZL
(1)
(1)
VCCB = 1.8 V
±0.15 V
VCCB = 2.5 V
±0.2 V
VCCB = 3.3 V
±0.3 V
VCCB = 5 V
±0.5 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
1.9
18.1
1
10.5
0.6
8.4
0.5
6.9
1.8
15.2
0.9
9.2
0.7
7.5
0.5
6.5
1.4
10.2
1
8.1
0.7
7.4
0.5
6.9
1.7
10
0.9
7.6
0.7
7
0.5
6.5
2.1
8.4
2.2
8.4
2.2
8.5
2.2
8.4
0.9
6.8
1
6.8
1
6.7
0.9
6.7
4.8
23.2
2.5
12.8
1
11.5
2.5
9.5
4.2
17.8
2.5
10.4
2.5
10
1.6
7.5
28
18.5
17.4
14.4
31.2
20.4
18.5
16
24.9
17.3
15.1
13.6
23.6
17.6
16
14.6
ns
ns
ns
ns
ns
ns
The enable time is a calculated value, derived using the formula shown in the enable times section.
Operating Characteristics
TA = 25°C
PARAMETER
CpdA (1)
CpdB (1)
(1)
A-port input, B-port output
B-port input, A-port output
A-port input, B-port output
B-port input, A-port output
TEST
CONDITIONS
CL = 0 pF,
f = 10 MHz,
tr = tf = 1 ns
CL = 0 pF,
f = 10 MHz,
tr = tf = 1 ns
VCCA =
VCCB = 1.8 V
VCCA =
VCCB = 2.5 V
VCCA =
VCCB = 3.3 V
VCCA =
VCCB = 5 V
TYP
TYP
TYP
TYP
3
4
4
4
18
19
20
21
18
19
20
21
3
4
4
4
UNIT
pF
pF
Power dissipation capacitance per transceiver
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Power-Up Considerations
A proper power-up sequence always should be followed to avoid excessive supply current, bus contention,
oscillations, or other anomalies. To guard against such power-up problems, take the following precautions:
1. Connect ground before any supply voltage is applied.
2. Power up VCCA.
3. VCCB can be ramped up along with or after VCCA.
Table 1. Typical Total Static Power Consumption (ICCA + ICCB)
VCCB
8
VCCA
0V
1.8 V
2.5 V
3.3 V
5V
0V
0