SN74LVCH16543AZQLR

SN74LVCH16543A 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCAS317M – NOVEMBER 1993 – REVISED MARCH 2005 FEATURES • • • • • • • • • • • DGG, DGV, OR DL PACKAGE (TOP VIEW) Member of the Texas Instruments Widebus™ Family Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 5.4 ns at 3.3 V Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C Ioff Supports Partial-Power-Down Mode Operation Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC) Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) 1OEAB 1LEAB 1CEAB GND 1A1 1A2 VCC 1A3 1A4 1A5 GND 1A6 1A7 1A8 2A1 2A2 2A3 GND 2A4 2A5 2A6 VCC 2A7 2A8 GND 2CEAB 2LEAB 2OEAB DESCRIPTION/ORDERING INFORMATION This 16-bit registered transceiver is designed for 1.65-V to 3.6-V VCC operation. The SN74LVCH16543A can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each register, to permit independent control in either direction of data flow. 1 56 2 55 3 54 4 53 5 52 6 51 7 50 8 49 9 48 10 47 11 46 12 45 13 44 14 43 15 42 16 41 17 40 18 39 19 38 20 37 21 36 22 35 23 34 24 33 25 32 26 31 27 30 28 29 1OEBA 1LEBA 1CEBA GND 1B1 1B2 VCC 1B3 1B4 1B5 GND 1B6 1B7 1B8 2B1 2B2 2B3 GND 2B4 2B5 2B6 VCC 2B7 2B8 GND 2CEBA 2LEBA 2OEBA ORDERING INFORMATION PACKAGE (1) TA Tape and reel SN74LVCH16543ADLR TSSOP – DGG Tape and reel SN74LVCH16543ADGGR LVCH16543A TVSOP – DGV Tape and reel SN74LVCH16543ADGVR LDH543A VFBGA – GQL VFBGA – ZQL (Pb-free) (1) TOP-SIDE MARKING SN74LVCH16543ADL SSOP – DL –40°C to 85°C ORDERABLE PART NUMBER Tube Tape and reel SN74LVCH16543AGQLR SN74LVCH16543AZQLR LVCH16543A LDH543A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1993–2005, Texas Instruments Incorporated SN74LVCH16543A 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCAS317M – NOVEMBER 1993 – REVISED MARCH 2005 DESCRIPTION/ORDERING INFORMATION (CONTINUED) The A-to-B enable (CEAB) input must be low to enter data from A or to output data from B. If CEAB is low and LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB puts the A latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar, but requires using the CEBA, LEBA, and OEBA inputs. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the input circuit and is not disabled by OE or DIR. GQL OR ZQL PACKAGE (TOP VIEW) 1 2 3 4 5 6 A B C D E F G H J K TERMINAL ASSIGNMENTS 2 1 2 3 4 5 6 A 1CEAB 1LEAB 1OEAB 1OEBA 1LEBA 1CEBA B 1A2 1A1 GND GND 1B1 1B2 C 1A4 1A3 VCC VCC 1B3 1B4 D 1A6 1A5 GND GND 1B5 1B6 E 1A8 1A7 1B7 1B8 F 2A1 2A2 2B2 2B1 G 2A3 2A4 GND GND 2B4 2B3 H 2A5 2A6 VCC VCC 2B6 2B5 J 2A7 2A8 GND GND 2B8 2B7 K 2CEAB 2LEAB 2OEAB 2OEBA 2LEBA 2CEBA SN74LVCH16543A 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCAS317M – NOVEMBER 1993 – REVISED MARCH 2005 FUNCTION TABLE (1) (EACH 8-BIT SECTION) INPUTS (1) (2) OEAB A OUTPUT B X X X Z X H X Z L H L X B0 (2) L L L L L L L L H H CEAB LEAB H X A-to-B data flow is shown; B-to-A flow control is the same, except that it uses CEBA, LEBA, and OEBA. Output level before the indicated steady-state input conditions were established 3 SN74LVCH16543A 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCAS317M – NOVEMBER 1993 – REVISED MARCH 2005 LOGIC DIAGRAM (POSITIVE LOGIC) 1OEBA 1CEBA 1LEBA 1OEAB 1CEAB 1LEAB 1A1 56 54 55 1 3 2 C1 5 1D 52 1B1 C1 1D To Seven Other Channels 2OEBA 2CEBA 2LEBA 2OEAB 2CEAB 2LEAB 2A1 29 31 30 28 26 27 C1 15 1D C1 1D To Seven Other Channels Pin numbers shown are for the DGG, DGV, and DL packages. 4 42 2B1 SN74LVCH16543A 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com Absolute Maximum Ratings SCAS317M – NOVEMBER 1993 – REVISED MARCH 2005 (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 6.5 V VI Input voltage range (2) –0.5 6.5 V –0.5 6.5 V –0.5 VCC + 0.5 state (2) UNIT VO Voltage range applied to any output in the high-impedance or power-off VO Voltage range applied to any output in the high or low state (2) (3) IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA Continuous current through each VCC or GND θJA Package thermal impedance (4) Tstg (1) (2) (3) (4) DGG package 64 DGV package 48 DL package 56 GQL/ZQL package 42 Storage temperature range –65 V °C/W °C 150 Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. The value of VCC is provided in the recommended operating conditions table. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions (1) VCC Supply voltage VIH High-level input voltage Operating Data retention only VCC = 1.65 V to 1.95 V MIN MAX 1.65 3.6 1.5 Low-level input voltage VI Input voltage VO Output voltage 1.7 VCC = 2.7 V to 3.6 V 2 High-level output current 0.35 × VCC 0.7 VCC = 2.7 V to 3.6 V 0.8 0 5.5 High or low state 0 VCC 3-state 0 5.5 Low-level output current ∆t/∆v Input transition rise or fall rate TA Operating free-air temperature (1) V V V –4 VCC = 2.3 V –8 VCC = 2.7 V –12 VCC = 3 V –24 VCC = 1.65 V IOL V VCC = 2.3 V to 2.7 V VCC = 1.65 V IOH V 0.65 × VCC VCC = 2.3 V to 2.7 V VCC = 1.65 V to 1.95 V VIL UNIT mA 4 VCC = 2.3 V 8 VCC = 2.7 V 12 VCC = 3 V 24 –40 mA 10 ns/V 85 °C All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 5 SN74LVCH16543A 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCAS317M – NOVEMBER 1993 – REVISED MARCH 2005 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC IOH = –100 µA VOH 1.65 V to 3.6 V Control inputs Ioff 1.2 IOH = –8 mA 2.3 V 1.7 2.7 V 2.2 3V 2.4 IOH = –24 mA 3V 2.2 IOL = 100 µA 1.65 V to 3.6 V 0.2 IOL = 4 mA 1.65 V 0.45 IOL = 8 mA 2.3 V 0.7 IOL = 12 mA 2.7 V 0.4 3V 0.55 VI = 0 to 5.5 V 0 1.65 V VI = 1.07 V VI = 0.7 V VI = 0 to 3.6 V (3) ±10 µA 45 µA 75 –75 ±500 3.6 V VO = 0 V or (VCC to 5.5 V) ∆ICC µA –45 3V VI = 2 V ICC ±5 (2) 2.3 V VI = 1.7 V VI = 0.8 V IOZ (4) V (2) VI = 0.58 V A or B ports UNIT V 3.6 V VI or VO = 5.5 V II(hold) MAX VCC – 0.2 1.65 V IOL = 24 mA II TYP (1) IOH = –4 mA IOH = –12 mA VOL MIN ±5 2.3 V to 3.6 V VI = VCC or GND, IO = 0 3.6 V ≤ VI ≤ 5.5 V (5), IO = 0 20 3.6 V One input at VCC – 0.6 V, Other inputs at VCC or GND 20 2.7 V to 3.6 V 500 µA µA µA Ci Control inputs VI = VCC or GND 3.3 V 5 pF Cio A or B ports VO = VCC or GND 3.3 V 8 pF (1) (2) (3) (4) (5) All typical values are at VCC = 3.3 V, TA = 25°C. This information was not available at the time of publication. This is the bus-hold maximum dynamic current required to switch the input from one state to another. For the total leakage current in an I/O port, consult the II(hold) specification for the input voltage condition, 0 V < VI < VCC, and the IOZ specification for the input voltage conditions, VI = 0 V or VI = VCC to 5.5 V. The bus-hold current, at input voltage greater than VCC, is negligible. This applies in the disabled state only. Timing Requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) VCC = 1.8 V ± 0.15 V MIN MAX VCC = 2.5 V ± 0.2 V MIN MAX VCC = 2.7 V MIN MAX VCC = 3.3 V ± 0.3 V MIN UNIT MAX tw Pulse duration, LE or CE low (1) (1) 3.3 3.3 ns tsu Setup time, data before LE or CE↓ (1) (1) 1.1 1.1 ns Hold time, data after LE or CE↓ (1) (1) 1.9 1.9 ns th (1) 6 This information was not available at the time of publication. SN74LVCH16543A 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCAS317M – NOVEMBER 1993 – REVISED MARCH 2005 Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER tpd ten tdis ten tdis (1) FROM (INPUT) TO (OUTPUT) A or B B or A LE A or B CE A or B OE A or B VCC = 1.8 V ± 0.15 V MIN VCC = 2.5 V ± 0.2 V MAX MIN MAX (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) VCC = 2.7 V MIN VCC = 3.3 V ± 0.3 V MAX MIN MAX (1) 6.1 1.2 5.4 (1) 7.4 1.5 6.1 (1) (1) 7.9 1.2 6.6 (1) (1) 7.1 1.5 6.6 (1) (1) (1) 7.6 1 6.3 (1) (1) (1) 6.9 1.5 6.3 UNIT ns ns ns This information was not available at the time of publication. Operating Characteristics TA = 25°C TEST CONDITIONS PARAMETER Cpd (1) Power dissipation capacitance per transceiver Outputs enabled Outputs disabled f = 10 MHz VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V TYP TYP TYP (1) (1) 44 (1) (1) 4 UNIT pF This information was not available at the time of publication. 7 SN74LVCH16543A 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCAS317M – NOVEMBER 1993 – REVISED MARCH 2005 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 2.7 V 3.3 V ± 0.3 V VI tr/tf VCC VCC 2.7 V 2.7 V ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V 1.5 V 2 × VCC 2 × VCC 6V 6V 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH VM VM VOL tPHL VM VM 0V Output Waveform 1 S1 at VLOAD (see Note B) tPLH tPLZ VLOAD/2 VM tPZH VOH Output VM tPZL tPHL VOH Output VI Output Control VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + V∆ VOL tPHZ VM VOH − V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 8 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) (3) Device Marking (4/5) (6) SN74LVCH16543ADGGR ACTIVE TSSOP DGG 56 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LVCH16543A SN74LVCH16543ADL ACTIVE SSOP DL 56 20 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LVCH16543A SN74LVCH16543ADLR ACTIVE SSOP DL 56 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LVCH16543A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of