SN74LVTH273DWR

 
        
  SCBS136M − MAY 1992 − REVISED OCTOBER 2003 D D D SN54LVTH273 . . . J PACKAGE SN74LVTH273 . . . DB, DW, NS, OR PW PACKAGE (TOP VIEW) 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q CLK D D D Operation Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 500 mA Per JESD 17 ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) SN54LVTH273 . . . FK PACKAGE (TOP VIEW) 2D 2Q 3Q 3D 4D 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 8D 7D 7Q 6Q 6D 4Q GND CLK 5Q 5D CLR 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND D Ioff Supports Partial-Power-Down-Mode 8Q D (5-V Input and Output Voltages With 3.3-V VCC ) Typical VOLP (Output Ground Bounce) VCC. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 4) SN54LVTH273 SN74LVTH273 MIN MAX MIN MAX 2.7 3.6 2.7 3.6 UNIT VCC VIH Supply voltage VIL VI Low-level input voltage Input voltage 5.5 5.5 V IOH IOL High-level output current −24 −32 mA Low-level output current 48 64 mA ∆t/∆v Input transition rise or fall rate 10 10 ns/V High-level input voltage 2 2 0.8 V V 0.8 V TA Operating free-air temperature −55 125 −40 85 °C NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.   ')"*%("' #"'#&*' +*"!$# ' & )"*%(2& "* !&1' +(& ") !&2&-"+%&' (*(#&*# !(( ('! "&* +&#)#("' (*& !&1' 1"(- &.( '*$%&' *&&*2& & *1 " #('1& "* !#"''$& && +*"!$# /"$ '"#& POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 
 
        
  SCBS136M − MAY 1992 − REVISED OCTOBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH II = −18 mA IOH = −100 µA VCC = 2.7 V, IOH = −8 mA IOH = −24 mA VOL VCC = 3 V Data inputs Ioff VCC = 3.6 V VCC = 0, Data inputs V V 2 2 0.2 0.2 IOL = 24 mA IOL = 16 mA 0.5 0.5 0.4 0.4 IOL = 32 mA IOL = 48 mA 0.5 0.5 V 0.55 0.55 10 10 VI = VCC or GND VI = VCC ±1 ±1 1 1 VI = 0 VI or VO = 0 to 4.5 V −5 VI = 0.8 V VI = 2 V VCC = 3 V II(hold) −1.2 UNIT VCC−0.2 2.4 IOL = 64 mA VI = 5.5 V VCC = 0 or 3.6 V, VCC = 3.6 V, SN74LVTH273 TYP† MAX MIN −1.2 VCC−0.2 2.4 IOH = −32 mA IOL = 100 µA VCC = 2.7 V II MIN VCC = 2.7 V, VCC = 2.7 V to 3.6 V, VCC = 3 V Control inputs SN54LVTH273 TYP† MAX TEST CONDITIONS −5 ±100 75 75 −75 −75 500 −750 VCC = 3.6 V‡, VI = 0 to 3.6 V VCC = 3.6 V, IO = 0, VI = VCC or GND Outputs high ICC ∆ICC§ VCC = 3 V to 3.6 V, One input at VCC − 0.6 V, Other inputs at VCC or GND Outputs low A µA 0.19 0.19 5 5 0.2 0.2 µA µA mA mA Ci VI = 3 V or 0 4 4 pF † All typical values are at VCC = 3.3 V, TA = 25°C. ‡ This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another. § This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND. timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) SN54LVTH273 VCC = 3.3 V ± 0.3 V MIN fclock tw Clock frequency tsu Setup time th Hold time, data high or low after CLK↑ MAX VCC = 2.7 V MIN MAX VCC = 3.3 V ± 0.3 V MIN 150 Pulse duration MAX VCC = 2.7 V MIN 150 3.3 3.3 3.3 Data high or low before CLK↑ 2.3 2.7 2.3 2.7 CLR high before CLK↑ 2.3 2.7 2.3 2.7 0 0 0 0 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT MAX MHz 3.3   ')"*%("' #"'#&*' +*"!$# ' & )"*%(2& "* !&1' +(& ") !&2&-"+%&' (*(#&*# !(( ('! "&* +&#)#("' (*& !&1' 1"(- &.( '*$%&' *&&*2& & *1 " #('1& "* !#"''$& && +*"!$# /"$ '"#& 4 SN74LVTH273 ns ns ns 
 
        
  SCBS136M − MAY 1992 − REVISED OCTOBER 2003 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) SN54LVTH273 PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 3.3 V ± 0.3 V MIN fmax tPLH tPHL tPHL MAX SN74LVTH273 VCC = 2.7 V MIN MAX 150 CLK Any Q CLR Any Q † All typical values are at VCC = 3.3 V, TA = 25°C. VCC = 3.3 V ± 0.3 V MIN TYP† VCC = 2.7 V MAX MIN UNIT MAX 150 MHz 1.6 5 5.6 1.7 3.2 4.9 5.5 1.8 4.9 5.2 1.9 3.2 4.8 5.1 1.5 4.4 4.8 1.6 2.7 4.3 4.7 ns ns   ')"*%("' #"'#&*' +*"!$# ' & )"*%(2& "* !&1' +(& ") !&2&-"+%&' (*(#&*# !(( ('! "&* +&#)#("' (*& !&1' 1"(- &.( '*$%&' *&&*2& & *1 " #('1& "* !#"''$& && +*"!$# /"$ '"#& POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 
 
        
  SCBS136M − MAY 1992 − REVISED OCTOBER 2003 PARAMETER MEASUREMENT INFORMATION 6V 500 Ω From Output Under Test S1 Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 6V GND 2.7 V LOAD CIRCUIT Timing Input 1.5 V 0V tw tsu 2.7 V Input 1.5 V 1.5 V th 2.7 V Data Input 1.5 V 1.5 V 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION 2.7 V 1.5 V Input 1.5 V 0V VOH 1.5 V 1.5 V VOL Output tPLZ 3V 1.5 V tPZH VOH 1.5 V 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V 0V Output Waveform 1 S1 at 6 V (see Note B) tPLH tPHL 1.5 V tPZL tPHL tPLH Output 2.7 V Output Control Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ 1.5 V VOH − 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN74LVTH273DBR ACTIVE SSOP DB 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LXH273 Samples SN74LVTH273DW ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LVTH273 Samples SN74LVTH273DWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LVTH273 Samples SN74LVTH273DWRE4 ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LVTH273 Samples SN74LVTH273NSR ACTIVE SO NS 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LVTH273 Samples SN74LVTH273PW ACTIVE TSSOP PW 20 70 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LXH273 Samples SN74LVTH273PWR ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 LXH273 Samples SN74LVTH273PWRG4 ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LXH273 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of