SCES130L − MARCH 1998 − REVISED DECEMBER 2004
SN54LVU04A . . . J OR W PACKAGE
SN74LVU04A . . . D, DB, DGV, NS,
OR PW PACKAGE
(TOP VIEW)
13
3
12
4
11
5
10
6
7
9
8
SN54LVU04A . . . FK PACKAGE
(TOP VIEW)
VCC
6A
6Y
5A
5Y
4A
4Y
1Y
2A
2Y
3A
3Y
1
14
1Y
1A
NC
VCC
6A
SN74LVU04A . . . RGY PACKAGE
(TOP VIEW)
2
13 6A
3
12 6Y
4
11 5A
5
10 5Y
9 4A
6
7
8
2A
NC
2Y
NC
3A
4
3
2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
6Y
NC
5A
NC
5Y
3Y
GND
NC
4Y
4A
14
2
D
VCC
1
D
4Y
1A
1Y
2A
2Y
3A
3Y
GND
All Ports
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
1A
D
D Support Mixed-Mode Voltage Operation on
2-V to 5.5-V VCC Operation
Unbuffered Outputs
Max tpd of 6.5 ns at 5 V
Typical VOLP (Output Ground Bounce)
2.3 V at VCC = 3.3 V, TA = 25°C
GND
D
D
D
D
NC − No internal connection
description/ordering information
These hex inverters are designed for 2-V to 5.5-V VCC operation.
The ’LVU04A devices contain six independent inverters with unbuffered outputs. These devices perform the
Boolean function Y = A.
ORDERING INFORMATION
QFN − RGY
SN74LVU04ARGYR
Tube of 50
SN74LVU04AD
Reel of 2500
SN74LVU04ADR
SOP − NS
Reel of 2000
SN74LVU04ANSR
LVU04A
SSOP − DB
Reel of 2000
SN74LVU04ADBR
LU04A
Tube of 90
SN74LVU04APW
Reel of 2000
SN74LVU04APWR
Reel of 250
SN74LVU04APWT
TVSOP − DGV
Reel of 2000
SN74LVU04ADGVR
LU04A
CDIP − J
Tube of 25
SNJ54LVU04AJ
SNJ54LVU04AJ
CFP − W
Tube of 150
SNJ54LVU04AW
SNJ54LVU04AW
TSSOP − PW
−55°C
125°C
−55
C to 125
C
TOP-SIDE
MARKING
Reel of 1000
SOIC − D
−40°C
−40
C to 85
85°C
C
ORDERABLE
PART NUMBER
PACKAGE†
TA
LVU04A
LVU04A
LU04A
LCCC − FK
Tube of 85
SNJ54LVU04AFK
SNJ54LVU04AFK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2004, Texas Instruments Incorporated
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POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCES130L − MARCH 1998 − REVISED DECEMBER 2004
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H
L
L
H
logic diagram, each inverter (positive logic)
A
Y
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Output voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
(see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
(see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
(see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
(see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
(see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. The package thermal impedance is calculated in accordance with JESD 51-5.
2
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SCES130L − MARCH 1998 − REVISED DECEMBER 2004
recommended operating conditions (see Note 5)
SN54LVU04A
VCC
VIH
High-level input voltage
VIL
Low-level input voltage
VI
VO
Input voltage
IOH
IOL
MIN
MAX
2
5.5
Supply voltage
VCC = 2 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
1.7
MAX
2
5.5
VCC × 0.8
VCC × 0.8
VCC × 0.8
VCC × 0.8
VCC × 0.8
VCC × 0.8
V
0.3
VCC × 0.2
VCC × 0.2
VCC × 0.2
5.5
0
Output voltage
UNIT
V
0.3
VCC × 0.2
VCC × 0.2
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
0
0
VCC
−50
VCC = 2 V
VCC = 2.3 V to 2.7 V
V
VCC × 0.2
5.5
V
VCC
−50
µA
0
−2
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
Low-level output current
MIN
1.7
VCC = 2 V
VCC = 2.3 V to 2.7 V
High-level output current
SN74LVU04A
V
−2
−6
−6
−12
−12
VCC = 2 V
VCC = 2.3 V to 2.7 V
50
50
2
2
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
6
6
12
12
mA
µA
mA
TA
Operating free-air temperature
−55
125
−40
85
°C
NOTE 5: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LVU04A
PARAMETER
VOH
VOL
TEST CONDITIONS
VCC
MIN
IOH = −50 µA
IOH = −2 mA
2 V to 5.5 V
IOH = −6 mA
IOH = −12 mA
TYP
SN74LVU04A
MAX
MIN
VCC−0.1
2
VCC−0.1
2
3V
2.48
2.48
4.5 V
3.8
2.3 V
TYP
MAX
UNIT
V
3.8
IOL = 50 µA
IOL = 2 mA
2 V to 5.5 V
0.1
0.1
2.3 V
0.4
0.4
IOL = 6 mA
IOL = 12 mA
3V
0.44
0.44
4.5 V
0.55
0.55
±1
±1
µA
20
µA
II
ICC
VI = 5.5 V or GND
VI = VCC or GND,
Ci
VI = VCC or GND
0 V to 5.5 V
IO = 0
5.5 V
20
3.3 V
4
4
V
pF
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3
SCES130L − MARCH 1998 − REVISED DECEMBER 2004
switching characteristics over recommended operating
VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tpd
A
Y
LOAD
CAPACITANCE
MIN
free-air
TA = 25°C
TYP
MAX
temperature
SN54LVU04A
range,
SN74LVU04A
MIN
MAX
MIN
MAX
CL = 15 pF
3.2*
10.9*
1*
14*
1
14
CL = 50 pF
6.6
13.4
1
16
1
16
UNIT
ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tpd
A
Y
free-air
LOAD
CAPACITANCE
TA = 25°C
MIN
TYP
MAX
CL = 15 pF
2.5*
CL = 50 pF
4.7
temperature
SN54LVU04A
range,
SN74LVU04A
MIN
MAX
MIN
MAX
8.9*
1*
10.5*
1
10.5
11.4
1
13
1
13
UNIT
ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tpd
A
Y
LOAD
CAPACITANCE
MIN
free-air
TA = 25°C
TYP
MAX
temperature
SN54LVU04A
range,
SN74LVU04A
MIN
MAX
MIN
MAX
CL = 15 pF
2.2*
5.5*
1*
6.5*
1
6.5
CL = 50 pF
3.9
7
1
8
1
8
UNIT
ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
noise characteristics, VCC = 3.3 V, CL = 50 pF, TA = 25°C (see Note 6)
SN74LVU04A
PARAMETER
MIN
TYP
MAX
UNIT
VOL(P)
VOL(V)
Quiet output, maximum dynamic VOL
0.5
0.8
V
Quiet output, minimum dynamic VOL
−0.1
−0.8
V
VOH(V)
VIH(D)
Quiet output, minimum dynamic VOH
3
High-level dynamic input voltage
V
2.31
V
VIL(D)
Low-level dynamic input voltage
NOTE 6: Characteristics are for surface-mount packages only.
0.99
V
VCC
3.3 V
TYP
UNIT
5V
6.7
operating characteristics, TA = 25°C
PARAMETER
Cpd
Power dissipation capacitance
TEST CONDITIONS
CL = 50 pF,
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- &! $ .(&) #!%!% !! ! %
&$! !% - -!() *! % %%. %-
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4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
f = 10 MHz
5.6
pF
SCES130L − MARCH 1998 − REVISED DECEMBER 2004
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
From Output
Under Test
Test
Point
RL = 1 kΩ
VCC
Open
S1
TEST
GND
CL
(see Note A)
CL
(see Note A)
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
VCC
50% VCC
Timing Input
0V
tw
tsu
VCC
50% VCC
Input
50% VCC
th
VCC
50% VCC
Data Input
50% VCC
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VCC
50% VCC
Input
50% VCC
tPLH
In-Phase
Output
50% VCC
VOH
50% VCC
VOL
VOH
50% VCC
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
50% VCC
0V
Output
Waveform 1
S1 at VCC
(see Note B)
tPLH
50% VCC
50% VCC
tPLZ
tPZL
tPHL
tPHL
Out-of-Phase
Output
0V
VCC
Output
Control
≈VCC
50% VCC
tPHZ
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
VOL + 0.3 V
VOL
50% VCC
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time, with one input transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPHL and tPLH are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
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5
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN74LVU04AD
ACTIVE
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
LVU04A
Samples
SN74LVU04ADBR
ACTIVE
SSOP
DB
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
LU04A
Samples
SN74LVU04ADR
ACTIVE
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
LVU04A
Samples
SN74LVU04ANSR
ACTIVE
SO
NS
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
LVU04A
Samples
SN74LVU04APW
ACTIVE
TSSOP
PW
14
90
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
LU04A
Samples
SN74LVU04APWR
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
LU04A
Samples
SN74LVU04APWRG4
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
LU04A
Samples
SN74LVU04APWT
ACTIVE
TSSOP
PW
14
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
LU04A
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of