SN74LXC2T45DTMR

SN74LXC2T45 SCES938B – OCTOBER 2021 – REVISED MAY 2022 SN74LXC2T45 Dual-Bit Dual-Supply Bus Transceiver with Configurable Level Shifting 1 Features 2 Applications • • • • • • • • • • • • • • • • • • • • Fully configurable dual-rail design allows each port to operate from 1.1 V to 5.5 V Robust, glitch-free power supply sequencing Up to 420-Mbps support for 3.3 V to 5.0 V Schmitt-trigger inputs allow for slow or noisy inputs I/O's with integrated dynamic pull-down resistors help reduce external component count Control inputs with integrated static pull-down resistors allow for floating control inputs High drive strength (up to 32 mA at 5 V) Low power consumption – 3-µA maximum (25°C) – 6-µA maximum (–40°C to 125°C) VCC isolation and VCC disconnect (Ioff-float) feature – If either VCC supply is < 100 mV or disconnected, all I/O's get pulled-down and then become high-impedance Ioff supports partial-power-down mode operation Compatible with LVC family level shifters Control logic (DIR) are referenced to VCCA Operating temperature from –40°C to +125°C Latch-up performance exceeds 100 mA per JESD 78, class II ESD protection exceeds JESD 22 – 4000-V human-body model – 1000-V charged-device model 3 Description The SN74LXC2T45 is a dual-bit, dual-supply noninverting bidirectional voltage level translation device. Ax pins and control pin (DIR) are referenced to VCCA logic levels, and Bx pins are referenced to VCCB logic levels. The A port is able to accept I/O voltages ranging from 1.1 V to 5.5 V, while the B port can accept I/O voltages from 1.1 V to 5.5 V. A high on DIR allows data transmission from A to B and a low on DIR allows data transmission from B to A. See Device Functional Modes for a summary of the operation of the control logic. Device Information(1) PART NUMBER PACKAGE SN74LXC2T45 (1) BODY SIZE (NOM) (8)(2) 2.95 mm × 2.80 mm VSSOP (DCU) (8) 2.30 mm × 2.00 mm SON (DTT) (8) 1.95 mm × 1.00 mm X2SON (DTM) (8) 1.35 mm × 0.80 mm SM8 (DCT) (2) VCCA Eliminate slow or noisy input signals Driving indicator LEDs or Buzzers Debouncing a mechanical switch Infotainment head unit ADAS fusion For all available packages, see the orderable addendum at the end of the data sheet. Preview package VCCB DIR A1 B1 A2 B2 Functional Block Diagram An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................3 6 Specifications.................................................................. 4 6.1 Absolute Maximum Ratings........................................ 4 6.2 ESD Ratings............................................................... 4 6.3 Recommended Operating Conditions.........................5 6.4 Thermal Information....................................................5 6.5 Electrical Characteristics.............................................6 6.6 Switching Characteristics: Tsk, TMAX ..........................9 6.7 Switching Characteristics, VCCA = 1.2 ± 0.1 V ......... 10 6.8 Switching Characteristics, VCCA = 1.5 ± 0.1 V ......... 11 6.9 Switching Characteristics, VCCA = 1.8 ± 0.15 V ....... 12 6.10 Switching Characteristics, VCCA = 2.5 ± 0.2 V ....... 13 6.11 Switching Characteristics, VCCA = 3.3 ± 0.3 V ....... 14 6.12 Switching Characteristics, VCCA = 5.0 ± 0.5 V ....... 15 6.13 Operating Characteristics....................................... 16 6.14 Typical Characteristics............................................ 17 7 Parameter Measurement Information.......................... 18 7.1 Load Circuit and Voltage Waveforms........................18 8 Detailed Description......................................................20 8.1 Overview................................................................... 20 8.2 Functional Block Diagram......................................... 20 8.3 Feature Description...................................................21 9 Partial Power Down (Ioff)............................................... 21 10 VCC Isolation and VCC Disconnect (Ioff-float)............... 21 11 Over-Voltage Tolerant Inputs...................................... 22 12 Glitch-Free Power Supply Sequencing..................... 22 13 Negative Clamping Diodes......................................... 23 14 Fully Configurable Dual-Rail Design......................... 23 15 Supports High-Speed Translation..............................23 16 Device Functional Modes........................................... 23 17 Application and Implementation................................ 24 17.1 Application Information........................................... 24 17.2 Enable Times.......................................................... 24 17.3 Typical Application.................................................. 24 18 Power Supply Recommendations..............................25 19 Layout...........................................................................26 19.1 Layout Guidelines................................................... 26 19.2 Layout Example...................................................... 26 20 Device and Documentation Support..........................27 20.1 Documentation Support.......................................... 27 20.2 Receiving Notification of Documentation Updates..27 20.3 Support Resources................................................. 27 20.4 Trademarks............................................................. 27 20.5 Electrostatic Discharge Caution..............................27 20.6 Glossary..................................................................27 21 Mechanical, Packaging, and Orderable Information.................................................................... 27 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision A (October 2021) to Revision B (March 2022) Page • Changed the status of the DTT and DTM Package, from: Preview to: Production ............................................3 Changes from Revision * (October 2021) to Revision A (October 2021) Page • Changed status of data sheet from Advanced Information to Production Data .................................................1 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 5 Pin Configuration and Functions VCCA 1 8 VCCB A1 2 7 B1 A2 3 6 B2 GND 4 5 DIR VCCA 1 8 VCCB A1 2 7 B1 A2 3 6 B2 GND 4 5 DIR Figure 5-2. DCU Package, 8-Pin VSSOP (Top View) Figure 5-1. DCT (Preview) Package, 8-Pin SM8 VCCA 1 VCCB 8 A1 2 7 B1 A2 3 6 B2 GND 4 5 DIR VCCA 1 VCCB 7 B1 6 B2 5 DIR 8 A1 2 4 A2 Figure 5-3. DTT Package, 8-Pin SON Transparent (Top View) 3 GND Figure 5-4. DTM Package, 8-Pin X2SON Transparent (Top View) Table 5-1. Pin Functions PIN DCT, DCU, DTT, DTM TYPE(1) A1 2 I/O Input/output A1. Referenced to VCCA. A2 3 I/O Input/output A2. Referenced to VCCA. B1 7 I/O Input/output B1. Referenced to VCCB. B2 6 I/O Input/output B2. Referenced to VCCB. DIR 5 I GND 4 I/O Ground. VCCA 1 — A-port supply voltage. 1.1 V ≤ VCCA ≤ 5.5 V. VCCB 8 — B-port supply voltage. 1.1 V ≤ VCCB ≤ 5.5 V. NAME (1) DESCRIPTION Direction-control signal for all ports. Referenced to VCCA. I = input, O = output Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 3 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT VCCA Supply voltage A –0.5 6.5 V VCCB Supply voltage B –0.5 6.5 V I/O Ports (A Port) –0.5 6.5 VI Input Voltage(2) I/O Ports (B Port) –0.5 6.5 Control Inputs –0.5 6.5 A Port –0.5 6.5 B Port –0.5 6.5 A Port –0.5 VCCA + 0.5 B Port –0.5 VCCB + 0.5 VO Voltage applied to any output in the high-impedance or power-off state(2) VO Voltage applied to any output in the high or low state(2) (3) IIK Input clamp current VI < 0 –50 IOK Output clamp current VO < 0 –50 IO Continuous output current Continuous current through VCC or GND Tj Junction Temperature Tstg Storage temperature (1) (2) (3) V V V mA mA –50 50 mA –200 200 mA 150 °C 150 °C –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure beyond the limits listed in Recommended Operating Conditions. may affect device reliability. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The output positive-voltage rating may be exceeded up to 6.5 V maximum if the output current rating is observed. 6.2 ESD Ratings VALUE V(ESD) (1) (2) 4 Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) ±1000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) (1) (2) (3) MIN VCCA Supply voltage A VCCB Supply voltage B IOH 1.1 High-level output current IOL MAX UNIT 1.1 Low-level output current Input voltage (3) VO Output voltage TA (1) (2) (3) V 5.5 V VCCO = 1.1 V –0.1 VCCO = 1.4 V –4 VCCO = 1.65 V –8 VCCO = 2.3 V –12 VCCO = 3 V –24 VCCO = 4.5 V –32 VCCO = 1.1 V 0.1 VCCO = 1.4 V 4 VCCO = 1.65 V 8 VCCO = 2.3 V 12 VCCO = 3 V 24 VCCO = 4.5 V VI 5.5 mA mA 32 0 5.5 Active State 0 VCCO Tri-State 0 5.5 Operating free-air temperature –40 125 V V °C VCCI is the VCC associated with the input port. VCCO is the VCC associated with the output port. All control inputs and data I/Os of this device have weak pulldowns to ensure the line is not floating when undefined external to the device. The input leakage from these weak pulldowns is defined by the II specification indicated under Electrical Characteristics 6.4 Thermal Information SN74LXC2T45 THERMAL METRIC(1) DCT (SM8) DCU (VSSOP) DTT (SON) DTM (X2SON) 8 PINS 8 PINS 8 PINS 8 PINS UNIT RθJA Junction-to-ambient thermal resistance TBD 247.7 209.0 205.7 °C/W RθJC(top) Junction-to-case (top) thermal resistance TBD 96.7 139.3 120.6 °C/W RθJB Junction-to-board thermal resistance TBD 159.1 107.5 121.1 °C/W YJT Junction-to-top characterization parameter TBD 38.2 16.6 7.6 °C/W YJB Junction-to-board characterization parameter TBD 158.2 107.3 120.9 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 5 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 6.5 Electrical Characteristics over operating free-air temperature range (unless otherwise noted)(1) (2) Operating free-air temperature (TA) PARAMETER TEST CONDITIONS VCCA VCCB 25°C MIN VT+ Positivegoing inputthreshold voltage Control Input (DIR) (Referenced to VCCA) VT- Control Input (DIR) (Referenced to VCCA) MIN TYP MAX MIN TYP MAX 0.44 0.88 0.44 0.88 1.4 V 1.4 V 0.60 0.98 0.60 0.98 1.65 V 1.65 V 0.76 1.13 0.76 1.13 2.3 V 1.08 1.56 1.08 1.56 3V 1.48 1.92 1.48 1.92 4.5 V 4.5 V 2.19 2.74 2.19 2.74 5.5 V 5.5 V 2.65 3.33 2.65 3.33 1.1 V 1.1 V 0.44 0.88 0.44 0.88 1.4 V 1.4 V 0.60 0.98 0.60 0.98 1.65 V 1.65 V 0.76 1.13 0.76 1.13 2.3 V 2.3 V 1.08 1.56 1.08 1.56 3V 3V 1.48 1.92 1.48 1.92 4.5 V 4.5 V 2.19 2.74 2.19 2.74 5.5 V 5.5 V 2.65 3.33 2.65 3.33 1.1 V 1.1 V 0.17 0.48 0.17 0.48 1.4 V 1.4 V 0.28 0.59 0.28 0.59 1.65 V 1.65 V 0.35 0.69 0.35 0.69 2.3 V 0.56 0.97 0.56 0.97 3V 0.89 1.5 0.89 1.5 4.5 V 4.5 V 1.51 1.97 1.51 1.97 5.5 V 5.5 V 1.88 2.4 1.88 2.4 1.1 V 1.1 V 0.17 0.48 0.17 0.48 1.4 V 1.4 V 0.28 0.6 0.28 0.6 1.65 V 1.65 V 0.35 0.71 0.35 0.71 2.3 V 2.3 V 0.56 1 0.56 1 3V 3V 0.89 1.5 0.89 1.5 4.5 V 4.5 V 1.51 2 1.51 2 5.5 V 5.5 V 1.88 2.46 1.88 2.46 1.1 V 1.1 V 0.2 0.4 0.2 0.4 1.4 V 1.4 V 0.25 0.5 0.25 0.5 1.65 V 0.3 0.55 0.3 0.55 2.3 V 0.38 0.65 0.38 0.65 1.65 V Data Inputs (Ax, Bx) 2.3 V (Referenced to VCCI) 3V ΔVT Inputthreshold hysteresis (VT+ – VT-) Control Input (DIR) (Referenced to VCCA) 6 UNIT 1.1 V Data Inputs (Ax, Bx) 2.3 V (Referenced to VCCI) 3V Negativegoing inputthreshold voltage –40°C to 125°C 1.1 V Data Inputs 2.3 V (Ax, Bx) (Referenced to VCCI) 3V TYP MAX –40°C to 85°C 3V 0.46 0.72 0.46 0.72 4.5 V 4.5 V 0.58 0.93 0.58 0.93 5.5 V 5.5 V 0.69 1.06 0.69 1.06 1.1 V 1.1 V 0.2 0.4 0.2 0.4 1.4 V 1.4 V 0.25 0.5 0.25 0.5 1.65 V 1.65 V 0.3 0.55 0.3 0.55 2.3 V 2.3 V 0.38 0.65 0.38 0.65 3V 3V 0.46 0.72 0.46 0.72 4.5 V 4.5 V 0.58 0.93 0.58 0.93 5.5 V 5.5 V 0.69 1.06 0.69 1.06 Submit Document Feedback V V V V V V Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 6.5 Electrical Characteristics (continued) over operating free-air temperature range (unless otherwise noted)(1) (2) Operating free-air temperature (TA) PARAMETER TEST CONDITIONS VCCA VCCB 25°C MIN VOH VOL II High-level output voltage (3) Low-level output voltage (4) IOH = –100 µA 1.1 V – 5.5 V 1.1 V – 5.5 V IOH = –4 mA 1.4 V 1.4 V IOH = –8 mA 1.65 V IOH = –12 mA 2.3 V IOH = –24 mA IOH = –32 mA –40°C to 85°C TYP MAX MIN –40°C to 125°C TYP MAX MIN UNIT TYP MAX VCCO – 0.1 VCCO – 0.1 1 1 1.65 V 1.2 1.2 2.3 V 1.9 1.9 3V 3V 2.4 2.4 4.5 V 4.5 V 3.8 3.8 IOL = 100 µA 1.1 V – 5.5 V 1.1 V – 5.5 V IOL = 4 mA 1.4 V 1.4 V 0.3 0.3 IOL = 8 mA 1.65 V 1.65 V 0.45 0.45 IOL = 12 mA 2.3 V 2.3 V 0.3 0.3 IOL = 24 mA 3V 3V 0.55 0.55 IOL = 32 mA 4.5 V 4.5 V 0.55 0.55 1.1 V – 5.5 V 1.1 V – 5.5 V -0.1 1 -0.1 2 -0.1 2 µA 1.1 V – 5.5 V 1.1 V – 5.5 V –0.3 1 –1 1 –2 2 µA Control input (DIR) Input leakage VI = VCCA or GND current Data Inputs (5) (Ax, Bx) VI = VCCI or GND 0.1 V 0.1 A Port or B Port Partial power VI or VO = 0 V – 5.5 down current V 0V 0 V – 5.5 V –1 1 –2 2 –2.5 2.5 Ioff 0 V – 5.5 V 0V –1 1 –2 2 –2.5 2.5 Floating (6) 0 V – 5.5 V –1.5 1.5 –2 2 –2.5 2.5 Ioff-float Floating supply Partial A Port or B Port power down VI or VO = GND current 0 V – 5.5 V Floating (6) –1.5 1.5 –2 2 –2.5 2.5 1.1 V – 5.5 V 1.1 V – 5.5 V 0V 5.5 V 5.5 V 0V 1 2 4 5.5 V Floating (6) 2 3 6 1.1 V – 5.5 V 1.1 V – 5.5 V 2 3 6 0V 5.5 V 1 2 4 5.5 V 0V VI = GND IO = 0 Floating (6) 5.5 V 2 3 6 VI = VCCI or GND IO = 0 1.1 V – 5.5 V 1.1 V – 5.5 V 3 4 6 ICCA VCCA supply current VI = VCCI or GND IO = 0 VI = GND IO = 0 ICCB ICCA + ICCB VCCB supply current Combined supply current VI = VCCI or GND IO = 0 2 –0.2 3 –0.5 –0.2 µA µA 6 –1 –0.5 V –1 µA µA µA Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 7 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 6.5 Electrical Characteristics (continued) over operating free-air temperature range (unless otherwise noted)(1) (2) Operating free-air temperature (TA) PARAMETER TEST CONDITIONS VCCA VCCB 25°C MIN MIN –40°C to 125°C TYP MAX MIN UNIT TYP MAX Control input (DIR): VI = VCCA – 0.6 V A port = VCCA or GND B Port = open 3.0 V – 5.5 V A Port: VI = VCCA – 0.6 V DIR = VCCA, B Port = open 3.0 V – 5.5 V 3.0 V – 5.5 V 50 75 ΔICCB VCCB additional supply current per input B Port: VI = VCCB 0.6 V DIR = GND, A Port = open 3.0 V – 5.5 V 3.0 V – 5.5 V 50 75 µA Ci Control Input Capacitance VI = 3.3 V or GND 3.3 V 3.3 V 2.2 5 5 pF Cio Data I/O Capacitance VCCO = 0V VO = 1.65 V DC +1 MHz -16 dBm sine wave 3.3 V 3.3 V 4.4 10 10 pF ΔICCA (1) (2) (3) (4) (5) (6) 8 TYP MAX –40°C to 85°C VCCA additional supply current per input 3.0 V – 5.5 V 50 75 µA VCCI is the VCC associated with the input port. VCCO is the VCC associated with the output port. Tested at VI = VT+(MAX) Tested at VI = VT-(MIN) For I/O ports, the parameter Il includes the IOZ current. Floating is defined as a node that is both not actively driven by an external device and has leakage not exeeding 10 nA. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 6.6 Switching Characteristics: Tsk, TMAX over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCCI Up Translation 50% Duty Cycle Input TMAX - Maximum One channel switching Data Rate 20% of pulse > 0.7*VCCO 20% of pulse < 0.3*VCCO Timing skew between any two switching tsk - Output skew outputs within the same device Down Translation -40°C to 125°C MIN TYP 3.0 V – 3.6 V 4.5 V – 5.5 V 200 420 2.25 V – 2.75 V 4.5 V – 5.5 V 150 300 1.65 V – 1.95 V 4.5 V – 5.5 V 100 200 1.1 V – 1.3 V 4.5 V – 5.5 V 20 40 1.65 V – 1.95 V 3.0 V – 3.6 V 100 210 1.1 V – 1.3 V 3.0 V – 3.6 V 10 20 1.1 V – 1.3 V 1.65 V – 1.95 V 4.5 V – 5.5 V 3.0 V – 3.6 V 4.5 V – 5.5 V 4.5 V – 5.5 V Down Translation 4.5 V – 5.5 V Up Translation VCCO Operating free-air temperature (TA) 5 10 100 210 2.25 V – 2.75 V 75 140 1.65 V – 1.95 V 50 75 UNIT MAX Mbps 1.1 V – 1.3 V 15 30 3.0 V – 3.6 V 1.65 V – 1.95 V 40 75 3.0 V – 3.6 V 1.1 V – 1.3 V 10 20 1.65 V – 1.95 V 1.1 V – 1.3 V 5 10 3.0 V – 3.6 V 4.5 V – 5.5 V 0.2 1.65 V – 1.95 V 4.5 V – 5.5 V 0.5 1.1 V – 1.3 V 4.5 V – 5.5 V 3.5 1.65 V – 1.95 V 3.0 V – 3.6 V 0.5 1.1 V – 1.3 V 3.0 V – 3.6 V 3.5 1.1 V – 1.3 V 1.65 V – 1.95 V 2.5 4.5 V – 5.5 V 3.0 V – 3.6 V 0.2 4.5 V – 5.5 V 1.65 V – 1.95 V 0.5 4.5 V – 5.5 V 1.1 V – 1.3 V 3.0 V – 3.6 V 1.65 V – 1.95 V 3.0 V – 3.6 V 1.1 V – 1.3 V 2 1.65 V – 1.95 V 1.1 V – 1.3 V 2 ns 2 0.5 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 9 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 6.7 Switching Characteristics, VCCA = 1.2 ± 0.1 V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO Test Conditions B-Port Supply Voltage (VCCB) 1.2 ± 0.1 V MIN TYP A tpd Propagation delay B DIR tdis DIR A B A Enable time DIR 10 A Disable time DIR ten B B 1.5 ± 0.1 V MAX MIN TYP 1.8 ± 0.15 V MAX MIN TYP 2.5 ± 0.2 V MAX MIN TYP 3.3 ± 0.3 V MAX MIN TYP UNIT 5.0 ± 0.5 V MAX MIN TYP MAX -40°C to 85°C 1 84 1 40 1 35 1 32 1 33 1 47 -40°C to 125°C 1 54 1 36 1 32 1 29 1 29 1 33 -40°C to 85°C 1 84 1 70 1 66 1 59 1 56 1 57 -40°C to 125°C 1 54 1 46 1 43 1 37 1 36 1 35 -40°C to 85°C 6 84 6 63 6 63 6 63 6 63 6 63 -40°C to 125°C 8 52 8 52 8 52 8 52 8 52 8 52 -40°C to 85°C 13 95 10 56 9 50 7 63 6 63 6 42 -40°C to 125°C 19 82 16 57 15 52 12 44 12 43 10 42 -40°C to 85°C 24 158 19 117 17 106 15 93 15 91 14 92 -40°C to 125°C 31 131 27 98 25 88 21 77 20 74 19 72 -40°C to 85°C 16 126 14 97 13 93 12 90 12 91 12 105 -40°C to 125°C 20 102 18 83 17 78 16 73 16 72 15 75 Submit Document Feedback ns ns ns Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 6.8 Switching Characteristics, VCCA = 1.5 ± 0.1 V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO Test Conditions B-Port Supply Voltage (VCCB) 1.2 ± 0.1 V MIN TYP A tpd Propagation delay B DIR tdis A A Disable time DIR DIR ten B B A Enable time DIR B 1.5 ± 0.1 V MAX MIN TYP 1.8 ± 0.15 V MAX MIN TYP 2.5 ± 0.2 V MAX MIN TYP 3.3 ± 0.3 V MAX MIN TYP UNIT 5.0 ± 0.5 V MAX MIN TYP MAX -40°C to 85°C 1 70 1 29 1 24 1 20 1 19 1 19 -40°C to 125°C 1 46 1 29 1 24 1 21 1 19 1 20 -40°C to 85°C 1 39 1 29 1 26 1 23 1 21 1 21 -40°C to 125°C 1 36 1 29 1 26 1 23 1 21 1 21 -40°C to 85°C 3 29 3 29 3 29 3 29 3 29 3 29 -40°C to 125°C 5 29 5 29 5 29 5 29 5 29 5 29 -40°C to 85°C 11 78 8 45 7 38 5 31 5 30 4 28 -40°C to 125°C 17 70 14 46 11 40 10 32 9 31 8 29 -40°C to 85°C 19 113 15 69 13 59 11 49 11 46 9 44 -40°C to 125°C 27 101 23 70 21 61 18 51 17 48 15 45 -40°C to 85°C 12 91 10 53 9 48 8 43 8 41 7 41 -40°C to 125°C 16 71 14 54 13 49 12 44 12 42 11 42 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 ns ns ns 11 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 6.9 Switching Characteristics, VCCA = 1.8 ± 0.15 V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO Test Conditions B-Port Supply Voltage (VCCB) 1.2 ± 0.1 V MIN TYP A tpd Propagation delay B DIR tdis DIR A B A Enable time DIR 12 A Disable time DIR ten B B 1.5 ± 0.1 V MAX MIN TYP 1.8 ± 0.15 V MAX MIN TYP 2.5 ± 0.2 V MAX MIN TYP 3.3 ± 0.3 V MAX MIN TYP UNIT 5.0 ± 0.5 V MAX MIN TYP MAX -40°C to 85°C 1 66 1 26 1 21 1 17 1 16 1 15 -40°C to 125°C 1 43 1 27 1 22 1 18 1 17 1 16 -40°C to 85°C 1 35 1 24 1 21 1 18 1 17 1 17 -40°C to 125°C 1 32 1 24 1 22 1 19 1 18 1 17 -40°C to 85°C 2 22 2 22 2 23 2 23 2 22 2 22 -40°C to 125°C 4 23 4 31 4 23 4 23 4 23 4 23 -40°C to 85°C 9 73 7 40 6 34 4 27 4 25 3 23 -40°C to 125°C 15 64 13 42 11 36 6 28 8 27 6 25 -40°C to 85°C 17 103 13 59 12 50 9 40 9 38 7 35 -40°C to 125°C 23 90 21 61 19 53 16 43 12 39 12 37 -40°C to 85°C 11 80 9 44 8 39 7 34 6 33 6 32 -40°C to 125°C 14 61 12 45 11 40 10 36 10 34 9 35 Submit Document Feedback ns ns ns Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 6.10 Switching Characteristics, VCCA = 2.5 ± 0.2 V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO Test Conditions B-Port Supply Voltage (VCCB) 1.2 ± 0.1 V MIN TYP A tpd Propagation delay B DIR tdis A A Disable time DIR DIR ten B B A Enable time DIR B 1.5 ± 0.1 V MAX MIN TYP 1.8 ± 0.15 V MAX MIN TYP 2.5 ± 0.2 V MAX MIN TYP 3.3 ± 0.3 V MAX MIN TYP UNIT 5.0 ± 0.5 V MAX MIN TYP MAX -40°C to 85°C 1 59 1 23 1 19 1 15 1 13 1 12 -40°C to 125°C 1 38 1 23 1 19 1 15 1 14 1 13 -40°C to 85°C 1 32 1 20 1 17 1 15 1 14 1 13 -40°C to 125°C 1 29 1 21 1 18 1 15 1 14 1 14 -40°C to 85°C 1 16 1 23 1 16 1 16 1 20 1 16 -40°C to 125°C 2 16 2 16 2 16 2 25 2 16 2 16 -40°C to 85°C 8 63 6 35 5 29 3 23 3 22 2 19 -40°C to 125°C 13 56 10 37 10 31 8 25 7 23 5 20 -40°C to 85°C 14 91 11 49 10 41 8 33 7 30 6 27 -40°C to 125°C 21 76 18 51 16 44 14 35 13 32 10 29 -40°C to 85°C 8 67 6 33 5 33 4 25 4 24 4 23 -40°C to 125°C 11 49 9 34 8 30 7 27 7 27 6 24 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 ns ns ns 13 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 6.11 Switching Characteristics, VCCA = 3.3 ± 0.3 V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO Test Conditions B-Port Supply Voltage (VCCB) 1.2 ± 0.1 V MIN TYP A tpd Propagation delay B DIR tdis DIR A B A Enable time DIR 14 A Disable time DIR ten B B 1.5 ± 0.1 V MAX MIN TYP 1.8 ± 0.15 V MAX MIN TYP 2.5 ± 0.2 V MAX MIN TYP 3.3 ± 0.3 V MAX MIN TYP UNIT 5.0 ± 0.5 V MAX MIN TYP MAX -40°C to 85°C 1 57 1 21 1 17 1 14 1 12 1 11 -40°C to 125°C 1 36 1 22 1 18 1 14 1 13 1 12 -40°C to 85°C 1 33 1 19 1 16 1 13 1 12 1 12 -40°C to 125°C 1 29 1 19 1 17 1 14 1 13 1 12 -40°C to 85°C 1 14 1 14 1 14 1 14 1 20 1 14 -40°C to 125°C 1 34 1 15 1 15 1 15 1 15 1 17 -40°C to 85°C 7 59 5 32 5 27 3 21 3 20 2 18 -40°C to 125°C 12 52 9 33 9 29 7 23 7 22 5 19 -40°C to 85°C 13 86 10 44 9 37 7 30 7 28 5 25 -40°C to 125°C 19 71 16 46 14 39 12 32 12 29 10 26 -40°C to 85°C 8 64 6 30 5 27 4 23 4 22 3 22 -40°C to 125°C 10 46 9 31 8 28 7 24 6 23 6 22 Submit Document Feedback ns ns ns Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 6.12 Switching Characteristics, VCCA = 5.0 ± 0.5 V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO Test Conditions B-Port Supply Voltage (VCCB) 1.2 ± 0.1 V MIN TYP A tpd Propagation delay B DIR tdis A A Disable time DIR DIR ten B B A Enable time DIR B 1.5 ± 0.1 V MAX MIN TYP 1.8 ± 0.15 V MAX MIN TYP 2.5 ± 0.2 V MAX MIN TYP 3.3 ± 0.3 V MAX MIN TYP UNIT 5.0 ± 0.5 V MAX MIN TYP MAX -40°C to 85°C 1 57 1 21 1 17 1 13 1 12 1 11 -40°C to 125°C 1 36 1 21 1 17 1 14 1 12 1 11 -40°C to 85°C 1 47 1 19 1 15 1 12 1 11 1 11 -40°C to 125°C 1 33 1 20 1 16 1 13 1 12 1 11 -40°C to 85°C 1 12 1 12 1 21 1 12 1 15 1 12 -40°C to 125°C 1 12 1 12 1 20 1 12 1 12 1 12 -40°C to 85°C 1 57 1 30 4 25 3 20 3 19 2 17 -40°C to 125°C 11 50 9 31 8 27 6 21 6 20 4 18 -40°C to 85°C 8 98 6 42 8 34 7 27 7 25 5 23 -40°C to 125°C 18 73 15 44 13 36 11 29 11 27 9 24 -40°C to 85°C 6 62 4 28 3 24 3 20 2 19 2 18 -40°C to 125°C 9 43 7 28 6 25 5 21 4 20 4 19 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 ns ns ns 15 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 6.13 Operating Characteristics TA = 25℃ (1) PARAMETER A to B CpdA (2) B to A A to B CpdB (1) (2) (3) 16 (3) B to A TEST CONDITIONS A Port CL = 0, RL = Open f = 10 MHz trise = tfall = 1 ns B Port CL = 0, RL = Open f = 10 MHz trise = tfall = 1 ns SUPPLY VOLTAGE (VCCB = VCCA) 1.2 ± 0.1V 1.5 ± 0.1V 1.8 ± 0.15V 2.5 ± 0.2V 3.3 ± 0.3V 5.0 ± 0.5V TYP TYP TYP TYP TYP TYP 3 3 3 3.5 3.5 4.2 17 17 17 18 20 22 17 17 17 18 20 22 3 3 3 3.5 3.5 4.2 UNIT pF pF For additional information about how power dissipation capacitance affects power consumption, see the CMOS Power Consumption and Cpd Calculation application report. A-Port power dissipation capacitance per transceiver. B-Port power dissipation capacitance per transceiver. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 6.14 Typical Characteristics 4.5 1.6 4 VOH Output High Voltage (V) 1.8 VOH Output High Voltage (V) 5 1.4 VCC = 5 V VCC = 3.3 V VCC = 2.5 V 3.5 1.2 3 2.5 1 0.8 2 VCC = 1.8 V VCC = 1.5 V VCC = 1.2 V 0.6 1.5 0.4 0 5 10 15 20 25 30 35 40 IOH  Output High Current (mA) 45 50 Figure 6-1. Typical (TA=25°C) Output High Voltage (VOH) vs Source Current (IOH) 0 0.35 0.35 VOL Output Low Voltage (V) 0.4 VOL Output Low Voltage (V) 0.45 0.4 0.3 5 7.5 10 12.5 15 17.5 20 IOH  Output High Current (mA) 22.5 25 Figure 6-2. Typical (TA=25°C) Output High Voltage (VOH) vs Source Current (IOH) 0.45 0.25 2.5 0.3 0.25 0.2 0.15 0.2 0.15 0.1 VCC = 5 V VCC = 3.3 V VCC = 2.5 V 0.05 0 0 5 10 15 20 25 30 35 40 IOL  Output Low Current (mA) 45 0.1 VCC = 1.8 V VCC = 1.5 V VCC = 1.2 V 0.05 0 50 Figure 6-3. Typical (TA=25°C) Output High Voltage (VOL) vs Sink Current (IOL) 0 2.5 5 7.5 10 12.5 15 17.5 20 IOL  Output Low Current (mA) 22.5 25 Figure 6-4. Typical (TA=25°C) Output High Voltage (VOL) vs Sink Current (IOL) 2 1.6 VCC = 1.8 V VCC = 1.5 V VCC = 1.2 V 0.2 0.18 1.4 ICC Supply Current (mA) Supply Current (mA) ICC 0.22 VCC = 5 V VCC = 3.3 V VCC = 2.5 V 1.8 0.16 1.2 0.14 0.12 1 0.8 0.1 0.08 0.6 0.06 0.4 0.04 0.2 0.02 0 0 0.5 1 1.5 2 2.5 3 3.5 VIN Input Voltage (V) 4 4.5 5 Figure 6-5. Typical (TA=25°C) Supply Current (ICC) vs Input Voltage (VIN) 0 0 0.2 0.4 0.6 0.8 1 1.2 VIN  Input Voltage (V) 1.4 1.6 1.8 Figure 6-6. Typical (TA=25°C) Supply Current (ICC) vs Input Voltage (VIN) Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 17 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 7 Parameter Measurement Information 7.1 Load Circuit and Voltage Waveforms Unless otherwise noted, all input pulses are supplied by generators having the following characteristics: • f = 1 MHz • ZO = 50 Ω • Δt/ΔV ≤ 1 ns/V Measurement Point 2 x VCCO RL S1 Output Pin Under Test Open CL(1) A. GND RL CL includes probe and jig capacitance. Figure 7-1. Load Circuit Table 7-1. Load Circuit Conditions Parameter tpd Propagation (delay) time ten, tdis Enable time, disable time ten, tdis Enable time, disable time VCCO RL CL S1 1.1 V – 5.5 V 2 kΩ 15 pF Open N/A 1.1 V – 1.6 V 2 kΩ 15 pF 2 × VCCO 0.1 V 1.65 V – 2.7 V 2 kΩ 15 pF 2 × VCCO 0.15 V 3.0 V – 5.5 V 2 kΩ 15 pF 2 × VCCO 0.3 V 1.1 V – 1.6 V 2 kΩ 15 pF GND 0.1 V 1.65 V – 2.7 V 2 kΩ 15 pF GND 0.15 V 3.0 V – 5.5 V 2 kΩ 15 pF GND 0.3 V VCCI(1) VCCI(1) Input A, B Input A, B VCCI / 2 VCCI / 2 100 kHz 500 ps/V ± 1 s/V 0V 0V tpd VOH(2) tpd VOH(2) Output B, A VCCI / 2 Output B, A Ensure Monotonic Rising and Falling Edge VOL(2) VCCI / 2 VOL(2) 1. 2. VTP VCCI is the supply pin associated with the input port. VOH and VOL are typical output voltage levels that occur with specified RL, CL, and S1. 1. 2. VCCI is the supply pin associated with the input port. VOH and VOL are typical output voltage levels that occur with specified RL, CL, and S1. Figure 7-3. Input Transition Rise and Fall Rate Figure 7-2. Propagation Delay 18 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 VCCA DIR VCCA / 2 VCCA / 2 GND ten(1) Output A(2) VCCO(5) VCCO / 2 VOL + VTP VOL(6) tdis VOH(6) Output A VOH - VTP (3) VCCO / 2 GND ten(1) VCCO(5) Output B(2) VCCO / 2 VOL + VTP VOL(6) tdis VOH(6) Output B(3) VCCO / 2 VOH - VTP GND 1. 2. 3. 4. 5. 6. Illustrative purposes only. Enable time is a calculation as described in Enable Times.. Output waveform on the condition that input is driven to a valid Logic low. Output waveform on the condition that input is driven to a valid Logic high. VCCI is the supply pin associated with the input port. VCCO is the supply pin associated with the output port. VOH and VOL are typical output voltage levels with specified RL, CL, and S1. Figure 7-4. Enable Time And Disable Time Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 19 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 8 Detailed Description 8.1 Overview The SN74LXC2T45 is a 2-bit translating transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 1.1 V and as high as 5.5 V. Additionally, the device can be operated with VCCA = VCCB. The A port is designed to track VCCA, and the B port is designed to track VCCB. The SN74LXC2T45 device is designed for asynchronous communication between two data buses, and transmits data from the A bus to the B bus or from the B bus to the A bus based on the logic level of the direction-control input (DIR). The control pin of the SN74LXC2T45 (DIR) are referenced to VCCA. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ. This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or sourced into an input, output, or I/O while the device is powered down. The VCC isolation or VCC disconnect feature ensures that if either VCC is less than 100 mV or disconnected with the complementary supply within the recommended operating conditions, both I/O ports are weakly pulled-down and then set to the high-impedance state by disabling their outputs while the supply current is maintained. The Ioff-float circuitry ensures that no excessive current is drawn from or sourced into an input, output, or I/O while the supply is floating. Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance. 8.2 Functional Block Diagram VCCA VCCB DIR 20 A1 B1 A2 B2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 8.3 Feature Description 8.3.1 CMOS Schmitt-Trigger Inputs with Integrated Pulldowns Standard CMOS inputs are high impedance and are typically modeled as a resistor in parallel with the input capacitance given in the Electrical Characteristics. The worst case resistance is calculated with the maximum input voltage, given in the Absolute Maximum Ratings, and the maximum input leakage current, given in the Electrical Characteristics, using ohm's law (R = V ÷ I). The Schmitt-trigger input architecture provides hysteresis as defined by ΔVT in the Electrical Characteristics, which makes this device extremely tolerant to slow or noisy inputs. Driving the inputs slowly will increase dynamic current consumption of the device. For additional information regarding Schmitt-trigger inputs, see Understanding Schmitt Triggers. 8.3.1.1 I/O's with Integrated Dynamic Pull-Down Resistors Input circuits of the data I/O's are always active even when the device is disabled. It is recommended to keep a valid voltage level at the I/O's to avoid high current consumption. To help avoid floating inputs on the I/O's during disabling, this device has 100-kΩ typical integrated weak dynamic pull-downs on all data I/O's. When the device is disabled, the dynamic pull-downs are activated for only a short period of time to help drive and keep low any floating inputs before the device I/O's become high impedance. If the I/O lines are to be floated after the device is disabled, then it is recommended to keep them at a valid input voltage level using external pull-downs. This feature is ideal for loads of 30 pF or less. If greater capactive loading is present then external pull-downs are recommended. If an external pull-up is required, it should be no larger than 15 kΩ to avoid contention with the 100 kΩ internal pull-down. 8.3.1.2 Control Inputs with Integrated Static Pull-Down Resistors Similar to the data I/O's, floating control inputs can cause high current consumption. To help avoid this concern, this device has integrated weak static pull-downs of 5 MΩ typical on the control input (DIR). These pull-downs are always present. For example, if the DIR pin is left floating, then the B port will be configured as an input and the A port configured as an output. 8.3.2 Balanced High-Drive CMOS Push-Pull Outputs A balanced output allows the device to sink and source similar currents. The high drive capability of this device creates fast edges into light loads so routing and load conditions should be considered to prevent ringing. Additionally, the outputs of this device are capable of driving larger currents than the device can sustain without being damaged. The electrical and thermal limits defined in the Absolute Maximum Ratings must be followed at all times. 9 Partial Power Down (Ioff) The inputs and outputs for this device enter a high-impedance state when the device is powered down, inhibiting current backflow into the device. The maximum leakage into or out of any input or output pin on the device is specified by Ioff in the Electrical Characteristics. 10 VCC Isolation and VCC Disconnect (Ioff-float) This device has I/O's with Integrated Pull-Down Resistors. The I/O's will get pulled down and then enter a high-impedance state when either supply is < 100 mV or left floating (disconnected), while the other supply is still connected to the device. It is recommended that the I/O's for this device are not driven and kept at a logic low state prior to floating (disconnecting) either supply. The maximum supply current is specified by ICCx, while VCCx is floating, in the Electrical Characterstics. The maximum leakage into or out of any input or output pin on the device is specified by Ioff(float) in the Electrical Characteristics. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 21 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 VCCA VCCB ICCB maintained Supply disconnected VCCA VCCB DIR OE Disabled Hi-Z A1 Ioff(float) Hi-Z B1 Ioff(float) Disabled GND Figure 10-1. VCC Disconnect Feature 11 Over-Voltage Tolerant Inputs Input signals to this device can be driven above the supply voltage so long as they remain below the maximum input voltage value specified in the Recommended Operating Conditions. 12 Glitch-Free Power Supply Sequencing Either supply rail may be powered on or off in any order without producing a glitch on the I/Os (that is, where the output erroneously transitions to VCC when it should be held low or vice versa). Glitches of this nature can be misinterpreted by a peripheral as a valid data bit, which could trigger a false device reset of the peripheral, a false device configuration of the peripheral, or even a false data initialization by the peripheral. 22 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 13 Negative Clamping Diodes Figure 13-1 shows how the inputs and outputs to this device have negative clamping diodes. CAUTION Voltages beyond the values specified in the Absolute Maximum Ratings table can cause damage to the device. The input negative-voltage and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. VCCA VCCB Device Input or I/O configured as input Level Shifter -IIK I/O configured as output -IOK GND Figure 13-1. Electrical Placement of Clamping Diodes for Each Input and Output 14 Fully Configurable Dual-Rail Design Both the VCCA and VCCB pins can be supplied at any voltage from 1.1 V to 5.5 V, making the device suitable for translating between any of the voltage nodes (1.2 V, 1.5 V, 1.8 V, 3.3 V, and 5.0 V). 15 Supports High-Speed Translation The SN74LXC2T45 device can support high data-rate applications. The translated signal data rate can be up to 420 Mbps when the signal is translated from 3.3 V to 5.0 V. 16 Device Functional Modes Table 16-1. Function Table CONTROL INPUTS (1) (1) PORT STATUS OPERATION DIR A PORT B PORT L Output (Enabled) Input (Hi-Z) B data to A bus H Input (Hi-Z) Output (Enabled) A data to B bus Input circuits of the data I/Os are always active and should be kept at a valid logic level. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 23 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 17 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 17.1 Application Information The SN74LXC2T45 device can be used in level-translation applications for interfacing devices or systems operating at different interface voltages with one another. The SN74LXC2T45 device is ideal for use in applications where a push-pull driver is connected to the data I/Os. The maximum data rate can be up to 420 Mbps when device translates a signal from 3.3 V to 5.0 V. 17.2 Enable Times Calculate the enable times for the SN74LXC2T45 using the following formulas: tA_en (DIR to A) = tdis (DIR to B) + tpd (B to A) (1) tB_en (DIR to B) = tdis (DIR to A) + tpd (A to B) (2) In a bidirectional application, these enable times provide the maximum delay time from the time the DIR bit is switched until an output is expected. For example, if the SN74LXC2T45 initially is transmitting from A to B, then the DIR bit is switched; the B port of the device must be disabled (tdis) before presenting it with an input. After the B port has been disabled, an input signal applied to it appears on the corresponding A port after the specified propagation delay (tpd). To avoid bus contention, care should be taken to not apply an input signal prior to the output being disabled (tdis maximum). 17.3 Typical Application VCCA VCCB CAT ERR GPIO1 System Controller CPU GPIO2 PROC HOT SN74LXC2T45 Figure 17-1. GPIO Driver Application 24 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 17.3.1 Design Requirements For this design example, use the parameters listed in Table 17-1. Table 17-1. Design Parameters DESIGN PARAMETERS EXAMPLE VALUES Input voltage range 1.1 V to 5.5 V Output voltage range 1.1 V to 5.5 V 17.3.2 Detailed Design Procedure To begin the design process, determine the following: • Input voltage range – Use the supply voltage of the device that is driving the SN74LXC2T45 device to determine the input voltage range. For a valid logic-high, the value must exceed the positive-going input-threshold voltage (Vt+) of the input port. For a valid logic low the value must be less than the negative-going input-threshold voltage (Vt-) of the input port. • Output voltage range – Use the supply voltage of the device that the SN74LXC2T45 device is driving to determine the output voltage range. 18 Power Supply Recommendations Always apply a ground reference to the GND pins first. This device is designed for glitch free power sequencing without any supply sequencing requirements such as ramp order or ramp rate. This device was designed with various power supply sequencing methods in mind to help prevent unintended triggering of downstream devices, as described in Glitch-Free Power Supply Sequencing. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 25 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 19 Layout 19.1 Layout Guidelines To ensure reliability of the device, following common printed-circuit board layout guidelines are recommended: • Use bypass capacitors on the power supply pins and place them as close to the device as possible. A 0.1 µF capacitor is recommended, but transient performance can be improved by having both 1 µF and 0.1 µF capacitors in parallel as bypass capacitors. • The high drive capability of this device creates fast edges into light loads. So routing and load conditions should be considered to prevent ringing. 19.2 Layout Example Legend G A Via to GND Copper Traces B Via to VCCA Via to VCCB SN74LXC2T45 G 01005 0.1µF VCCA PROCHOT to Con tro l le r 4 mi l CAT ERR to Con tro l le r 01005 0.1µF VCCB A 1 8 B A1 2 7 B1 PROCHOT from CPU A2 3 6 B2 CAT ERR from CPU 4 5 G GND G DIR Figure 19-1. Layout Example—SN74LXC2T45DTT 26 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 SN74LXC2T45 www.ti.com SCES938B – OCTOBER 2021 – REVISED MAY 2022 20 Device and Documentation Support 20.1 Documentation Support 20.1.1 Related Documentation For related documentation, see the following: • Texas Instruments, Understanding Schmitt Triggers application report 20.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 20.3 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 20.4 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 20.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 20.6 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 21 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74LXC2T45 27 PACKAGE OPTION ADDENDUM www.ti.com 8-May-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN74LXC2T45DCUR ACTIVE VSSOP DCU 8 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 SN74LXC2T45DTMR ACTIVE X2SON DTM 8 5000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 1LE Samples SN74LXC2T45DTTR ACTIVE X1SON DTT 8 5000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 1LM Samples Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of