0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
SN751730DRG4

SN751730DRG4

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC16

  • 描述:

    IC TRANSCEIVER 3/3 16SOIC

  • 数据手册
  • 价格&库存
SN751730DRG4 数据手册
www.ti.com FEATURES SN751730 TRIPLE LINE DRIVER/RECEIVER SLLS062E – MAY 1990 – REVISED AUGUST 2007 1 • Meets or Exceeds the Requirements of IBM® 360/370 Input/Output Interface Specification for 4.5-Mb/s Operation • Single 5-V Supply • Uncommitted Emitter-Follower Output Structure for Party-Line Operation • Driver Output Short-Circuit Protection • Driver Input/Receiver Output Compatible With TTL • Receiver Input Resistance . . . 7.4 kΩ to 20 kΩ • Ratio Specification for Propagation Delay Time, Low to High/High to Low 2 DESCRIPTION/ ORDERING INFORMATION The SN751730 triple line driver/receiver is specifically designed to meet the input/output interface specifications for IBM System 360/370. It also is compatible with standard TTL logic and supply voltage levels. The low-impedance emitter-follower driver outputs of the SN751730 drive terminated lines, such as coaxial cable or twisted pair. Having the outputs uncommitted allows wired-OR logic to be performed in party-line applications. Output short-circuit protection is provided by an internal clamping network that turns on when the output voltage drops below approximately 2.5 V. An open line affects the receiver input as does a low-level input voltage. All the driver inputs and receiver outputs are in conventional TTL configuration and the gating can be used during power-up and power-down sequences to ensure that no noise is introduced to the line by pulling either DE1 or DE2 to a low level. D OR N PACKAGE (TOP VIEW) DE1 RI1 RO1 RI2 RO2 RI3 RO3 GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC DO1 DI1 DO2 DI2 DO3 DI3 DE2 DW PACKAGE (TOP VIEW) DE1 RI1 N.C. RO1 RI2 RO2 RI3 N.C. RO3 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC DO1 N.C. DI1 DO2 DI2 DO3 N.C. DI3 DE2 NS PACKAGE (TOP VIEW) DE1 RI1 RO1 RI2 N.C. N.C. RO2 RI3 RO3 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC DO1 DI1 DO2 N.C. N.C. DI2 DO3 DI3 DE2 N.C. – No internal connection 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. IBM is a registered trademark of International Business Machines Corporation. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1990–2007, Texas Instruments Incorporated SN751730 TRIPLE LINE DRIVER/RECEIVER www.ti.com SLLS062E – MAY 1990 – REVISED AUGUST 2007 ORDERING INFORMATION TA PACKAGE PDIP – N SOIC – D 0°C to 70°C SOIC – DW SOP – NS (1) (2) (1) (2) ORDERABLE PART NUMBER Tube SN751730N Tube SN751730D Tape and reel SN751730DR Tube SN751730DW Tape and reel SN751730DWR Tape and reel SN751730NSR TOP-SIDE MARKING SN751730N SN751730 SN751730 SN751730 Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. FUNCTION TABLES EACH DRIVER INPUTS DI DE1 DE2 OUTPUT DO L X X L X L X L X X L L H H H H EACH DRIVER (1) (1) INPUT RI OUTPUT RO L H H L Open H H = high level, L = low level, X = irrelevant LOGIC DIAGRAM (POSITIVE LOGIC) RECEIVER DRIVER 1 DE1 DI1 DI2 DI3 14 15 12 13 10 11 DE2 DO1 DO2 DO3 RI1 2 3 4 5 6 7 RI2 RI3 RO1 RO2 RO3 9 Pin numbers shown are for the D and N package only. 2 Submit Documentation Feedback Copyright © 1990–2007, Texas Instruments Incorporated Product Folder Link(s): SN751730 SN751730 TRIPLE LINE DRIVER/RECEIVER www.ti.com SLLS062E – MAY 1990 – REVISED AUGUST 2007 EQUIVALENT SCHEMATICS OF DRIVER AND RECEIVER(1) DRIVER VCC 2.5 Ω 15 kΩ DO DI DE1 DE2 100 Ω RECEIVER VCC 60 Ω 6 kΩ RO RI 14 kΩ (1) All resistor values are nominal. Submit Documentation Feedback Copyright © 1990–2007, Texas Instruments Incorporated Product Folder Link(s): SN751730 3 SN751730 TRIPLE LINE DRIVER/RECEIVER www.ti.com SLLS062E – MAY 1990 – REVISED AUGUST 2007 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN VCC Supply voltage (2) VI Input voltage range VO Output voltage range MAX UNIT 7 V Driver –0.5 7 V Receiver –0.5 7 V Driver –0.5 7 V –0.5 7 V Enable input voltage range D package 73 DW package 58 N package 67 °C/W θJA Package thermal impedance (3) TJ Operating virtual junction temperature 150 Lead temperature 1,6 mm (1/16 inch) from case for 10 s 260 °C 150 °C/W NS package Tstg (1) (2) (3) 60 Storage temperature range –65 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage TA Operating free-air temperature 4 Driver, Enable Receiver MIN NOM MAX UNIT 4.75 5 5.25 V 2 Driver, Enable 0.8 Receiver 1.15 0 Submit Documentation Feedback V 1.55 70 V °C Copyright © 1990–2007, Texas Instruments Incorporated Product Folder Link(s): SN751730 SN751730 TRIPLE LINE DRIVER/RECEIVER www.ti.com SLLS062E – MAY 1990 – REVISED AUGUST 2007 DRIVER SECTION Electrical Characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER VIK TEST CONDITIONS Input clamp voltage VOH High–level output voltage MIN VCC = 4.75 V, IIL = –18 mA VCC = 4.75 V, IOH = –59.3 mA VIH = 2 V, TA = 25°C VCC = 5.25 V, IOH = - 78.1 mA VIH = 2 V, VCC = 4.75 V, RL = 51.4 Ω VIH = 2 V, VCC = 5.25 V, RL = 56.9 Ω VIH = 2 V, MAX UNIT –1.5 V 3.11 4.1 V 3.05 4.2 VODH Differential high-level output voltage RL = 46.3 Ω or 56.9 Ω 0.15 Low-level output voltage VCC = 5.25 V, VIL = 0.8 V, VIH = 4.5 V IOL = –0.24 mA VOL RL = 56.9 Ω 0.15 IIH High-level input current VCC = 5.25 V, VIH = 2.7 V IIL Low-level input current VCC = 5.25 V, VIH = 0.4 V IOH High-level output current VCC = 4.75 V, VOH = 5 V VIL = 0 100 VIH = 4.5 V 100 IOS Short-circuit output current (1) VCC = 5.25 V VIH = 4.5 V –30 DI DE DI DE ICCH VCC = 5.25 V, No load Supply current (total package) ICCL (1) 0.5 20 60 –400 –1200 VI(D) = 4.5 V, VI(R) = 0 47 VI(D) = 0, VI(R) = 4.5 V 80 V V μA μA μA mA mA Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second. Switching Characteristics VCC = 5 V + 5%, TA = 25°C PARAMETER TEST CONDITIONS tPLH Propagation delay time, low- to high-level output tPHL Propagation delay time, high- to low-level output Δtpd Differential propagation delay time tr Output rise time tf Output fall time SR (1) RL = 47.5 Ω, See Figure 1 VCC = 5 V, RL = 47.5 Ω, See Figure 1 VO = 0.15 V to 3.05 V, CL = 10.2 pF, VO = 1 V to 3 V average, RL = 47.5 Ω, See Figure 1 CL = 10.2 pF, MIN TYP MAX UNIT 6.5 12 18.5 ns 6.5 12 18.5 ns 10 ns 5 10 ns 5 13 ns (1) Slew rate 0.65 V/ns Δtpd = |tPLH – tPHL| Submit Documentation Feedback Copyright © 1990–2007, Texas Instruments Incorporated Product Folder Link(s): SN751730 5 SN751730 TRIPLE LINE DRIVER/RECEIVER www.ti.com SLLS062E – MAY 1990 – REVISED AUGUST 2007 RECEIVER SECTION Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MAX VOH High-level output voltage VOL Low-level output voltage VCC = 4.75 V, VIH = 1.55 V IOL = 8 mA 0.5 IOL = 4 mA 0.4 rI Input resistance VCC = 0, VI = 0.15 V to 3.9 V IIH High-level input current VCC = 4.75 V, VIH = 3.11 V IIL Low-level input current VCC = 5.25 V, VIL = 0.15 V IOS (1) Short-circuit output current VCC = 5.25 V, VIL = 0 ICCH ICCL (1) Supply current (total package) VCC = 5.25 V, No load VI = 1.15 V, MIN VCC = 4.75 V, IOH = –400 μA 2.7 UNIT V 7.4 V 20 kΩ 0.42 mA –0.24 0.04 mA –20 –100 mA VI(D) = 4.5 V, VI(R) = 0 47 VI(D) = 0, VI(R) = 4.5 V 80 mA Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second. Switching Characteristics VCC = 5 V + 5%, TA = 25°C PARAMETER tPLH Propagation delay time, low- to high-level output tPHL Propagation delay time, high- to low-level output TEST CONDITIONS RL = 2 kΩ, CL = 15 pF, See Figure 2 Δtpd (1) Differential propagation delay time (1) 6 MIN TYP MAX UNIT 7.5 12 19.5 ns 7.5 12 19.5 ns 10 ns Δtpd = |tPLH – tPHL| Submit Documentation Feedback Copyright © 1990–2007, Texas Instruments Incorporated Product Folder Link(s): SN751730 SN751730 TRIPLE LINE DRIVER/RECEIVER www.ti.com SLLS062E – MAY 1990 – REVISED AUGUST 2007 PARAMETER MEASUREMENT INFORMATION 3V VCC = 5 V Input tw Input Pulse Generator (see Note A) 1.3 V 1.3 V Output 50 Ω RL = 47.5 Ω CL (see Note B) 0 V tPLH tPHL 3.05 V Output 1.4 V 1.4 V 0.15 V VOL tf tr TEST CIRCUIT VOH VOLTAGE WAVEFORMS NOTES: A. The pulse generator has the following characteristics: ZO ≈ 50 Ω, tw ≤ 500 ns, PRR ≤ 1 MHz, tf ≤ 6 ns, tr ≤ 15 ns. B. CL includes probe and jig capacitance. Figure 1. Driver Test Circuit and Voltage Waveforms VCC = 5 V RL = 2 kΩ Input Output Pulse Generator (see Note A) 3V Input 1.4 V 1.4 V tw 1N3064X2 tPHL CL = 15 pF (see Note B) 0V tPLH VOH Output 1.3 V 1.3 V VOL TEST CIRCUIT NOTES: A. B. VOLTAGE WAVEFORMS The pulse generator has the following characteristics: ZO ≈ 50 Ω, tw ≤ 500 ns, PRR ≤ 1 MHz, tf ≤ 10 ns, tr ≤ 10 ns. CL includes probe and jig capacitance. Figure 2. Receiver Test Circuit and Voltage Waveforms Submit Documentation Feedback Copyright © 1990–2007, Texas Instruments Incorporated Product Folder Link(s): SN751730 7 PACKAGE OPTION ADDENDUM www.ti.com 13-Aug-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN751730D ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 SN751730 SN751730DE4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 SN751730 SN751730DWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM SN751730N ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type SN751730 0 to 70 SN751730N (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
SN751730DRG4 价格&库存

很抱歉,暂时无法提供与“SN751730DRG4”相匹配的价格&库存,您可以联系我们找货

免费人工找货