SN65176B, SN75176B
SLLS101H – JULY 1985 – REVISED DECEMBER 2021
SNx5176B Differential Bus Transceivers
1 Features
3 Description
•
•
The SN65176B and SN75176B differential bus
transceivers are designed for bidirectional data
communication on multipoint bus transmission lines.
They are designed for balanced transmission lines
and meet ANSI Standards TIA/EIA-422-B and TIA/
EIA-485-A and ITU Recommendations V.11 and X.27.
•
•
•
•
•
•
•
•
•
•
•
Bidirectional transceivers
Meet or exceed the requirements of ANSI
standards TIA/EIA-422-B and TIA/EIA-485-A
and ITU Recommendations V.11 and X.27
Designed for multipoint transmission on
long bus lines in noisy environments
3-State driver and receiver outputs
Individual driver and receiver enables
Wide positive and negative input/output bus
voltage ranges
± 60-mA Maximum driver output capability
Thermal shutdown protection
Driver positive and negative current limiting
12-kΩ Minimum Receiver Input Impedance
± 200-mV Receiver input sensitivity
50-mV Typical receiver input hysteresis
Operate from single 5-V supply
2 Applications
•
•
•
•
•
•
•
•
Chemical and gas sensors
Digital signage
HMI (human machine interfaces)
Motor controls: AC induction, brushed and brushless dc, low- and high-voltage, stepper motors,
and permanent magnets
TETRA Base stations
Telecom towers: remote electrical tilt units (ret) and
tower mounted amplifiers (TMA)
Weigh scales
Wireless repeaters
The SN65176B and SN75176B devices combine a
3-state differential line driver and a differential input
line receiver, both of which operate from a single 5V power supply. The driver and receiver have activehigh and active-low enables, respectively, that can
be connected together externally to function as a
direction control. The driver differential outputs and
the receiver differential inputs are connected internally
to form differential input/output (I/O) bus ports that
are designed to offer minimum loading to the bus
when the driver is disabled or VCC = 0. These ports
feature wide positive and negative common-mode
voltage ranges, making the device suitable for partyline applications.
The driver is designed for up to 60 mA of sink
or source current. The driver features positive
and negative current limiting and thermal shutdown
for protection from line-fault conditions. Thermal
shutdown is designed to occur at a junction
temperature of approximately 150°C. The receiver
features a minimum input impedance of 12 kΩ, an
input sensitivity of ±200 mV, and a typical input
hysteresis of 50 mV.
Device Information
PART NUMBER
SNx5176
(1)
PACKAGE (PIN)(1)
BODY SIZE (NOM)
SOIC (8)
4.90 mm × 3.91 mm
PDIP (8)
9.81 mm × 6.35 mm
SOP (8)
6.20 mm × 5.30 mm
For all available packages, see the orderable addendum at
the end of the datasheet.
3
DE
4
D
2
RE
6
A
1
R
7
Bus
B
Simplified Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN65176B, SN75176B
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SLLS101H – JULY 1985 – REVISED DECEMBER 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 Recommended Operating Conditions.........................4
6.3 Thermal Information....................................................4
6.4 Electrical Characteristics – Driver............................... 5
6.5 Electrical Characteristics – Receiver.......................... 6
6.6 Switching Characteristics – Driver.............................. 6
6.7 Switching Characteristics – Receiver..........................6
6.8 Typical Characteristics................................................ 7
Parameter Measurement Information............................... 9
7 Detailed Description......................................................12
7.1 Overview................................................................... 12
7.2 Functional Block Diagram......................................... 12
7.3 Feature Description...................................................12
7.4 Device Functional Modes..........................................13
8 Application and Implementation.................................. 14
8.1 Application Information............................................. 14
8.2 Typical Application.................................................... 14
8.3 System Examples..................................................... 15
9 Power Supply Recommendations................................16
10 Layout...........................................................................16
10.1 Layout Guidelines................................................... 16
10.2 Layout Example...................................................... 16
11 Device and Documentation Support..........................17
11.1 Related Links.......................................................... 17
11.2 Trademarks............................................................. 17
11.3 Electrostatic Discharge Caution.............................. 17
11.4 Glossary.................................................................. 17
12 Mechanical, Packaging, and Orderable
Information.................................................................... 17
4 Revision History
Changes from Revision G (July 2021) to Revision H (December 2021)
Page
• Changed ψJT From 78.8 to 8.8 for the D package in the Thermal Information table.......................................... 4
Changes from Revision F (January 2015) to Revision G (July 2021)
Page
• Changed the Thermal Information table............................................................................................................. 4
• Changed the VO Output voltage MAX value from: 6 V to: VCC in the Electrical Characteristics – Driver .......... 5
• Changed the VODI Differential output voltage MAX value from: 6 V to: VCC in the Electrical Characteristics –
Driver ................................................................................................................................................................. 5
Changes from Revision E (January 2014) to Revision F (January 2015)
Page
• Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information
table, Feature Description section, Device Functional Modes, Application and Implementation section, Power
Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section.............................................................................. 1
• Moved Typical Characteristics inside of the Specifications section.................................................................... 7
Changes from Revision D (April 2003) to Revision E (January 2014)
Page
• Updated document to new TI data sheet format - no specification changes...................................................... 1
• Deleted Ordering Information table.....................................................................................................................1
2
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SLLS101H – JULY 1985 – REVISED DECEMBER 2021
5 Pin Configuration and Functions
R
RE
DE
D
1
8
2
7
3
6
4
5
VCC
B
A
GND
Figure 5-1. Top View
Table 5-1. Pin Functions
PIN
NAME
NO.
TYPE
DESCRIPTION
R
1
O
Logic Data Output from RS-485 Receiver
RE
2
I
Receive Enable (active low)
DE
3
I
Driver Enable (active high)
D
4
I
Logic Data Input to RS-485 Driver
GND
5
—
Device Ground Pin
A
6
I/O
RS-422 or RS-485 Data Line
B
7
I/O
RS-422 or RS-485 Data Line
VCC
8
—
Power Input. Connect to 5-V Power Source.
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SLLS101H – JULY 1985 – REVISED DECEMBER 2021
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
Supply voltage(2)
VCC
Voltage range at any bus terminal
VI
Enable input voltage
TJ
Operating virtual junction temperature
Tstg
Storage temperature range
–10
–65
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
(1)
(2)
UNIT
7
V
15
V
5.5
V
150
°C
150
°C
260
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Section 6.2 is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential input/output bus voltage, are with respect to network ground terminal.
6.2 Recommended Operating Conditions
MIN
TYP
MAX
UNIT
4.75
5
5.25
V
12
V
VCC
Supply voltage
VI or VIC
Voltage at any bus terminal (separately or common mode)
VIH
High-level input voltage
D, DE, and RE
VIL
Low-level input voltage
D, DE, and RE
0.8
±12
V
Driver
–60
mA
–400
µA
VID
Differential input
IOH
2
V
voltage(1)
High-level output current
Receiver
Driver
IOL
Low-level output current
TA
Operating free-air temperature
(1)
-7
60
Receiver
8
SN65176B
–40
105
SN75176B
0
70
V
mA
°C
Differential input/output bus voltage is measured at the non-inverting terminal A, with respect to the inverting terminal B.
6.3 Thermal Information
SNx5176
THERMAL
METRIC(1)
D (SOIC)
PS (SO)
P (PDIP)
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
114.4
113.2
88.1
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
55.1
57.9
65.9
°C/W
RθJB
Junction-to-board thermal resistance
61.6
69.0
69.0
°C/W
ψJT
Junction-to-top characterization parameter
8.8
14.6
35.2
°C/W
ψJB
Junction-to-board characterization parameter
60.8
68.1
64.3
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953).
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6.4 Electrical Characteristics – Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST CONDITIONS(1)
PARAMETER
VIK
Input clamp voltage
II = –18 mA
VO
Output voltage
IO = 0
|VOD1|
Differential output voltage
IO = 0
|VOD2|
Differential output voltage
VOD3
MIN
TYP(2)
MAX
UNIT
–1.5
V
Vcc
V
3.6
Vcc
V
2.5
5
0
1.5
RL = 100 Ω, see Figure 7-1
½ VOD1 or 2 (4)
V
RL = 54 Ω, see Figure 7-1
1.5
Differential output voltage
See (5)
1.5
∆|VOD|
Change in magnitude of
differential output voltage(3)
RL = 54 Ω or 100 Ω, see Figure 7-1
VOC
Common-mode output voltage RL = 54 Ω or 100 Ω, see Figure 7-1
∆|VOC|
Change in magnitude
of common-mode output
voltage(3)
IO
Output current
Output disabled(6)
IIH
High-level input current
VI = 2.4 V
20
µA
IIL
Low-level input current
VI = 0.4 V
–400
µA
VO = –7 V
–250
VO = 0
–150
IOS
Short-circuit output current
5
V
±0.2
V
+3
V
RL = 54 Ω or 100 Ω, see Figure 7-1
±0.2
V
VO = 12 V
1
VO = –7 V
–0.8
-1
VO = VCC
250
VO = 12 V
ICC
(1)
(2)
(3)
(4)
(5)
(6)
Supply current (total package) No load
mA
mA
250
Outputs enabled
42
70
Outputs disabled
26
35
mA
The power-off measurement in ANSI Standard TIA/EIA-422-B applies to disabled outputs only and is not applied to combined inputs
and outputs.
All typical values are at VCC = 5 V and TA = 25°C.
Δ|VOD| and Δ|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level
to a low level.
The minimum VOD2 with a 100-Ω load is either ½ VOD1 or 2 V, whichever is greater.
See ANSI Standard TIA/EIA-485-A, Figure 3.5, Test Termination Measurement 2.
This applies for both power on and off; refer to ANSI Standard TIA/EIA-485-A for exact conditions. The TIA/EIA-422-B limit does not
apply for a combined driver and receiver terminal.
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6.5 Electrical Characteristics – Receiver
over recommended ranges of common-mode input voltage, supply voltage, and operating free-air temperature (unless
otherwise noted)
PARAMETER
VIT+
Positive-going input threshold voltage
TEST CONDITIONS
MIN
TYP(1)
MAX UNIT
VO = 2.7 V, IO = –0.4 mA
0.2
–0.2(2)
V
VIT–
Negative-going input threshold voltage VO = 0.5 V, IO = 8 mA
Vhys
Input hysteresis voltage (VIT+ – VIT–)
VIK
Enable Input clamp voltage
II = –18 mA
VOH
High-level output voltage
VID = 200 mV, IOH = –400 µA, see Figure 7-2
VOL
Low-level output voltage
VID = –200 mV, IOL = 8 mA, see Figure 7-2
0.45
V
IOZ
High-impedance-state output current
VO = 0.4 V to 2.4 V
±20
µA
II
Line input current
Other input = 0 V(3)
IIH
High-level enable input current
VIH = 2.7 V
20
µA
IIL
Low-level enable input current
VIL = 0.4 V
–100
µA
rI
Input resistance
VI = 12 V
IOS
Short-circuit output current
–85
mA
ICC
Supply current (total package)
(1)
(2)
(3)
V
50
mV
–1.5
2.7
V
VI = 12 V
1
VI = –7 V
–0.8
12
mA
kΩ
–15
No load
V
Outputs enabled
42
55
Outputs disabled
26
35
mA
All typical values are at VCC = 5 V, TA = 25°C.
The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for
common-mode input voltage and threshold voltage levels only.
This applies for both power on and power off. Refer to EIA Standard TIA/EIA-485-A for exact conditions.
6.6 Switching Characteristics – Driver
VCC = 5 V, RL = 110 Ω, TA = 25°C (unless otherwise noted)
TYP
MAX
td(OD)
Differential-output delay time
PARAMETER
RL = 54 Ω, see Figure 7-3
TEST CONDITIONS
MIN
15
22
UNIT
ns
tt(OD)
Differential-output transition time
RL = 54 Ω, see Figure 7-3
20
30
ns
tPZH
Output enable time to high level
See Figure 7-4
85
120
ns
tPZL
Output enable time to low level
See Figure 7-5
40
60
ns
tPHZ
Output disable time from high level
See Figure 7-4
150
250
ns
tPLZ
Output disable time from low level
See Figure 7-5
20
30
ns
TYP
MAX
21
35
23
35
10
20
12
20
20
35
17
25
6.7 Switching Characteristics – Receiver
VCC = 5 V, CL = 15 pF, TA = 25°C
PARAMETER
6
TEST CONDITIONS
tPLH
Propagation delay time, low- to high-level output
tPHL
Propagation delay time, high- to low-level output
tPZH
Output enable time to high level
tPZL
Output enable time to low level
tPHZ
Output disable time from high level
tPLZ
Output disable time from low level
VID = 0 to 3 V, see Figure 7-6
See Figure 7-7
See Figure 7-7
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MIN
UNIT
ns
ns
ns
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6.8 Typical Characteristics
5
VCC = 5 V
TA = 25°C
4.5
4
3.5
3
2.5
2
1.5
1
0
–20
–40
–60
–80
–100
IOH – High-Level Output Current – mA
2.5
2
1.5
1
0
20
40
60
80
100
IOL – Low-Level Output Current – mA
120
5
VCC = 5 V
TA = 25°C
3.5
3
2.5
2
1.5
1
0.5
0
10
20
30 40 50 60 70 80
IO – Output Current – mA
3
2.5
VCC = 5.25 V
2
VCC = 5 V
1.5
VCC = 4.75 V
1
0.5
0
–5
–10 –15 –20 –25 –30 –35 –40 –45 –50
IOH – High-Level Output Current – mA
Figure 6-4. Receiver High-Level Output Voltage vs High-Level
Output Current
5
0.6
VCC = 5 V
VID = 200 mV
IOH = –440 µA
VOL – Low-Level Output Voltage – V
VOL
4
4
3.5
0
90 100
Figure 6-3. Driver Differential Output Voltage vs Output Current
4.5
VID = 0.2 V
TA = 25°C
4.5
VOH – High-Level Output Voltage – V
VOH
VOD – Differential Output Voltage – V
VOD
3
Figure 6-2. Driver Low-Level Output Voltage vs Low-Level
Output Current
4
VOH – High-Level Output Voltage – V
VOH
3.5
0
–120
Figure 6-1. Driver High-Level Output Voltage vs High-Level
Output Current
0
4
0.5
0.5
0
VCC = 5 V
TA = 25°C
4.5
VOL – Low-Level Output Voltage – V
VOH – High-Level Output Voltage – V
VOH
5
3.5
3
2.5
2
1.5
1
VCC = 5 V
TA = 25°C
0.5
0.4
0.3
0.2
0.1
0.5
0
–40
–20
0
20
40
60
80
100
120
0
0
Only the 0°C to 70°C portion of the curve applies to the
SN75176B device.
Figure 6-5. Receiver High-Level Output Voltage vs Free-Air
Temperature
5
10
15
20
25
30
IOL – Low-Level Output Current – mA
TA – Free-Air Temperature – °C
Only the 0°C to 70°C portion of the curve applies to the
SN75176B device.
Figure 6-6. Receiver Low-Level Output Voltage vs Low-Level
Output Current
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6.8 Typical Characteristics (continued)
5
0.5
VCC = 5 V
VID = –200 mV
IOL = 8 mA
0.4
0.3
0.2
VCC = 5.25 V
VCC = 5 V
3
VCC = 4.75 V
2
1
0.1
0
–40
VID = 0.2 V
Load = 8 kΩ to GND
TA = 25°C
4
VO – Output Voltage – V
VO
VOL – Low-Level Output Voltage – V
VOL
0.6
0
–20
0
20
40
60
80
100
0
120
0.5
1.5
2
2.5
3
Figure 6-8. Receiver Output Voltage vs Enable Voltage
Figure 6-7. Receiver Low-Level Output Voltage vs Free-Air
Temperature
6
VID = –0.2 V
Load = 1 kΩ to VCC
TA = 25°C
VCC = 5.25 V
5
VO – Output Voltage – V
VO
1
VI – Enable Voltage – V
TA – Free-Air Temperature – °C
VCC = 4.75 V
VCC = 5 V
4
3
2
1
0
0
0.5
1
1.5
2
2.5
3
VI – Enable Voltage – V
Figure 6-9. Receiver Output Voltage vs Enable Voltage
8
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Parameter Measurement Information
RL
2
VOD2
RL
2
VOC
Figure 7-1. Driver VOD and VOC
ID
VOH
VOL
+IOL
–IOH
Figure 7-2. Receiver VOH and VOL
3V
Input
RL = 54 Ω
Generator
(see Note B)
td(OD)
td(OD)
Output
50 Ω
1.5 V
0V
CL = 50 pF
(see Note A)
Output
3V
50%
10%
90%
tt(OD)
TEST CIRCUIT
A.
B.
1.5 V
≈2.5 V
50%
10%
≈–2.5 V
tt(OD)
VOLTAGE WAVEFORMS
CL includes probe and jig capacitance.
The input pulse is supplied by a generator having the following characteristics: PRR ≤1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50
Ω.
Figure 7-3. Driver Test Circuit and Voltage Waveforms
Output
3V
S1
Input
1.5 V
1.5 V
0 V or 3 V
0V
CL = 50 pF
(see Note A)
Generator
(see Note B)
RL = 110 Ω
Output
50 Ω
TEST CIRCUIT
A.
B.
0.5 V
tPZH
VOH
2.3 V
tPHZ
Voff ≈0 V
VOLTAGE WAVEFORMS
CL includes probe and jig capacitance.
The input pulse is supplied by a generator having the following characteristics: PRR ≤1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50
Ω.
Figure 7-4. Driver Test Circuit and Voltage Waveforms
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5V
3V
S1
RL = 110 Ω
Input
1.5 V
1.5 V
Output
0V
3 V or 0 V
CL = 50 pF
(see Note A)
Generator
(see Note B)
tPLZ
tPZL
5V
0.5 V
50 Ω
2.3 V
Output
VOL
TEST CIRCUIT
A.
B.
VOLTAGE WAVEFORMS
CL includes probe and jig capacitance.
The input pulse is supplied by a generator having the following characteristics: PRR ≤1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50
Ω.
Figure 7-5. Driver Test Circuit and Voltage Waveforms
3V
Input
Generator
(see Note B)
1.5 V
1.5 V
Output
51 Ω
1.5 V
0V
CL = 15 pF
(see Note A)
0V
tPLH
tPHL
VOH
Output
1.3 V
1.3 V
VOL
TEST CIRCUIT
A.
B.
VOLTAGE WAVEFORMS
CL includes probe and jig capacitance.
The input pulse is supplied by a generator having the following characteristics: PRR ≤1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50
Ω.
Figure 7-6. Receiver Test Circuit and Voltage Waveforms
10
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S1
1.5 V
S2
2 kΩ
–1.5 V
5V
CL = 15 pF
(see Note A)
Generator
(see Note B)
5 kΩ
1N916 or Equivalent
50 Ω
S3
TEST CIRCUIT
3V
Input
3V
Input
1.5 V
0V
tPZH
S1 to 1.5 V
S2 Open
S3 Closed
1.5 V
S1 to –1.5 V
0 V S2 Closed
S3 Open
tPZL
VOH
≈4.5 V
1.5 V
Output
Output
0V
1.5 V
VOL
3V
1.5 V
Input
3V
S1 to 1.5 V
S2 Closed
S3 Closed
Input
S1 to –1.5 V
S2 Closed
S3 Closed
1.5 V
0V
tPHZ
0V
tPLZ
VOH
0.5 V
Output
≈1.3 V
Output
0.5 V
≈1.3 V
VOL
VOLTAGE WAVEFORMS
A.
B.
CL includes probe and jig capacitance.
The input pulse is supplied by a generator having the following characteristics: PRR ≤1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50
Ω.
Figure 7-7. Receiver Test Circuit and Voltage Waveforms
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7 Detailed Description
7.1 Overview
The SN65176B and SN75176B differential bus transceivers are integrated circuits designed for bidirectional data
communication on multipoint bus transmission lines. They are designed for balanced transmission lines and
meet ANSI Standards TIA/EIA-422-B and TIA/EIA-485-A and ITU Recommendations V.11 and X.27.
The SN65176B and SN75176B devices combine a 3-state differential line driver and a differential input line
receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and
active-low enables, respectively, that can be connected together externally to function as a direction control.
The driver differential outputs and the receiver differential inputs are connected internally to form differential
input/output (I/O) bus ports that are designed to offer minimum loading to the bus when the driver is disabled
or VCC = 0. These ports feature wide positive and negative common-mode voltage ranges, making the device
suitable for party-line applications.
The driver is designed for up to 60 mA of sink or source current. The driver features positive and negative
current limiting and thermal shutdown for protection from line-fault conditions. Thermal shutdown is designed to
occur at a junction temperature of approximately 150°C. The receiver features a minimum input impedance of 12
kΩ, an input sensitivity of ±200 mV, and a typical input hysteresis of 50 mV.
The SN65176B and SN75176B devices can be used in transmission-line applications employing the SN75172
and SN75174 quadruple differential line drivers and SN75173 and SN75175 quadruple differential line receivers.
7.2 Functional Block Diagram
3
DE
4
D
2
RE
6
A
1
7
R
Bus
B
7.3 Feature Description
7.3.1 Driver
The driver converts a TTL logic signal level to RS-422 and RS-485 compliant differential output. The TTL logic
input, DE pin, can be used to turn the driver on and off.
Table 7-1. Driver Function Table(1)
(1)
12
INPUT
D
ENABLE
DE
DIFFERENTIAL OUTPUTS
H
H
H
L
L
H
L
H
X
L
Z
Z
A
B
H = high level,
L = low level,
X = irrelevant,
Z = high impedance (off)
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7.3.2 Receiver
The receiver converts a RS-422 or RS-485 differential input voltage to a TTL logic level output. The TTL logic
input, RE pin, can be used to turn the receiver logic output on and off.
Table 7-2. Receiver Function Table(1)
(1)
DIFFERENTIAL INPUTS
A–B
ENABLE
RE
OUTPUT
R
VID ≥ 0.2 V
L
H
–0.2 V < VID < 0.2 V
L
U
VID ≤ –0.2 V
L
L
X
H
Z
Open
L
U
H = high level,
L = low level,
U = unknown,
Z = high impedance (off)
7.4 Device Functional Modes
7.4.1 Device Powered
Both the driver and receiver can be individually enabled or disabled in any combination. DE and RE can be
connected together for a single port direction control bit.
7.4.2 Device Unpowered
The driver differential outputs and the receiver differential inputs are connected internally to form differential
input/output (I/O) bus ports that are designed to offer minimum loading to the bus when the driver is disabled or
VCC = 0.
7.4.3 Symbol Cross Reference
Table 7-3. Symbol Equivalents
DATA SHEET
PARAMETER
TIA/EIA-422-B
TIA/EIA-485-A
VO
Voa, Vob
Voa, Vob
|VOD1|
Vo
Vo
|VOD2|
Vt ®L = 100 Ω)
Vt ®L = 54 Ω)
Vt (test termination
measurement 2)
|VOD3|
∆|VOD|
| |Vt| – | V t| |
| |Vt – | V t| |
VOC
|Vos|
|Vos|
∆|VOC|
|Vos – V os|
|Vos – V os|
IOS
|Isa|, |Isb|
IO
|Ixa|, |Ixb|
Iia, Iib
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8 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
The device can be used in RS-485 and RS-422 physical layer communications.
8.2 Typical Application
SN65176B
SN75176B
SN65176B
SN75176B
RT
RT
Up to 32
Transceivers
The line should be terminated at both ends in its characteristic impedance ®T = ZO). Stub lengths off the main line should be kept as
short as possible.
Figure 8-1. Typical RS-485 Application Circuit
8.2.1 Design Requirements
•
•
•
•
5-V power source
RS-485 bus operating at 10 Mbps or less
Connector that ensures the correct polarity for port pins
External fail safe implementation
8.2.2 Detailed Design Procedure
•
•
14
Place the device close to bus connector to keep traces (stub) short to prevent adding reflections to the bus
line
If desired, add external fail-safe biasing to ensure +200 mV on the A-B port.
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SLLS101H – JULY 1985 – REVISED DECEMBER 2021
8.2.3 Application Curves
Figure 8-2. Eye Diagram for 10-Mbits/s over 100 feet of standard CAT-5E cable 120-Ω Termination at
both ends. Scale is 1 V per division and 25 nS per division
8.3 System Examples
EQUIVALENT OF EACH INPUT
TYPICAL OF A AND B I/O PORTS
TYPICAL OF RECEIVER OUTPUT
VCC
VCC
VCC
85 Ω
NOM
R(eq)
16.8 kΩ
NOM
Input
960 Ω
NOM
960 Ω
NOM
Output
GND
Driver input: R(eq) = 3 kΩ NOM
Enable inputs: R(eq )= 8 kΩ NOM
R(eq) = Equivalent Resistor
Input/Output
Port
Figure 8-3. Schematics of Inputs and Outputs
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9 Power Supply Recommendations
Power supply should be 5 V with a tolerance less than 10%
10 Layout
10.1 Layout Guidelines
Traces from device pins A and B to connector must be short and capable of 250 mA maximum current.
10.2 Layout Example
GND
TTL Logic
1 R
TTL Logic
2 RE
B 7
TTL Logic
3 DE
A 6
TTL Logic
4 D
VCC 8
1.5 μF
5V
B
Connector
GND 5
A
GND
Figure 10-1. Layout Diagram
16
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SLLS101H – JULY 1985 – REVISED DECEMBER 2021
11 Device and Documentation Support
11.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 11-1. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
SN65176B
Click here
Click here
Click here
Click here
Click here
SN75176B
Click here
Click here
Click here
Click here
Click here
11.2 Trademarks
All trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.4 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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17
PACKAGE OPTION ADDENDUM
www.ti.com
18-Aug-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN65176BDR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 105
65176B
Samples
SN65176BDRE4
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 105
65176B
Samples
SN65176BDRG4
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 105
65176B
Samples
SN65176BP
ACTIVE
PDIP
P
8
50
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 105
SN65176BP
Samples
SN75176BDG4
NRND
SOIC
D
8
75
TBD
Call TI
Call TI
0 to 70
SN75176BDR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
75176B
Samples
SN75176BDRE4
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
75176B
Samples
SN75176BDRG4
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
75176B
Samples
SN75176BP
ACTIVE
PDIP
P
8
50
RoHS & Green
NIPDAU
N / A for Pkg Type
0 to 70
SN75176BP
Samples
SN75176BPE4
ACTIVE
PDIP
P
8
50
RoHS & Green
NIPDAU
N / A for Pkg Type
0 to 70
SN75176BP
Samples
SN75176BPSR
ACTIVE
SO
PS
8
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
A176B
Samples
SN75176BPSRG4
ACTIVE
SO
PS
8
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
A176B
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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