SN752232
DUAL RS-232 PORT
SLLS507 – JUNE 2001
D
D
D
D
DGG OR DL PACKAGE
(TOP VIEW)
Single Chip With Easy Interface Between
UART and Two Serial-Port Connectors of
IBM PC/AT and Compatibles
Meets or Exceeds the Requirements of
TIA/EIA-232-F and ITU Recommendation
V.28
Supports Data Rates up to 120 kbit/s
Package Options Include Plastic Thin
Shrink Small-Outline (DGG) and Shrink
Small-Outline (DL) Packages
VDD
RIN1A
RIN2A
RIN3A
DOUT1A
DOUT2A
RIN4A
DOUT3A
RIN5A
VSS
NC
NC
VDD
RIN1B
RIN2B
RIN3B
DOUT1B
DOUT2B
RIN4B
DOUT3B
RIN5B
VSS
NC
NC
description
The SN752232 consists of dual ports, each
containing three drivers and five receivers, which
reduce board space and allow easy
interconnection of the UART and two serial-port
connectors of an IBM PC/AT and compatibles.
The bipolar circuits and processing of this ‘‘dual
GD75232” provide, a rugged, low-cost solution for
this function.
The SN752232 complies with the requirements of
the TIA/EIA-232-F and ITU V.28 standards. These
standards are for data interchange between a
host computer and a peripheral at signaling rates
up to 20 kbit/s. The device supports data rates up
to 120 kbit/s with lower capacitive loads (shorter
cables). Interoperability at the higher signaling
rates cannot be expected unless the designer has
design control of the cable and the interface
circuits at both ends. For interoperability at
signaling rates up to 120 kbit/s, use of
TIA/EIA-423-B (ITU V.10) and TIA/EIA-422-B
(ITU V.11) standards is recommended.
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
VCC
ROUT1A
ROUT2A
ROUT3A
DIN1A
DIN2A
ROUT4A
DIN3A
ROUT5A
GND
NC
NC
VCC
ROUT1B
ROUT2B
ROUT3B
DIN1B
DIN2B
ROUT4B
DIN3B
ROUT5B
GND
NC
NC
The SN752232 is characterized for operation over
the temperature range of 0°C to 70°C.
AVAILABLE OPTIONS
PACKAGED DEVICES
TA
PLASTIC SHRINK
SMALL OUTLINE
(DL)
PLASTIC
THIN SHRINK
SMALL OUTLINE
(DGG)
0°C to 70°C
SN752232DL
SN752232DGG
The DL package also is available taped and reeled. Add the
suffix R to the device type (e.g., SN752232DLR). The DGG
package is only available taped and reeled.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
IBM and PC/AT are trademarks of International Business Machines Corporation.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN752232
DUAL RS-232 PORT
SLLS507 – JUNE 2001
logic diagram (positive logic)
RIN1
RIN2
RIN3
DOUT1
DOUT2
RIN4
DOUT3
RIN5
2 (14)
47 (35)
3 (15)
46 (34)
4 (16)
45 (33)
5 (17)
44 (32)
6 (18)
43 (31)
7 (19)
42 (30)
8 (20)
41 (29)
9 (21)
40 (28)
ROUT1
ROUT2
ROUT3
DIN1
DIN2
ROUT4
DIN3
ROUT5
NOTE A: Numbers in parentheses are for B section.
schematic (each driver)
To Other Drivers
VDD
11.6 kΩ
9.4 kΩ
Input DINx
75.8 Ω
320 Ω
4.2 kΩ
GND
To Other
Drivers
10.4 kΩ
3.3 kΩ
68.5 Ω
VSS
To Other Drivers
NOTE A: Resistor values shown are nominal.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
DOUTx Output
SN752232
DUAL RS-232 PORT
SLLS507 – JUNE 2001
schematic (each receiver)
To Other Receivers
VCC
9 kΩ
5 kΩ
1.66 kΩ
ROUTx Output
2 kΩ
3.8 kΩ
Input RINx
10 kΩ
GND
To Other Receivers
NOTE A: Resistor values shown are nominal.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage (see Note 1): VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V
VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –15 V
Input voltage range, VI: Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –15 V to 7 V
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 V to 30 V
Driver output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –15 V to 15 V
Receiver low-level output current, IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Package thermal impedance, θJA (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages are with respect to network GND.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
POST OFFICE BOX 655303
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3
SN752232
DUAL RS-232 PORT
SLLS507 – JUNE 2001
recommended operating conditions
MIN
NOM
MAX
VDD
VSS
Supply voltage
7.5
9
15
V
Supply voltage
–7.5
–9
–15
V
VCC
VIH
Supply voltage
4.5
5
5.5
V
High-level input voltage (driver only)
1.9
VIL
Low-level input voltage (driver only)
V
0.8
Driver
IOH
High level output current
High-level
IOL
Low level output current
Low-level
TA
Operating free-air temperature
UNIT
–6
Receiver
–0.5
Driver
6
Receiver
16
0
70
V
mA
mA
°C
supply currents over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS
All inputs at 1.9 V,
IDD
No load
Supply current from VDD
All inputs at 0.8 V,
No load
All inputs at 1.9 V,
ISS
No load
ICC
Supply current from VCC
VCC = 5 V,
MAX
VSS = –9 V
VSS = –12 V
30
VDD = 15 V,
VDD = 9 V,
VSS = –15 V
VSS = –9 V
50
VDD = 12 V,
VDD = 15 V,
VDD = 9 V,
VSS = –12 V
VSS = –15 V
VDD = 12 V,
VDD = 15 V,
Supply current from VSS
All inputs at 0.8 V,
MIN
VDD = 9 V,
VDD = 12 V,
No load
VDD = 9 V,
VDD = 12 V,
All inputs at 5 V,
VDD = 15 V,
No load
UNIT
38
9
mA
11
18
VSS = –9 V
VSS = –12 V
–30
VSS = –15 V
VSS = –9 V
–50
–38
–6.4
VSS = –12 V
VSS = –15 V
mA
–6.4
–6.4
60
mA
DRIVER SECTION
electrical characteristics over recommended operating free-air temperature range, VDD = 9 V,
VSS = –9 V, VCC = 5 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
6
7.5
MAX
UNIT
VOH
High-level output voltage
VIL = 0.8 V,
RL = 3 kΩ,
See Figure 1
VOL
Low-level output voltage
(see Note 3)
VIH = 1.9 V,
RL = 3 kΩ,
See Figure 1
VI = 5 V,
VI = 0,
See Figure 2
10
µA
Low-level input current
See Figure 2
–1.6
mA
High-level short-circuit output current
(see Note 4)
VIL = 0.8 V,
VO = 0,
See Figure 1
–4.5
–12
–19.5
mA
VIH = 2 V,
VO = 0,
VCC = VDD = VSS = 0,
See Figure 1
4.5
12
19.5
mA
IIH
IIL
IOS(H)
IOS(L)
rO
High-level input current
Low-level short-circuit output current
–7.5
V
–6
V
VO = –2 V to 2 V
300
Ω
NOTES: 3. The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic
levels only (e.g., if –10 V is maximum, the typical value is a more negative voltage).
4. Output short-circuit conditions must maintain the total power dissipation below absolute maximum ratings.
5. Test conditions are those specified by TIA/EIA-232-F and as listed above.
4
Output resistance (see Note 5)
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN752232
DUAL RS-232 PORT
SLLS507 – JUNE 2001
switching characteristics, VCC = 5 V, VDD = 12 V, VSS = –12 V, TA = 25°C (see Figure 3)
PARAMETER
TEST CONDITIONS
tPLH
Propagation delay time,
low- to high-level output
RL = 3 kΩ to 7 kΩ,
tPHL
Propagation delay time,
high- to low-level output
RL = 3 kΩ to 7 kΩ,
tTLH
level output
Transition time
time, low
low- to high
high-level
RL = 3 kΩ to 7 kΩ
tTHL
Transition time
time, high
high- to low
low-level
level output
TYP
MAX
UNIT
CL = 15 pF
315
500
ns
CL = 15 pF
75
175
ns
CL = 15 pF
60
100
ns
1.7
2.5
µs
40
75
ns
CL = 2500 pF,
MIN
See Note 6
CL = 15 pF
RL = 3 kΩ to 7 kΩ
CL = 2500 pF, See Note 6
1.5
2.5
µs
NOTE 6: Measured between ±3-V and ±3-V points of the output waveform (TIA/EIA-232-F conditions), all unused inputs are tied either high
or low.
RECEIVER SECTION
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
VIT
IT+
Positive going input threshold voltage
Positive-going
VIT–
Vhys
Negative-going input threshold voltage
TEST CONDITIONS
TA = 25°C
TA = 0°C to 70 °C
See Figure 5
MIN
TYPĔ
MAX
1.75
1.9
2.3
1.55
0.75
Input hysteresis voltage (VIT+ – VIT–)
VOH
High level output voltage
High-level
IOH = –0.5
0 5 mA
VOL
Low-level input voltage
IOL = 10 mA,
VI = 25 V,
VI = 3 V
See Figure 5
3.6
VI = 3 V,
VI = –25 V,
See Figure 5
0.43
See Figure 5
–3.6
VI = –3 V,
See Figure 5
–0.43
High level input current
High-level
IIL
Low level output current
Low-level
0.97
1.25
4
5
0.2
0.45
0.5
VIH = 0.75 V
Inputs open
IIH
2.3
2.6
V
V
V
2.6
IOS
Short-circuit output current
See Figure 4
† All typical values are at TA = 25°C, VCC = 5 V, VDD = 9 V, and VSS = –9 V.
UNIT
8.8
–8.8
–3.4
V
V
mA
mA
–12
mA
switching characteristics, VCC = 5 V, VDD = 12 V, VSS = –12 V, TA = 25°C (see Figure 6)
TYP
MAX
UNIT
tPLH
tPHL
Propagation delay time, low- to high-level output
PARAMETER
TEST CONDITIONS
107
250
ns
Propagation delay time, high- to low-level output
42
150
ns
tTLH
tTHL
Transition time, low- to high-level output
175
350
ns
16
60
ns
tPLH
tPHL
Propagation delay time, low- to high-level output
100
160
ns
Propagation delay time, high- to low-level output
60
100
ns
tTLH
tTHL
Transition time, low- to high-level output
90
175
ns
15
50
ns
CL = 50 pF,
pF
RL = 5 kΩ
Transition time, high- to low-level output
CL = 15 pF,
pF
RL = 1.5
1 5 kΩ
Transition time, high- to low-level output
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MIN
5
SN752232
DUAL RS-232 PORT
SLLS507 – JUNE 2001
PARAMETER MEASUREMENT INFORMATION
IOS(L)
VDD or GND
–IOS(H)
VSS or GND
VI
VO
RL = 3 kΩ
(for VOH and VOL tests only)
Figure 1. Driver Test Circuit for VOH, VOL, IOS(H), and IOS(L)
IIH
VI
–IIL
VI
Figure 2. Driver Test Circuit for IIH and IIL
3V
Input
1.5 V
1.5 V
0V
Input
tPHL
Pulse
Generator
(See Note B)
Output
CL
(see Note A)
RL
90%
50%
10%
Output
tPLH
50%
10%
tTHL
TEST CIRCUIT
VOLTAGE WAVEFORMS
Figure 3. Driver Test Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
VOH
VOL
tTLH
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω, tr = tf < 50 ns.
6
90%
SN752232
DUAL RS-232 PORT
SLLS507 – JUNE 2001
PARAMETER MEASUREMENT INFORMATION
VI
Figure 4. Receiver Test Circuit for IOS
–IOH
VIT, VI
VOH
VOL
IOL
Figure 5. Receiver Test Circuit for VIT, VOH, and VOL
4V
Input
50%
50%
0V
Input
tPHL
Pulse
Generator
(See Note B)
Output
CL
(see Note A)
RL
90%
Output
50%
10%
tPLH
50%
10%
tTHL
TEST CIRCUIT
90%
VOH
VOL
tTLH
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω, tr = tf < 50 ns.
Figure 6. Receiver Propagation and Transition Times
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
SN752232
DUAL RS-232 PORT
SLLS507 – JUNE 2001
TYPICAL CHARACTERISTICS
DRIVER SECTION
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
OUTPUT CURRENT
vs
OUTPUT VOLTAGE
VOLTAGE TRANSFER CHARACTERISTICS
12
9
16
VDD = 9 V, VSS = –9 V
12
6
I O – Output Current – mA
IO
VO
VO – Output Voltage – V
20
VDD = 12 V, VSS = –12 V
VDD = 6 V, VSS = –6 V
3
0
–3
–6
ÎÎÎ
ÎÎÎ
–12
0
VDD = 9 V
VSS = –9 V
TA = 25°C
4
0
–4
VOH(VI = 0.8 V)
–16
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
VI – Input Voltage – V
–20
–16
2
–12
–4
0
4
8
VO – Output Voltage – V
16
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
1000
VDD = 9 V
VSS = –9 V
RL = 3KΩ
TA = 25°C
IOS(L) (VI = 1.9 V)
SR – Slew Rate – V/ µs
6
3
ÎÎÎÎÎ
ÎÎÎÎÎ
ÁÁ
ÎÎÎÎÎÎ
ÁÁ
0
VDD = 9 V
VSS = –9 V
VO = 0
–3
12
SLEW RATE
vs
LOAD CAPACITANCE
12
IIOS
OS – Short-Circuit Output Current – mA
–8
Figure 8
SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
9
ÎÎÎÎ
ÎÎÎÎ
3-kΩ
Load Line
–8
Figure 7
100
10
–6
IOS(H) (VI = 0.8 V)
–9
–12
0
10
20
30
40
50
1
60
70
10
TA – Free-Air Temperature – °C
100
Figure 10
POST OFFICE BOX 655303
1000
CL – Load Capacitance – pF
Figure 9
8
VOL(VI = 1.9 V)
–12
RL = 3 kΩ
TA = 25°C
–9
8
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ ÎÎÎÎÎ
ÎÎÎÎÎ
• DALLAS, TEXAS 75265
10000
SN752232
DUAL RS-232 PORT
SLLS507 – JUNE 2001
TYPICAL CHARACTERISTICS
INPUT THRESHOLD VOLTAGE
vs
SUPPLY VOLTAGE
2.4
2
2.2
1.8
VIT +
2
V – Input Threshold Voltage – V
IT
V – Input Threshold Voltage – V
IT
INPUT THRESHOLD VOLTAGE
vs
FREE-AIR TEMPERATURE
1.8
1.6
1.4
1.2
VIT–
1
0.8
0.6
0.4
VIT+
1.6
1.4
1.2
1
VIT–
0.8
0.6
0.4
0.2
0
10
20
30
40
50
60
0
2
70
TA – Free-Air Temperature – °C
3
Figure 11
4
5
6
7
8
VCC – Supply Voltage – V
9
10
Figure 12
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÁÁÁÁ
ÁÁÁÁ
ÎÎÎÎÎ
NOISE REJECTION
6
MAXIMUM SUPPLY VOLTAGE
vs
FREE-AIR TEMPERATURE
VCC = 5 V
TA = 25°C
See Note A
5
16
3
ÁÁÁÁ
ÁÁÁÁ
ÎÎÎÎ
ÁÁÁ
ÎÎÎÎ
ÁÁÁ
CC = 500 pF
CC = 12 pF
2
CC = 100 pF
1
0
10
40
100
400 1000
4000 10000
tw – Pulse Duration – ns
NOTE A: This figure shows the maximum amplitude of a
positive-going pulse that, starting from 0 V, does not
cause a change of the output level.
14
VDD – Maximum Supply Voltage – V
Amplitude – V
CC = 300 pF
4
12
10
8
6
4
2
RL ≥ 3 kΩ (from each output to GND)
0
0
Figure 13
10
20
30
40
50
60
TA – Free-Air Temperature – °C
70
Figure 14
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
SN752232
DUAL RS-232 PORT
SLLS507 – JUNE 2001
APPLICATION INFORMATION
Diodes placed in series with the VDD and VSS leads protect the SN752232 in the fault condition in which the device
outputs are shorted to ±15 V, and the power supplies are at low and provide low-impedance paths to ground (see
Figure 15).
VDD
±15 V
VDD
Output
SN752232
VSS
VSS
Figure 15. Power-Supply Protection to Meet Power-Off Fault Conditions of TIA/EIA-232-F
TL16C450
ACE
–12 V
27, 39
RI 43
40 (28)
DTR 37
41 (29)
CTS 40
42 (30)
SO 13
43 (31)
RTS 36
44 (32)
SI 11
45 (33)
DSR 41
46 (34)
DCD 42
47 (35)
36, 48
GND
VSS
ROUT5
RIN5
DOUT3
DIN3
RIN4
ROUT4
DIN2
SN752232
DIN1
DOUT2
DOUT1
ROUT3
RIN3
ROUT2
RIN2
ROUT1
RIN1
VCC
VDD
10, 22
5
9
9 (21) RI
8 (20) DTR
C3
7 (19) CTS
C2
5 (17) RTS
4 (16) RX
C1
2 (14) DCD
1, 13
1
12 V
Figure 16. Typical Connection Per Port
POST OFFICE BOX 655303
6
3 (15) DSR
5V
NOTE A: Numbers in parentheses are for B section.
10
TIA/EIA-232-F
DB9S
Connector
6 (18) TX
• DALLAS, TEXAS 75265
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its products to the specifications applicable at the time of sale in accordance with
TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary
to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except
those mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
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Copyright 2001, Texas Instruments Incorporated
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