SN7534051NSR

SN7534050, SN7534051 www.ti.com SLLS833A – MAY 2007 – REVISED APRIL 2013 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS Check for Samples: SN7534050, SN7534051 FEATURES 1 • • • Meet or Exceed Standards TIA/EIA-422-B and ITU Recommendation V.11 Operate From Single 5-V Power Supply Driver Positive and Negative Current Limiting SN7534050...N OR NS PACKAGE (TOP VIEW) • • • • Receiver Input Sensitivity: ±200mV Receiver Input Impedance: 12 kΩ Min Driver 3-State Outputs Receiver 3-State Outputs (SN7534050 Only) SN7534051...N OR NS PACKAGE (TOP VIEW) 1B 1 1B 1 1D 1A 2 16 15 VCC 2 16 15 VCC 1A 1D 1R 3 14 1Y 1R 3 14 1Y RE 4 13 1Z 1DE 4 13 1Z 2R 5 12 DE 2R 5 12 2DE 2A 6 11 2Z 2A 6 11 2Z 2B 7 10 2Y 2B 7 10 2Y GND 8 9 2D GND 8 9 2D DESCRIPTION The SN7534050 and SN7534051 dual differential drivers and receivers are monolithic integrated circuits designed to meet the requirements of ANSI standards TIA/EIA-422-B and ITU Recommendations V.11. The driver outputs provide limiting for both positive and negative currents and thermal shutdown protection from line fault conditions on transmission bus line. The SN7534050 combines dual 3-state differential drivers and dual 3-state differential input receivers. The drivers and receivers have active-high and active-low enables, respectively which can be externally connected together to function as direction control. SN7534051 drivers each have an individual active-high enable. ORDERING INFORMATION PACKAGE (1) TA PDIP – N SOP – NS –20°C to 85°C PDIP – N SOP – NS (1) (2) (2) ORDERABLE PART NUMBER TOP-SIDE MARKING Tube of 25 SN7534050N SN7534050N Tube of 50 SN7534050NS SN7534050 Reel of 2000 SN7534050NSR SN7534050 Tube of 25 SN7534051N SN7534051N Tube of 50 SN7534051NS SN7534051 Reel of 2000 SN7534051NSR SN7534051 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007–2013, Texas Instruments Incorporated SN7534050, SN7534051 SLLS833A – MAY 2007 – REVISED APRIL 2013 www.ti.com FUNCTION TABLES Table 1. SN7534050, SN7534051 Each Driver (1) OUTPUTS INPUT D ENABLE DE H H H L L H L H X L Z Z (1) Y Z H = high level, L = low level, X = irrelevant, Z = high impedance (off) Table 2. SN7534050 Each Receiver (1) (1) DIFFERENTIAL INPUTS, A–B ENABLE RE OUTPUT R VID ≥ 0.2 V L H –0.2 V < VID < 0.2 V L ? VID ≤ –0.2 V L L X H Z H = high level, L = low level, ? = indeterminate, X = irrelevant, Z = high impedance (off) Table 3. SN7534051 Each Receiver (1) Submit Documentation Feedback OUTPUT R VID ≥ 0.2 V H –0.2 V < VID < 0.2 V ? VID ≤ –0.2 V L (1) 2 DIFFERENTIAL INPUTS, A–B H = high level, L = low level, ? = indeterminate Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: SN7534050 SN7534051 SN7534050, SN7534051 www.ti.com SLLS833A – MAY 2007 – REVISED APRIL 2013 LOGIC DIAGRAMS SN7534050 SN7534051 12 1DE DE 4 14 1Y 13 1Z 2 1A 1 1B 10 2Y 11 2Z 6 2A 7 2B 15 1D 4 RE 3 15 1D 3 1R 2 1 9 2D 10 11 5 6 7 2R 1R 14 13 1Y 1Z 2DE 2D 1A 1B 12 9 5 2R 2Y 2Z 2A 2B SCHEMATIC OF INPUTS EQUIVALENT OF DRIVER OR ENABLE INPUT VCC EQUIVALENT OF RECEIVER INPUT VCC R(eq) Input 16.8 kΩ NOM 960 Ω NOM Input 960 Ω NOM Driver input: R(eq) = 6 kΩ nom Enable input: R(eq) = 4 kΩ nom R(eq) = equivalent resistor All resistor values are nominal. Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: SN7534050 SN7534051 Submit Documentation Feedback 3 SN7534050, SN7534051 SLLS833A – MAY 2007 – REVISED APRIL 2013 www.ti.com SCHEMATIC OF OUTPUTS TYPICAL OF ALL DRIVER OUTPUTS TYPICAL OF ALL RECEIVER OUTPUTS VCC VCC 85 Ω Nom Output Output GND All resistor values are nominal. Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN (2) VCC Supply voltage VI Input voltage DE, RE, D inputs Vi Receiver input voltage A or B inputs VID Receiver differential output voltage VO Driver output voltage range IOL Receiver low-level output current θJA Package thermal impedance (4) Tstg (3) –10 (2) (3) (4) 4 UNIT 7 V 7 V ±25 V ±25 V 15 V 50 mA N package 66 NS package 68 °C/W Operating free-air temperature range –20 85 °C Storage temperature range –65 150 °C 260 °C Lead temperature, 1.6 mm (1/16 in) from case for 10 s (1) MAX Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages, except differential input voltage, are with respect to the network GND. Differential input voltage is measured at the noninverting terminal, with respect to the inverting terminal. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: SN7534050 SN7534051 SN7534050, SN7534051 www.ti.com SLLS833A – MAY 2007 – REVISED APRIL 2013 Recommended Operating Conditions VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage VIC Common-mode input voltage VID Differential input voltage IOH MAX UNIT 5 5.25 V V 0.8 V Receiver ±7 V Receiver ±12 V 40 mA –400 μA Driver High-level output current Receiver Driver IOL Low-level output current TA Operating free-air temperature (1) NOM 2 DE, RE, D (1) MIN 4.75 –40 Receiver mA 16 –20 85 °C Refer to TIA/EIA-422-B for exact conditions. DRIVER SECTION Electrical Characteristics over recommended supply voltage and operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT VOH High-level output voltage VIH = 2 V, VIL = 0.8 V, IOH = –20 mA 3.7 V VOL Low-level output voltage VIH = 2 V, VIL = 0.8 V, IOL = 20 mA 1.1 V VOD1 Differential output voltage IO = 0 mA VOD2 Differential output voltage (2) RL = 100 Ω, See Figure 1 ΔVOD Change in magnitude of differential output voltage (2) RL = 100 Ω, See Figure 1 ±0.4 V VOC Common-mode output voltage (2) RL = 100 Ω, See Figure 1 ±3 V ΔVOC Change in magnitude of differential common-mode voltage (2) RL = 100 Ω, See Figure 1 ±0.4 V Ioff Output current with power off (2) VCC = 0 V IOZ High-impedance-state output current VO = –0.25 V to 6 V IIH High-level input current VI = 2.7 V IIL Low-level input current IOS Short-circuit output current (2) ICC Supply current (total package) (1) (2) (3) 1.5 6 2 V VO = 6 V 100 VO = –0.25 V –100 VI = 0.4 V (3) VO = VCC or GND No load V –30 μA ±100 μA 20 μA –100 μA –150 mA Output enabled 80 110 Output disabled 50 80 mA All typical values are at VCC = 5 V and TA = 25°C. Refer to TIA-EIA-422-B for exact conditions. Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: SN7534050 SN7534051 Submit Documentation Feedback 5 SN7534050, SN7534051 SLLS833A – MAY 2007 – REVISED APRIL 2013 www.ti.com Switching Characteristics VCC = 5 V, CL = 50 pF, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT td(OD) Differential output delay time RL = 100 Ω, CL = 50 pF, See Figure 3 20 25 ns tt(OD) Differential output transition time RL = 100 Ω, CL = 50 pF, See Figure 3 27 35 ns tPLH Propagation delay time, low- to high-level output RL = 27 Ω, See Figure 4 20 25 ns tPHL Propagation delay time, high- to low-level output RL = 27 Ω, See Figure 4 20 25 ns tPZH Output enable time to high level RL = 110 Ω, See Figure 5 80 120 ns tPZL Output enable time to low level RL = 110 Ω, See Figure 6 40 60 ns tPHZ Output disable time from high level RL = 110 Ω, See Figure 5 90 120 ns tPLZ Output disable time from low level RL = 110 Ω, See Figure 6 30 45 ns TYP (1) MAX RECEIVER SECTION Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER VIT+ TEST CONDITIONS MIN Positive-going input threshold voltage, differential input VIT– Negative-going input threshold voltage, differential input Vhys Input hysteresis (VIT+ – VIT–) VIK Input clamp voltage, RE 0.2 –0.2 (2) SN7534050 II = –18 mA mV –1.5 VOH High-level output voltage VOL Low-level output voltage VID = –200 mV, See Figure 2 IOZ High-impedance-state output current See Figure 2 2.7 IOL = 8 mA 0.45 IOL = 16 mA 0.5 ±20 VI = 10 V 1.5 VI = –10 V –2.5 II Line input current IIH High-level enable input current, RE SN7534050 VIH = 2.7 V 20 IIL Low-level enable input current, RE SN7534050 VIL = 0.4 V –100 ri Input resistance IOS Short circuit output current ICC Supply current (total package) (1) (2) 12 V μA mA μA μA kΩ –15 No load, enabled V V SN7534050 VO = 0.4 V to 2.4 V Other input at 0 V V V 50 VID = 200 mV, IOH = –400 μA, UNIT 80 –85 mA 110 mA All typical values are at VCC = 5 V and TA = 25°C. The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode input voltage and threshold voltage levels. Switching Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 20 35 ns tPLH Propagation delay time, low- to high-level output VID = 1.5 V, CL = 15 pF, See Figure 7 tPHL Propagation delay time, high- to low-level output VID = 1.5 V, CL = 15 pF, See Figure 7 22 35 ns tPZH Output enable time to high level SN7534050 CL = 15 pF, see Figure 8 17 25 ns tPZL Output enable time to low level SN7534050 CL = 15 pF, See Figure 8 20 27 ns tPHZ Output disable time from high level SN7534050 CL = 15 pF, See Figure 8 25 40 ns tPLZ Output disable time from low level SN7534050 CL = 15 pF, See Figure 8 30 40 ns 6 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: SN7534050 SN7534051 SN7534050, SN7534051 www.ti.com SLLS833A – MAY 2007 – REVISED APRIL 2013 PARAMETER MEASUREMENT INFORMATION RL 2 VOD2 RL VOC 2 Figure 1. Driver Test Circuit, VOD and VOC VID IOH VOH VOL IOL Figure 2. Receiver Test Circuit, VOH and VOL A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr = tr ≤ 6 ns. 3V Input (see Note A) Y Input (see Note B) RL CL = 50 pF Output (see Note A) Z TEST CIRCUIT 1.5 V 1.5 V 0V td(OD) td(OD) Differential Output 50% 10% 90% 90% 50% 10% tt(OD) ~ ~ 2.5 V ~ ~ –2.5 V tt(OD) VOLTAGE WAVEFORMS Figure 3. Driver Test Circuit and Voltage Waveforms, td(OD) and tt(OD) A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr = tr ≤ 6 ns. Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: SN7534050 SN7534051 Submit Documentation Feedback 7 SN7534050, SN7534051 SLLS833A – MAY 2007 – REVISED APRIL 2013 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) 3V 2.3 V 1.5 V Input (see Note A) 0V tPLH tPHL RL = 27 Ω 2.3 V VOH 2.3 V VOL Y Output Input (see Note B) 1.5 V Z CL = 50 pF 2.3 V (see Note A) VOH 2.3 V VOL tPLH tPHL TEST CIRCUIT VOLTAGE WAVEFORMS Figure 4. Driver Test Circuit and Voltage Waveforms, tPLH and tPHL A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr = tr ≤ 6 ns. 3V Output 0 V or 3 V 1.5 V Input DE 1.5 V 0V CL = 50 pF Pulse Generator DE (see Note B) 50 Ω tPZH RL = 110 Ω (see Note A) tPHZ VOH 2.3 V Output 0.5 V GND VOLTAGE WAVEFORMS TEST CIRCUIT Figure 5. Driver Test Circuit and Voltage Waveforms, tPZH and tPHZ A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr = tr ≤ 6 ns. 5V RL = 110 Ω Output 0 V or 3 V Pulse Generator (see Note B) 3V 1.5 V 0V tPZL CL = 50 pF DE 1.5 V Input DE tPLZ 5V (see Note A) 2.3 V Output 50 Ω VOL 0.5 V VOLTAGE WAVEFORMS TEST CIRCUIT Figure 6. Driver Test Circuit and Voltage Waveforms, tPZL and tPLZ 8 A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr = tr ≤ 6 ns. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: SN7534050 SN7534051 SN7534050, SN7534051 www.ti.com SLLS833A – MAY 2007 – REVISED APRIL 2013 PARAMETER MEASUREMENT INFORMATION (continued) 1.5 V Pulse Generator 0V Input –1.5 V tPLH 50 Ω (see Note B) 0V tPHL CL = 15 pF 0V (see Note A) 1.3 V Output TEST CIRCUIT VOH 1.3 V VOL VOLTAGE WAVEFORMS Figure 7. Receiver Test Circuit and Voltage Waveforms, tPLH and tPHL A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr = tr ≤ 6 ns. 1.5 V S1 S2 2 kΩ 5V –1.5 V CL = 15 pF (see Note A) Generator (see Note B) 5 kΩ 1N916 or Equivalent 50 Ω S3 TEST CIRCUIT 3V 1.5 V 0V Input tPZH Output VOH Input S1 to 1.5 V S3 Closed S2 Open tPZL Output 1.5 V 3V 1.5 V 0V S1 to –1.5 V ~ ~4.5 V S3 Closed 1.5 V S2 Open VOL 0V 3V 3V 1.5 V Input 0V tPHZ Output VOH Input S1 to 1.5 V S2 Closed S3 Closed 1.5 V 0V S1 to –1.5 V ~ ~1.3 V S3 Closed S2 Closed VOL tPLZ Output 0.5 V ~ ~ 1.3 V 0.5 V VOLTAGE WAVEFORMS Figure 8. Receiver Test Circuit and Voltage Waveforms, tPZH, tPZL, tPHZ, tPLZ (SN7534050) Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: SN7534050 SN7534051 Submit Documentation Feedback 9 SN7534050, SN7534051 SLLS833A – MAY 2007 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Original (May 2007) to Revision A Page • Updated document format from QS to DocZone. ................................................................................................................. 1 • Updated ORDERING INFORMATION table. ........................................................................................................................ 1 10 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: SN7534050 SN7534051 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN7534050N ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -20 to 85 SN7534050N SN7534050NS ACTIVE SO NS 16 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -25 to 85 SN7534050 SN7534050NSR ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -20 to 85 SN7534050 SN7534051N ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -20 to 85 SN7534051N SN7534051NS ACTIVE SO NS 16 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -20 to 85 SN7534051 SN7534051NSR ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -20 to 85 SN7534051 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of