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SN75976A2DL

SN75976A2DL

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SSOP56

  • 描述:

    IC TRANSCEIVER HALF 9/9 56SSOP

  • 数据手册
  • 价格&库存
SN75976A2DL 数据手册
SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 D D D D D D D D D D D Improved Speed and Package Replacement for the SN75LBC976 Designed to Operate at up to 20 Million Data Transfers per Second (Fast-20 SCSI) Nine Differential Channels for the Data and Control Paths of the Small Computer Systems Interface (SCSI) and Intelligent Peripheral Interface (IPI) SN75976A Packaged in Shrink Small-Outline Package with 25-Mil Terminal Pitch (DL) and Thin Shrink Small-Outline Package with 20-Mil Terminal Pitch (DGG) SN55976A Packaged in a 56-Pin Ceramic Flat Pack (WD) Two Skew Limits Available ESD Protection on Bus Terminals Exceeds 12 kV Low Disabled Supply Current 8 mA Typ Thermal Shutdown Protection Positive- and Negative-Current Limiting Power-Up/Down Glitch Protection description SN75976A DGG or DL SN55976A WD (TOP VIEW) GND BSR CRE 1A 1DE/RE 2A 2DE/RE 3A 3DE/RE 4A 4DE/RE VCC GND GND GND GND GND VCC 5A 5DE/RE 6A 6DE/RE 7A 7DE/RE 8A 8DE/RE 9A 9DE/RE 1 56 2 55 3 54 4 53 5 52 6 51 7 50 8 49 9 48 10 47 11 46 12 45 13 44 14 43 15 42 16 41 17 40 18 39 19 38 20 37 21 36 22 35 CDE2 CDE1 CDE0 9B+ 9B– 8B+ 8B – 7B+ 7B – 6B+ 6B – VCC GND GND GND GND GND VCC 5B+ 5B – 4B+ 4B – 3B+ 3B – 2B+ 2B – 1B+ 1B – The SN75976A is an improved replacement for 23 34 the industry’s first 9-channel RS-485 24 33 transceiver — the SN75LBC976. The A version 25 32 offers improved switching performance, a smaller 26 31 package, and higher ESD protection. The 27 30 SN75976A is offered in two versions. The ’976A2 28 29 skew limits of 4 ns for the differential drivers and 5 ns for the differential receivers complies with the Terminals 13 through 17 and 40 through 44 are recommended skew budget of the Fast-20 SCSI connected together to the package lead frame standard for data transfer rates up to 20 million and signal ground. transfers per second. The ’976A1 supports the Fast SCSI skew budget for 10 million transfers per second. The skew limit ensures that the propagation delay times, not only from channel-to-channel but from device-to-device, are closely matched for the tight skew budgets associated with high-speed parallel data buses. The patented thermal enhancements made to the 56-pin shrink small-outline package (SSOP) of the SN75976 have been applied to the new, thin shrink, small-outline package (TSSOP). The TSSOP package offers even less board area requirements than the SSOP while reducing the package height to 1 mm. This provides more board area and allows component mounting to both sides of the printed circuit boards for low-profile, space-restricted applications such as small form-factor hard disk drives. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  1997, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 description (continued) In addition to speed improvements, the ’976A can withstand electrostatic discharges exceeding 12 kV using the human-body model, and 600 V using the machine model of MIL-PRF-38535, Method 3015.7 on the RS-485 I/O terminals. This is six times the industry standard and provides protection from the noise that can be coupled into external cables. The other terminals of the device can withstand discharges exceeding 4 kV and 400 V respectively. Each of the nine channels of the ’976A typically meet or exceed the requirements of EIA RS-485 (1983) and ISO 8482-1987/TIA TR30.2 referenced by American National Standard of Information (ANSI) Systems, X3.131-1994 (SCSI-2) standard, X2.277-1996 (Fast-20 Parallel Interface), and the Intelligent Peripheral Interface Physical Layer-ANSI X3.129-1986 standard. The SN75976A is characterized for operation over an ambient air temperature range of 0°C to 70°C. The SN55976A is characterized for operation over an ambient air temperature range of – 55°C to 125°C. AVAILABLE OPTIONS TA Skew Limit (ns) PACKAGE† Driver Receiver TSSOP (DGG) 8 9 SN75976A1DGG SN75976A1DGGR SN75976A1DL SN75976A1DLR — 4 5 SN75976A2DGG SN75976A2DGGR SN75976A2DL SN75976A2DLR — 8 9 — — SN55976A1WD — — SN55976A2WD 0°C to 70°C 55°C to 125°C –55°C 4 5 † The R suffix indicates taped and reeled packages. 2 POST OFFICE BOX 655303 SSOP (DL) • DALLAS, TEXAS 75265 CERAMIC FLAT PACK (WD) SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 Terminal Functions TERMINAL NAME NO. Logic g Level I/O Termination DESCRIPTION 1A to 9A 4,6,8,10, 19,21,23, 25,27 TTL I/O Pullup 1A to 9A carry data to and from the communication controller. 1B – to 9B – 29,31,33, 35,37,.46, 48,50,52 RS-485 I/O Pulldown 1B – to 9B – are the inverted data signals of the balanced pair to/from the bus. 1B+ to 9B+ 30,32,34, 36,38,47, 49,51,53 RS-485 I/O Pullup 1B+ to 9B+ are the noninverted data signals of the balanced pair to/from the bus. BSR 2 TTL Input Pullup BSR is the bit significant response. BSR disables receivers 1 through 8 and enables wired-OR drivers when BSR and DE/RE and CDE1 or CDE2 are high. Channel 9 is placed in a high-impedance state with BSR high. CDE0 54 TTL Input Pulldown CDE0 is the common driver enable 0. Its input signal enables all drivers when CDE0 and 1DE/RE – 9DE/RE are high. CDE1 55 TTL Input Pulldown CDE1 is the common driver enable 1. Its input signal enables drivers 1 to 4 when CDE1 is high and BSR is low. CDE2 56 TTL Input Pulldown CDE2 is the common driver enable 2. When CDE2 is high and BSR is low, drivers 5 to 8 are enabled. CRE 3 TTL Input Pullup CRE is the common receiver enable. When high, CRE disables receiver channels 5 to 9. 1DE/RE to 9DE/RE 5,7,9,11, 20,22,24, 26,28 TTL Input Pullup 1DE/RE–9DE/RE are direction controls that transmit data to the bus when it and CDE0 are high. Data is received from the bus when 1DE/RE–9DE/RE and CRE and BSR are low and CDE1 and CDE2 are low. GND 1,13,14, 15,16,17, 40,41,42, 43,44 NA Power NA GND is the circuit ground. All GND terminals except terminal 1 are physically tied to the die pad for improved thermal conductivity.† VCC 12,18,39, 45 NA Power NA Supply voltage † Terminal 1 must be connected to signal ground for proper operation. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 logic diagram (positive logic) CDE0 CDE1 BSR 1A 1DE/RE 2A 2DE/RE 3A 3DE/RE 4A 4DE/RE CDE2 CRE 5A 5DE/RE 6A 6DE/RE 7A 7DE/RE 8A 8DE/RE 54 55 2 30 4 29 5 6 7 8 9 10 11 Channel 2 Channel 3 Channel 4 9DE/RE 4 32 31 34 33 36 35 2B+ 2B– 3B+ 3B– 4B+ 4B– 56 3 38 19 37 5B+ 5B– 20 21 22 23 24 25 26 Channel 6 Channel 7 Channel 8 2 9A 1B+ 1B– 27 BSR 3 BSR 47 46 49 48 51 50 6B+ 6B– 7B+ 7B– 8B+ 8B– 54 CRE CDE0 28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 53 9B+ 52 9B– SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 schematics of inputs and outputs DE/RE, CRE, BSR, AND A Inputs CDE0, CDE1, AND CDE2 Inputs VCC VCC 100 kΩ 1 kΩ 1 kΩ Input Input 100 kΩ 8V 8V B + Input B – Input VCC 100 kΩ 16 V VCC 2 kΩ 2 kΩ 16 V 18 kΩ Input 18 kΩ Input 100 kΩ 4 kΩ 4 kΩ 16 V 16 V B + AND B – Outputs VCC A Output VCC 2 kΩ 40 Ω 16 V 18 kΩ Output Output 8V 4 kΩ 16 V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 6 V Bus voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 10 V to 15 V Data I/O and control (A side) voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to VCC +0.5 V Electrostatic discharge: B side and GND, Class 3, A: (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 kV B side and GND, Class 3, B: (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400 V All terminals, Class 3, A: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 kV All terminals, Class 3, B: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400 V Continuous total power dissipation (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to the GND terminals. 2. This absolute maximum rating is tested in accordance with MIL-PRF-38535, Method 3015.7. 3. The maximum operating junction temperature is internally limited. Use the Dissipation Rating Table to operate below this temperature. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C OPERATING FACTOR‡ ABOVE TA = 25°C DGG 2500 mW 20 mW/°C 1600 mW — DL 2500 mW 20 mW/°C 1600 mW — TA = 70°C POWER RATING TA = 125°C POWER RATING WD 1300 mW 10.5 mW/°C 827 mW 250 mW ‡ This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow. package thermal characteristics MIN Junction to ambient thermal resistance Junction-to-ambient resistance, RθJA Junction-to-ambient thermal resistance, RθJA Junction to case thermal resistance, Junction-to-case resistance RθJC Junction-to-case thermal resistance, RθJC MAX UNIT DGG, board-mounted, no air flow 50 °C/W DL, board-mounted, no air flow 50 °C/W 95.4 °C/W DGG 27 °C/W DL 12 °C/W 5.67 °C/W 165 °C WD WD Thermal-shutdown junction temperature, TJS 6 NOM POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 recommended operating conditions Supply voltage, VCC High-level input voltage, VIH Except nB+, nB–† Low-level input voltage, VIL Except nB+, nB–† Voltage at any bus terminal (separately or common common-mode), mode) VO, VI, or VIC nB+ or nB – MIN NOM MAX UNIT 4.75 5 5.25 V 2 Low level output current, Low-level current IOL Operating free-air free air temperature, temperature TA 12 V V – 60 mA Receiver –8 mA Driver 60 mA 8 mA Receiver Operating case temperature, TC V –7 Driver High level output current, High-level current IOH V 0.8 SN75976A 0 125 °C SN75976A 0 70 °C SN55976A – 55 125 °C †n = 1 – 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER S1 to A, VODH VODL VOH VOL Driver differential highlevel output out ut voltage Driver D i diff differential ti l lowl level output out ut voltage High-level output voltage Low-level output voltage SN55976A TYP† MAX TEST CONDITIONS VT = 5 V, See Figure 1 SN75976A TYP† MAX UNIT MIN MIN 0.7 1 1.8 V 1 1.4 V S1 to B, TC ≥ 25°C S1 to B, See Figure 1 VT = 5 V, See Figure 1 VT = 5 V, 0.7 S1 to A, TC ≥ 25°C S1 to B, VT = 5 V, See Figure 1 0.7 – 1.4 –1 – 1.4 V See Figure 1 0.7 – 1.8 –1 – 1.8 V – 0.8 – 1.4 – 0.8 – 1.4 V 4 4.5 4 4.5 V 3 V VT = 5 V, S1 to A, See Figure 1 VT = 5 V, A side, IOH = – 8 mA B side, VT = 5 V, A side, IOH = 8 mA VID = 200 mV, See Figure 3 A side, See Figure 1 VT = 5 V, See Figure 1 0.8 3 VID = –200 mV, See Figure 3 0.6 0.8 V 0.6 1 0.8 1 V V VIT+ Receiver positive-going differential input threshold voltage IOH = – 8 mA, See Figure 3 0.2 0.2 V VIT– Receiver negativegoing differential input threshold voltage IOL = 8 mA, See Figure 3 – 0.2 – 0.2 V Vhys Receiver input hysteresis (VIT+– VIT–) VCC = 5 V, TA = 25°C II IIH Bus input current High-level input curg rent IIL Low level input current Low-level IOS Short circuit output current IOZ High-impedance-state g output current ICC Supply current 24 45 24 45 mV VIH = 12 V, VIH = 12 V, VCC = 5 V, Other input at 0 V 0.4 1 0.4 1 mA VCC = 0, Other input at 0 V 0.5 1 0.5 1 mA VIH = – 7 V, VIH = – 7 V, VCC = 5 V, Other input at 0 V – 0.4 – 0.8 – 0.4 – 0.8 mA VCC = 0, Other input at 0 V – 0.3 – 0.8 – 0.3 – 0.8 mA A, BSR, DE/RE, and CRE, CDE0, CDE1, and CDE2, A, BSR, DE/RE, and CRE, CDE1, CDE1, and CDE2, VIH = 2 V VIH = 2V – 100 – 100 µA 100 100 µA VIL = 0.8 V VIL = 0.8 V – 100 – 100 µA 100 100 µA ±260 ±260 mA nB+ or nB– A See IIH and IIL See IIH and IIL See II See II nB+ or nB– Disabled 10 10 mA All drivers enabled, no load 60 60 mA All receivers enabled, no load 45 45 mA 25 pF CO Output capacitance nB+ or nB– to GND 18 18 Receiver 40 40 pF Cpd d Power dissipation capacitance (see Note 4) 100 100 pF Driver † All typical values are at VCC = 5 V, TA = 25°C. NOTE 4: Cpd determines the no-load dynamic supply current consumption, IS = CPD × VCC × f + ICC 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 driver switching characteristics over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS SN75976A TYP† MAX MIN 2.5 13.5 ns 3 11 ns 5 13 ns 4.5 11.5 ns 5 9 ns 7 11 ns ’976A1 8 ns ’976A2 4 ns 4 ns ’976A1 tpd d Propagation delay g y time,, tPHL or tPLH (see Figures 1 and 2) ’976A2 tsk(lim) k(li ) Skew limit,, maximum tpd d – minimum tpd d (see Note 5) UNIT VCC = 5 V, VCC = 5 V, TC = 25°C TC = 100°C VCC = 5 V, VCC = 5 V, TC = 25°C TC = 100°C tsk(p) tf Pulse skew, |tPHL – tPLH| Fall time S1 to B, tr ten Rise time See Figure 2 tdis tPHZ Disable time, control inputs to high-impedance output tPLZ tPZH Propagation delay time, low-level to high-impedance output See Figure 2 4 ns 8 ns Enable time, control inputs to active output Propagation delay time, high-level to high-impedance output See Figures 5 and 6 Propagation delay time, high-impedance to high-level output 50 ns 100 ns 17 100 ns 25 100 ns 17 50 ns tPZL Propagation delay time, high-impedance to low-level output 17 50 ns † All typical values are at VCC = 5 V, TA = 25°C. NOTE 5: This parameter is applicable at one VCC and operating temperature within the recommended operating conditions and to any two devices. driver switching characteristics over recommended operating conditions (unless otherwise noted) PARAMETER tpd d tsk(lim) k(li ) TEST CONDITIONS Propagation g delay y time,, tPHL or tPLH (see Figures 1 and 2) ’976A1 Skew limit,, maximum tpd d – minimum tpd d (see Note 5) 15 ns ns ’976A1 8 ns ’976A2 4 ns 4 ns tsk(p) tf Pulse skew, |tPHL – tPLH| Fall time S1 to B, tr ten Rise time See Figure 2 tdis tPHZ tPLZ tPZH TA = 25°C TA = 25°C UNIT 13.5 ’976A2 VCC = 5 V, VCC = 5 V, SN55976A TYP† MAX MIN See Figure 2 Enable time, control inputs to active output 4 ns 8 ns 60 ns Disable time, control inputs to high-impedance output 140 ns Propagation delay time, high-level to high-impedance output 120 ns Propagation delay time, low-level to high-impedance output 120 ns 60 ns Propagation delay time, high-impedance to high-level output See Figures 5 and 6 tPZL Propagation delay time, high-impedance to low-level output 60 ns † All typical values are at VCC = 5 V, TA = 25°C. NOTE 5. This parameter is applicable at one VCC and operating temperature within the recommended operating conditions and to any two devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 receiver switching characteristics over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS ’976A1 tpd d Propagation g delay y time,, tPHL or tPLH (see Figures 3 and 4) tsk(lim) k(li ) Skew limit,, maximum tpd d – minimum tpd d (see Note 5) ’976A2 VCC = 5 V, VCC = 5 V, TC = 25°C TC = 100°C SN75976A TYP† MAX MIN UNIT 7.5 16.5 ns 8.5 14.5 ns 8.6 13.6 ns 9 14 ns ’976A1 9 ns ’976A2 5 ns 4 ns tsk(p) tt Pulse skew, |tPHL – tPLH| 0.6 ten tdis Enable time, control inputs to active output 50 ns Disable time, control inputs to high-impedance output 60 ns tPHZ tPLZ Propagation delay time, high-level to high-impedance output 60 ns 50 ns tPZH tPZL Propagation delay time, high-impedance to high-level output 50 ns 50 ns Transition time (tr or tf) See Figure 4 Propagation delay time, low-level to high-impedance output 2 See Figures 7 and 8 Propagation delay time, high-impedance to low-level output ns † All typical values are at VCC = 5 V, TA = 25°C. NOTE 5. This parameter is applicable at one VCC and operating temperature within the recommended operating conditions and to any two devices. receiver switching characteristics over recommended operating conditions (unless otherwise noted) PARAMETER tpd d tsk(lim) k(li ) TEST CONDITIONS Propagation g delay y time,, tPHL or tPLH (see Figures 3 and 4) Skew limit,, maximum tpd d – minimum tpd d (see Note 5) ’976A1 ’976A2 VCC = 5 V, VCC = 5 V, SN55976A TYP† MAX MIN TA = 25°C TA = 25°C ’976A1 ’976A2 0.6 UNIT 19 ns 16 ns 9 ns 5 ns 4 ns tsk(p) tt Pulse skew, |tPHL – tPLH| ten tdis Enable time, control inputs to active output 70 ns Disable time, control inputs to high-impedance output 80 ns tPHZ tPLZ Propagation delay time, high-level to high-impedance output 80 ns 70 ns tPZH tPZL Propagation delay time, high-impedance to high-level output 70 ns 70 ns Transition time (tr or tf) See Figure 4 Propagation delay time, low-level to high-impedance output See Figures 7 and 8 Propagation delay time, high-impedance to low-level output 2 ns † All typical values are at VCC = 5 V, TA = 25°C. NOTE 5. This parameter is applicable at one VCC and operating temperature within the recommended operating conditions and to any two devices. 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 PARAMETER MEASUREMENT INFORMATION SN75976A = 5 V SN55976A = 4.5 V A S1 B+ IO 15 pF II A Input (see Note A) 165 Ω B 165 Ω 375 Ω VO VI 375 Ω 75 Ω VOD IO B– S2 VO † 15 pF † CDE0 and DE/RE are at 2 V, BSR is at 0.8 V and, for the SN75976A only, all others are open. ‡ For the SN75976A only, all nine drivers are enabled, similarly loaded, and switching. Figure 1. Driver Test Circuit, Currents, and Voltages‡ 3V Input 1.5 V 1.5 V 0V tPLH Output, VOD tPHL 0V 10% 90% 90% tr VOD(H) 0V 10% S1 to A or B VOD(L) tf Figure 2. Driver Delay and Transition Time Test Waveforms Generator (see Note A) Input B + 50 Ω IO VID Generator (see Note A) 50 Ω Output Input B – VO CL = 15 pF † † CDE0, CDE1, CDE2, BSR, CRE, and DE/RE at 0.8 V ‡ For the SN75976A only, all nine receivers are enabled and switching. Figure 3. Receiver Propagation Delay and Transition Time Test Circuit‡ NOTES: A. All input pulses are supplied by a generator having the following characteristics: tr ≤ 6 ns, tf ≤ 6 ns, PRR ≤ 1 MHz, duty cycle = 50%, ZO = 50 Ω. B. All resistances are in Ω and ± 5%, unless otherwise indicated. C. All capacitances are in pF and ± 10%, unless otherwise indicated. D. All indicated voltages are ± 10 mV. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 PARAMETER MEASUREMENT INFORMATION 3V Input B – 1.5 V 1.5 V Input B + 0V tPLH Output tPHL 90% 1.4 V 10% 90% tr VOH 1.4 V 10% VOL tf Figure 4. Receiver Delay and Transition Time Waveforms 4.5 V A S1 B+ 50 pF A 0 V or 3 V 165 Ω B 165 Ω 375 Ω 75 Ω VOD 375 Ω B– DE/RE S2 50 pF† See Table 1 Input † Includes probe and jig capacitance in two places. Figure 5. Driver Enable and Disable Time Test Circuit Table 1. Enabling For Driver Enable And Disable Time DRIVER BSR CDE0 CDE1 CDE2 CRE 1–8 H H L L X 9 L H H H H 3V Input, DE/RE 1.5 V 1.5 V 0V tPZH tPHZ VOD(H) Output, VOD 0V 0V ∼ –1 V tPZL tPLZ ∼1V Output, VOD A at 3V S1 to B 0V 0V VOD(L) A at 0V S1 to A Figure 6. Driver Enable Time Waveforms NOTES: A. All input pulses are supplied by a generator having the following characteristics: tr ≤ 6 ns, tf ≤ 6 ns, PRR ≤ 1 MHz, duty cycle = 50%, ZO = 50 Ω. B. All resistances are in Ω and ± 5%, unless otherwise indicated. C. All capacitances are in pF and ± 10%, unless otherwise indicated. D. All indicated voltages are ± 10 mV. 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 PARAMETER MEASUREMENT INFORMATION VT 0 V or 3 V Input 3 V or 0 V 620 Ω B+ A Output DE/RE † 40 pF‡ B– † CDE0 is high, CDE1, CDE2, BSR, and CRE are low and, for the SN75976A only, all others are open. ‡ Includes probe and jig capacitance. Figure 7. Receiver Enable and Disable Time Test Circuit 3V Input 1.4 V 1.4 V 0V tPLZ Output tPZL 1.4 V VOD 1.4 V Indeterminate tPHZ Output VOD B + at 0 V B – at 3 V VT = VCC tPZH 1.4 V 1.4 V B + at 3 V B – at 0 V VT = 0 Indeterminate Figure 8. Receiver Enable and Disable Time Waveforms NOTES: A. All input pulses are supplied by a generator having the following characteristics: tr ≤ 6 ns, tf ≤ 6 ns, PRR ≤ 1 MHz, duty cycle = 50%, ZO = 50 Ω. B. All resistances are in Ω and ± 5%, unless otherwise indicated. C. All capacitances are in pF and ± 10%, unless otherwise indicated. D. All indicated voltages are ± 10 mV. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 TYPICAL CHARACTERISTICS AVERAGE SUPPLY CURRENT vs FREQUENCY LOGIC INPUT CURRENT vs INPUT VOLTAGE – 30 A, DE/RE,CRE,BSR – 25 200 I I – Logic Input Current – µ A I CC – Average Supply Current – mA 250 150 100 ÁÁ ÁÁ ÁÁ 9 Drivers 50 – 20 – 15 – 10 –5 9 Receivers 0 0.001 0.01 0.1 1 10 0 100 0 1 f – Frequency – MHz Figure 9 BUS DRIVER INPUT CURRENT vs INPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT VOL – Low-Level Output Voltage – V I I – Input Current – mA 5 2.5 10 5 0 ÁÁ ÁÁ –5 – 15 – 10 –5 0 5 10 15 20 2 1.5 1 0.5 0 0 10 VI – Input Voltage – V 20 30 40 50 Figure 12 POST OFFICE BOX 655303 60 70 80 90 100 IOL – Low-Level Output Current – mA Figure 11 14 4 Figure 10 15 – 10 – 20 2 3 VI – Input Voltage – V • DALLAS, TEXAS 75265 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 TYPICAL CHARACTERISTICS DRIVER DRIVER HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT AVERAGE DIFFERENTIAL OUTPUT VOLTAGE vs AVERAGE CASE TEMPERATURE |VOD | – Average Differential Output Voltage – V 4 VOH – High-Level Output Voltage – V 3.5 ÁÁ ÁÁ ÁÁ 3 2.5 2 1.5 1 0.5 0 0 – 20 – 40 – 60 – 80 IOH – High-Level Output Current – mA – 100 2.5 VOD(L), VCC = 5.25 V 2 1.5 VOD(L), VCC = 4.75 V 1 VOD(H), VCC = 5.25 V ÁÁ ÁÁ ÁÁ VOD(H), VCC = 4.75 V 0.5 S1 to Position B (see Figure 1) 0 0 40 60 100 20 80 120 TC – Average Case Temperature – °C 140 Figure 14 Figure 13 RECEIVER DRIVER PROPAGATION DELAY TIME vs CASE TEMPERATURE PROPAGATION DELAY TIME vs CASE TEMPERATURE 16 14 14 tPHL(max) t pd – Propagation Delay Time – ns t pd – Propagation Delay Time – ns VCC = 5 V, S1 to Position B (see Figure 1) tPLH(max) 12 tPHL(min) 10 tPLH(min) 8 6 (Data Extracted From 7 Wafer Lots) 4 12 tPHL(max) 10 8 tPLH(max) 6 tPLH(min) tPHL(min) 4 2 VCC = 5 V Data Extracted From 7 Wafer Lots 2 0 0 20 40 60 80 100 120 140 0 20 TC – Case Temperature – °C 40 60 80 100 120 140 TC – Case Temperature – °C Figure 15 Figure 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 TYPICAL CHARACTERISTICS DRIVER OUTPUT CURRENT vs SUPPLY VOLTAGE 100 TA = 25°C 80 I O – Output Current – mA IOH 60 40 20 0 – 20 – 40 – 60 IOL – 80 0 1 2 3 4 VCC – Supply Voltage – V Figure 17 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 6 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 APPLICATION INFORMATION Table 2. Typical Signal and Terminal Assignments SCSI CONTROL IPI DATA CDE0 SIGNAL TERMINAL 54 DIFFSENSE SCSI DATA DIFFSENSE CDE1 55 GND GND VCC XMTA, XMTB VCC GND IPI CONTROL CDE2 56 GND GND XMTA, XMTB SLAVE/MASTER BSR 2 GND GND GND, BSR GND CRE 3 GND GND GND 1A 4 DB0, DB8 ATN AD7, BD7 VCC NOT USED 1DE/RE 5 DBE0, DBE8 INIT EN GND GND 2A 6 DB1, DB9 BSY AD6, BD6 NOT USED 2DE/RE 7 DBE1, DBE9 BSY EN GND GND 3A 8 DB2, DB10 ACK AD5, BD5 SYNC IN 9 3DE/RE DBE2, DBE10 INIT EN GND GND 10 DB3, DB11 RST AD4, BD4 SLAVE IN 4DE/RE 11 DBE3, DBE11 GND GND GND 5A 19 DB4, DB12 MSG AD3, BD3 NOT USED 5DE/RE 20 DBE4, DBE12 TARG EN GND GND 6A 21 DB5, DB13 SEL AD2, BD2 SYNC OUT 6DE/RE 22 DBE5, DBE13 SEL EN GND GND 7A 23 DB6, DB14 C/D AD1, BD1 MASTER OUT 7DE/RE 24 DBE6, DBE14 TARG EN GND GND 8A 25 DB7, DB15 REQ AD0, BD0 SELECT OUT 8DE/RE 26 DBE7, DBE15 TARG EN GND GND 9A 27 DBP0, DBP1 I/O AP, BP ATTENTION IN 9DE/RE 28 DBPE0, DBPE1 TARG EN XMTA, XMTB VCC 4A ABBREVIATIONS: DBn = data bit n, where n = (0,1, . . . ,15) DBEn = data bit n enable, where n = (0,1, . . . ,15) DBP0 = parity bit for data bits 0 through 7 or IPI bus A DBPE0 = parity bit enable for P0 DBP1 = parity bit for data bits 8 through 15 or IPI bus B DBPE1 = parity bit enable for P1 ADn or BDn = IPI Bus A – Bit n (ADn) or Bus B – Bit n (BDn), where n = (0,1, . . . ,7) AP or BP = IPI parity bit for bus A or bus B XMTA or XMTB = transmit enable for IPI bus A or B BSR = bit significant response INIT EN = common enable for SCSI initiator mode TARG EN = common enable for SCSI target mode NOTE A: Signal inputs are shown as active high. When only active-low inputs are available, logic inversion is accomplished by reversing the B + and B – connector terminal assignments. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 APPLICATION INFORMATION Function Tables RECEIVER DRIVER B+ A INPUTS B+ A B– B– B +† B –† OUTPUT A INPUT A L H H L L H L H TRANSCEIVER OUTPUTS B+ B– L H H L DRIVER WITH ENABLE B+ A B+ B– A B– DE/RE DE/RE DE/RE L L H H INPUTS A B +† – – L H L H – – B –† A H L – – L H – – INPUTS DE/RE A OUTPUTS B– B+ – – L H L L H H – – H L WIRED-OR DRIVER L H L H OUTPUTS B– B+ Z Z L H Z Z H L TWO-ENABLE INPUT DRIVER B+ A A B– B+ B– DE/RE INPUT A L H INPUTS DE/RE A OUTPUTS B+ B– Z H L L H H Z L L H L H OUTPUTS B– B+ Z H L H Z L H L H = high level, L = low level, X = irrelevant, Z = high impedance (off) † An H in this column represents a voltage of 200 mV or higher than the other bus input. An L represents a voltage of 200 mV or lower than the other bus input. Any voltage less than 200 mV results in an indeterminate receiver output. 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 APPLICATION INFORMATION VCC VCC SCSI Connector 620 Ω † nB + nA I/O EN 620 Ω † + nB – – SCSI Connector 620 Ω † nB + nA I (b) ACTIVE-LOW BIDIRECTIONAL I/O WITH SEPARATE ENABLE VCC VCC 620 Ω † 620 Ω † I + nB – O – – nDE/RE (d) SEPARATE ACTIVE-HIGH INPUT, OUTPUT, AND ENABLE VCC VCC SCSI Connector nB + nA + nB – EN (c) WIRED-OR DRIVER AND ACTIVE-HIGH INPUT I O‡ SCSI Connector nB + nA O‡ nDE/RE 620 Ω † + nDE/RE (a) ACTIVE-HIGH BIDIRECTIONAL I/O WITH SEPARATE ENABLE VCC – nB – EN nDE/RE nB + nA I/O SCSI Connector nB – SCSI Connector 620 Ω † – + EN nDE/RE nA I nB + nB – O – + nDE/RE 620 Ω (e) SEPARATE ACTIVE-LOW INPUT AND OUTPUT AND ACTIVE-HIGH ENABLE (f) WIRED-OR DRIVER AND ACTIVE-LOW INPUT † When 0 is open drain ‡ Must be open-drain or 3-state output NOTE A: The BSR, CRE, A, and DE/RE inputs have internal pullup resistors. CDE0, CDE1, and CDE2 have internal pulldown resistors. Figure 18. Typical SCSI Transceiver Connections POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 APPLICATION INFORMATION channel logic configurations with control input logic The following logic diagrams show the positive-logic representation for all combinations of control inputs. The control inputs are from MSB to LSB; the BSR, CDE0, CDE1, CDE2, and CRE bit values are shown below the diagrams. Channel 1 is at the top of the logic diagrams; channel 9 is at the bottom of the logic diagrams. Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Figure 19. 00000 20 Hi-Z Figure 20. 00001 Figure 21. 00010 POST OFFICE BOX 655303 Figure 22. 00011 • DALLAS, TEXAS 75265 Figure 23. 00100 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 APPLICATION INFORMATION Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Figure 24. 00101 Hi-Z Figure 25. 00110 Figure 26. 00111 Figure 28. 01001 Figure 27. 01000 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 21 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 APPLICATION INFORMATION Figure 32. 01101 Figure 29. 01010 22 Figure 30. 01011 Figure 31. 01100 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Figure 33. 01110 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 APPLICATION INFORMATION Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Figure 34. 01111 Figure 35. 10000 and 10001 Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Figure 36. 10010 and 10011 Figure 37. 10100 and 10101 Hi-Z Figure 38. 10110 and 10111 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 23 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 APPLICATION INFORMATION Hi-Z Figure 39. 11000 and 11001 Hi-Z Figure 40. 11010 and 11011 Hi-Z Figure 41. 11100 and 11101 Hi-Z Figure 42. 11110 and 11111 24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 MECHANICAL INFORMATION DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PIN SHOWN PINS ** 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM 1 Gage Plane 24 A 0,25 0°– 8° 0,75 0,50 Seating Plane 1,20 MAX 0,05 MIN 0,10 4040078 / D 08/96 NOTES: B. All linear dimensions are in millimeters. C. This drawing is subject to change without notice. D. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 25 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 MECHANICAL INFORMATION DL (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PIN SHOWN PINS ** 28 48 56 A MAX 0.380 (9,65) 0.630 (16,00) 0.730 (18,54) A MIN 0.370 (9,40) 0.620 (15,75) 0.720 (18,29) DIM 0.025 (0,635) 0.012 (0,305) 0.008 (0,203) 48 0.005 (0,13) M 25 0.006 (0,15) NOM 0.299 (7,59) 0.291 (7,39) 0.420 (10,67) 0.395 (10,03) Gage Plane 0.010 (0,25) 1 0°– 8° 24 0.040 (1,02) A 0.020 (0,51) Seating Plane 0.110 (2,79) MAX 0.008 (0,20) MIN 0.004 (0,10) 4040048 / B 02/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). 26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75976A, SN55976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS218B – MAY 1995 – REVISED MAY 1997 MECHANICAL INFORMATION WD (R-GDFP-F**) CERAMIC DUAL FLATPACK 48 PIN SHOWN NO. OF PINS** 0.120 (3,05) 0.075 (1,91) A MIN MAX 48 0.630 (16,00) 0.730 (18,54) 56 0.610 (15,49) 0.710 (18,03) 0.005 (0,13) NOM 1.200 (30,50) 0.950 (24,13) 0.390 (9,91) 0.370 (9,40) 1 48 0.025 (0,635) A 0.010 (0,25) TYP 24 25 4040176 / C 04/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for pin identification only Falls within MIL-STD-1835: GDFP1-F48 and JEDEC MO -146AA GDFP1-F56 and JEDEC MO -146AB POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 27 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-9689301QXA ACTIVE CFP WD 56 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9689301QX A SNJ55976A1WD SN55976A1WD ACTIVE CFP WD 56 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SN55976A1WD Samples SN75976A1DGG ACTIVE TSSOP DGG 56 35 RoHS & Green NIPDAU Level-2-260C-1 YEAR SN75976A1 Samples SN75976A1DL ACTIVE SSOP DL 56 20 RoHS & Green NIPDAU Level-2-260C-1 YEAR SN75976A1 Samples SN75976A1DLR ACTIVE SSOP DL 56 1000 RoHS & Green NIPDAU Level-2-260C-1 YEAR SN75976A1 Samples SN75976A2DGG ACTIVE TSSOP DGG 56 35 RoHS & Green NIPDAU Level-2-260C-1 YEAR SN75976A2 Samples SN75976A2DGGR ACTIVE TSSOP DGG 56 2000 RoHS & Green NIPDAU Level-2-260C-1 YEAR SN75976A2 Samples SN75976A2DL ACTIVE SSOP DL 56 20 RoHS & Green NIPDAU Level-2-260C-1 YEAR SN75976A2 Samples SN75976A2DLR ACTIVE SSOP DL 56 1000 RoHS & Green NIPDAU Level-2-260C-1 YEAR SN75976A2 Samples SNJ55976A1WD ACTIVE CFP WD 56 1 Non-RoHS & Green SNPB N / A for Pkg Type 0 to 70 -55 to 125 5962-9689301QX A SNJ55976A1WD (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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