SN75ALS181
SLLS152E – DECEMBER 1992 – REVISED OCTOBER 2022
SN75ALS181 Differential Driver and Receiver Pair
1 Features
2 Description
•
The SN75ALS181 is a differential driver and receiver
pair designed for bidirectional data communication
on multipoint bus transmission lines. The design
provides for balanced transmission lines and meets
TIA/EIA-422-B and TIA/EIA-485-A, and CCITT
recommendations V.10, V.11, X.26, and X.27.
•
•
•
•
•
•
•
•
•
•
Meets TIA/EIA-422-B, TIA/EIA-485-A, and CCITT
recommendations V.11 and X.27
Low supply-current requirements...
30 mA max
Driver output capacity...±60 mA
Thermal shutdown protection
Driver common-mode output voltage range of –7 V
to 12 V
Receiver input impedance: 12 kΩ min
Receiver input sensitivity: ±200 mV
Receiver input hysteresis: 60 mV typ
Receiver common-mode input voltage range of
±12 V
Operates from single 5-V supply
Glitch-free power-up and power-down protection
The SN75ALS181 combines a 3-state differential
line driver and a differential-input line receiver that
operate from a single 5-V power supply. The
driver and receiver have active-high and active-low
enables, respectively, that can be connected together
externally to function as a direction control. The driver
differential outputs and the receiver differential inputs
are connected to separate pins for greater flexibility
and are designed to offer minimum loading to the bus
when the driver is disabled or VCC = 0. These ports
feature wide positive and negative common-mode
voltage changes, making the device suitable for partyline applications.
Device Information
PART NUMBER
SN75ALS181
(1)
PACKAGE(1)
BODY SIZE (NOM)
N (PDIP) 14-pins
19.3 mm x 6.35 mm
NS (SO) 14-pins
10.3 mm x 5.3 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Diagram (Positive Logic)
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN75ALS181
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SLLS152E – DECEMBER 1992 – REVISED OCTOBER 2022
Table of Contents
1 Features............................................................................1
2 Description.......................................................................1
3 Revision History.............................................................. 2
4 Pin Configuration and Functions...................................3
5 Specifications.................................................................. 4
5.1 Absolute Maximum Ratings........................................ 4
5.2 Thermal Information....................................................4
5.3 Recommended Operating Conditions.........................4
5.4 Electrical Characteristics: Driver................................. 5
5.5 Switching Characteristics: Driver................................ 5
5.6 Electrical Characteristics: Receiver............................ 6
5.7 Switching Characteristics: Receiver............................6
Parameter Measurement Information............................... 7
6 Detailed Description......................................................10
6.1 Device Functional Modes..........................................10
7 Device and Documentation Support............................12
7.1 Receiving Notification of Documentation Updates....12
7.2 Support Resources................................................... 12
7.3 Trademarks............................................................... 12
7.4 Electrostatic Discharge Caution................................12
7.5 Glossary....................................................................12
3 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (August 2013) to Revision E (October 2022)
Page
• Added the Pin Configuration and Functions ...................................................................................................... 3
• Deleted the Package thermal impedance from the Absolute Maximum Ratings ...............................................4
• Added the Thermal Information table................................................................................................................. 4
• Added the Detailed Description section............................................................................................................10
Changes from Revision C (May 2010) to Revision D (August 2013)
Page
• Fixed typographical error in MAX value for Δ|VOD|. ........................................................................................... 5
• Fixed typographical error in UNITS for Δ|VOC|....................................................................................................5
• Removed Ordering Information table................................................................................................................10
• Fixed graphical error in schematic....................................................................................................................10
2
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4 Pin Configuration and Functions
N.C. – No internal connection
Figure 4-1. N OR NS Package
(Top View)
Table 4-1. Pin Functions
PIN
NAME
NC
NO.
TYPE
DESCRIPTION
1, 8
No Connect
Not electrically connected
R
2
Digital Output
Logic output RS485 data
RE
3
Digital Input
Receiver enable, active low
DE
4
Digital Input
Driver enable, active high
D
5
Digital Input
Driver data input
GND
6, 7
Ground
Y
9
Bus Output
Bus Output Y (Complementary to Z)
Z
10
Bus Output
Bus Output Z (Complementary to Y)
B
11
Bus Input
Bus Input B (Complementary to A)
12
Bus Input
Bus Input A (Complementary to B)
13, 14
Power
A
VCC
Device ground
5 V Supply
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5 Specifications
5.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) see (1)
MIN
VCC
MAX
Supply voltage range(2)
Input voltage range
D, DE, and RE inputs
Output voltage range
Driver
Input voltage range
Receiver
Receiver differential input voltage range(3)
(1)
(2)
(3)
Storage temperature range
V
7
V
–9
14
V
–14
14
V
–14
14
V
260
°C
150
°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
Tstg
UNIT
7
–65
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential input voltage, are with respect to network ground terminal.
Differential input voltage is measured at the non-inverting terminal with respect to the inverting terminal.
5.2 Thermal Information
THERMAL METRIC(1)
N (PDIP)
NS (SO)
14-Pins
14-Pins
UNIT
R θJA
Junction-to-ambient thermal resistance
54.2
88.6
°C/W
R θJB
Junction-to-board thermal resistance
41.6
49.12
°C/W
ψ JT
Junction-to-top characterization parameter
34.0
14.17
°C/W
ψ JB
Junction-to-board characterization parameter
21.1
48.6
°C/W
R θJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application
report.
5.3 Recommended Operating Conditions
VCC
Supply voltage
VOC
Common-mode output voltage(1)
Driver
VIC
Common-mode input voltage(1)
Receiver
VIH
High-level input voltage
D, DE, and RE
VIL
Low-level input voltage
D, DE, and RE
VID
Differential input voltage
IOH
IOL
Low-level output current
TA
Operating free-air temperature
(1)
4
High-level output current
MIN
NOM
MAX
UNIT
4.75
5
5.25
V
–7
12
V
–12
12
V
2
V
0.8
Driver
Receiver
Driver
V
–60
mA
–400
µA
60
Receiver
8
0
V
±12
70
mA
°C
The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this table for commonmode output voltage level only.
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5.4 Electrical Characteristics: Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIK
Input clamp voltage
II = –18 mA
VO
Output voltage
IO = 0
|VOD1|
Differential output voltage
IO = 0
|VOD2|
VCC = 5 V ,
RL = 100 Ω
Differential output voltage
See Figure 6-1
Vtest = –7 V to 12 V,
See Figure 6-2
RL = 54 Ω or 100 Ω,
See Figure 6-1
VOC
Common mode output voltage
RL = 54 Ω or 100 Ω,
See Figure 6-1
Δ|VOC|
Change in magnitude of common-mode
output voltage(2)
RL = 54 Ω or 100 Ω,
See Figure 6-1
IOZ
High-impedance-state output current
VO = –7 V to 12 V(3)
IIH
High-level input current
VIH = 2.4 V
IIL
Low-level input current
Short circuit output current
(1)
(2)
(3)
Supply current (total package)
UNIT
–1.5
V
6
V
1.5
6
V
2
V
2.3
5
1.5
5
V
±0.2
V
3
–1
V
±0.2
V
±100
µA
20
µA
VIL = 0.4 V
–100
µA
VO = –7 V
–250
VO = VCC
250
VO = 12 V
250
VO = 0 V
ICC
MAX
0
1.5
Change in magnitude of differential output
Δ|VOD|
voltage
IOS
Differential output voltage
TYP(1)
1/2 VOD1
RL = 54 Ω
|VOD3|
MIN
mA
–150
No load
Outputs enabled
21
30
Outputs disabled
14
21
mA
All typical values are at VCC = 5 V and TA = 25°C.
Δ|VOD| and Δ|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level
to a low level.
This applies for both power on and power off. Refer to TIA/EIA-485-A for exact conditions
5.5 Switching Characteristics: Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP(1)
9
13
20
ns
1
8
ns
MAX
UNIT
tdD
Differential output delay time, tdDH
or tdDL
RL = 54 Ω ,
CL = 50 pF,
See Figure 6-3
tsk(p)
Pulse skew (|tdDH – tdDL|)
RL = 54 Ω ,
CL = 50 pF,
See Figure 6-3
tt
Differential output transition time
RL = 54 Ω ,
CL = 50 pF,
See Figure 6-3
10
16
ns
tPZH
Output enable time to high level
RL = 110 Ω ,
See Figure 6-4
36
53
ns
tPZL
Output enable time to low level
RL = 110 Ω ,
See Figure 6-5
39
56
ns
tPHZ
Output disable time from high level
RL = 110 Ω ,
See Figure 6-4
20
31
ns
tPLZ
Output disable time from low level
RL = 110 Ω ,
See Figure 6-5
9
20
ns
(1)
3
All typical values are at VCC = 5 V and TA = 25°C.
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5.6 Electrical Characteristics: Receiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VT+
Positive-going threshold voltage,
differential input
VO = 2.7 V,
IO = –0.4 mA
VT–
Negative-going threshold voltage,
differential input
VO = 0.5 V,
IO = 8 mA
Vhys
Input hysteresis (VT+ – VT–)
VIK
Input clamp voltage, RE
II = –18 mA
VOH
High-level output voltage
VID = 200 mV,
IOH = –400 μA, See Figure 6-6
VOL
Low-level output voltage
VID = 200 mV,
IOL = 8 mA,
IOZ
High-impedance-state output current
VO = 0.4 V to 2.4 V
II
Line input current
Other input at 0
V(2),
IIH
High-level input current, RE
VIH = 2.7 V
IIL
Low-level input current, RE
VIL = –7 V
RI
Input resistance
IOS
Short circuit output current
ICC
(1)
(2)
Supply current (total package)
TYP(1)
MIN
MAX
UNIT
0.2
–0.2
V
60
mV
–1.5
V
2.7
V
See Figure 6-6
0.45
V
±20
µA
VI = 12 V
1
VI = –7 V
–0.8
VO = 0 V
mA
20
µA
–100
µA
–85
mA
12
VID = 200 mV,
No load
V
kΩ
–15
Outputs
enabled
21
30
Outputs
disabled
14
21
mA
All typical values are at VCC = 5 V and TA = 25°C.
This applies for both power on and power off. Refer to TIA/EIA-485-A for exact conditions
5.7 Switching Characteristics: Receiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
MIN
TYP(1)
MAX
UNIT
tPHL
Differential output delay time, tdDH or tdDL
VID = –1.5 V to 1.5 V
10
16
25
ns
tPLH
Propagation delay time, low- to high-level
output
VID = –1.5 V to 1.5 V
10
16
25
ns
tsk(p)
Pulse skew (|tdDH – tdDL|)
VID = –1.5 V to 1.5 V
1
8
ns
tPZH
Output enable time to high level
7
15
ns
tPZL
Output enable time to low level
9
19
ns
tPHZ
Output disable time from high level
18
27
ns
tPLZ
Output disable time from low level
10
15
ns
(1)
6
TEST CONDITIONS
All typical values are at VCC = 5 V and TA = 25°C.
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Parameter Measurement Information
Figure 6-1. Driver Test Circuit, VOD and VOC
Figure 6-2. Driver Circuit, VOD3
A.
B.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO =
50 Ω
CL includes probe and jig capacitance.
Figure 6-3. Driver Differential-Output Delay and Transition Times
A.
B.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO =
50 Ω
CL includes probe and jig capacitance.
Figure 6-4. Driver Enable and Disable Times
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A.
B.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO =
50 Ω
CL includes probe and jig capacitance.
Figure 6-5. Driver Enable and Disable Times
Figure 6-6. Receiver, VOH and VOL
A.
B.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO =
50 Ω
CL includes probe and jig capacitance.
Figure 6-7. Receiver Propagation-Delay Times
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A.
B.
SLLS152E – DECEMBER 1992 – REVISED OCTOBER 2022
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO =
50 Ω
CL includes probe and jig capacitance.
Figure 6-8. Receiver Output Enable and Disable Times
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6 Detailed Description
6.1 Device Functional Modes
6.1.1 Function Tables
Each Driver
INPUTS
D
ENABLE
DE
OUTPUTS
Y
Z
H
H
H
L
L
H
L
H
X
L
Z
Z
Each Receiver(1)
DIFFERENTIAL
A–B
ENABLE
RE
OUTPUT
R
VID ≥ 0.2 V
L
H
–0.2 V < VID < 0.2 V
L
?
VID ≤ –0.2 V
L
L
X
H
Z
(1)
H = high level, L = low level, ? = indeterminate, X = irrelevant,
Z = high impedance (off)
6.1.2 Schematics
W
W
W
W
W
Figure 6-1. SCHEMATICS OF INPUTS
10
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SN75ALS181
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Figure 6-2. SCHEMATICS OF OUTPUTS
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7 Device and Documentation Support
TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device,
generate code, and develop solutions are listed below.
7.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
7.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
7.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
7.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
7.5 Glossary
TI Glossary
12
This glossary lists and explains terms, acronyms, and definitions.
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PACKAGE OPTION ADDENDUM
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29-Apr-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
SN75ALS181N
ACTIVE
PDIP
N
14
25
RoHS & Green
NIPDAU
N / A for Pkg Type
0 to 70
SN75ALS181N
SN75ALS181NSR
ACTIVE
SO
NS
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
75ALS181
SN75ALS181NSRG4
ACTIVE
SO
NS
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
75ALS181
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of