SN75C3222PWRE4



        
      SLLS534B − MAY 2002 − REVISED OCTOBER 2004 D D D D D D D DB, DW, OR PW PACKAGE (TOP VIEW) Operates With 3-V to 5.5-V VCC Supply Operates Up To 1 Mbit/s Low Standby Current . . . 1 µA Typ External Capacitors . . . 4 × 0.1 µF Accepts 5-V Logic Input With 3.3-V Supply RS-232 Bus-Pin ESD Protection Exceeds ±15 kV Using Human-Body Model (HBM) Applications − Battery-Powered Systems, PDAs, Notebooks, Laptops, Palmtop PCs, and Hand-Held Equipment EN C1+ V+ C1− C2+ C2− V− DOUT2 RIN2 ROUT2 description/ordering information 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 PWRDOWN VCC GND DOUT1 RIN1 ROUT1 NC DIN1 DIN2 NC NC − No internal connection The SN65C3222 and SN75C3222 consist of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). The devices provide the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The devices operate at data signaling rates up to 1 Mbit/s and a driver output slew rate of 24 V/µs to 150 V/µs. The SN65C3222 and SN75C3222 can be placed in the power-down mode by setting PWRDOWN low, which draws only 1 µA from the power supply. When the devices are powered down, the receivers remain active while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is disabled, V+ is lowered to VCC, and V− is raised toward GND. Receiver outputs also can be placed in the high-impedance state by setting EN high. ORDERING INFORMATION SOIC (DW) −0°C 70°C −0 C to 70 C SSOP (DB) TSSOP (PW) SOIC (DW) −40°C −40 C to 85 85°C C ORDERABLE PART NUMBER PACKAGE† TA SSOP (DB) TSSOP (PW) Tube of 25 SN75C3222DW Reel of 2000 SN75C3222DWR Reel of 2000 SN75C3222DBR Tube of 70 SN75C3222PW Reel of 2000 SN75C3222PWR Tube of 25 SN65C3222DW Reel of 2000 SN65C3222DWR Reel of 2000 SN65C3222DBR Tube of 70 SN65C3222PW Reel of 2000 SN65C3222PWR TOP-SIDE MARKING 75C3222 CA3222 CA3222 65C3222 CB3222 CB3222 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2004, Texas Instruments Incorporated     !"#$ % &'!!($ #%  )'*+&#$ ,#$( !,'&$% &!" $ %)(&&#$% )(! $-( $(!"%  (.#% %$!'"($% %$#,#!, /#!!#$0 !,'&$ )!&(%%1 ,(% $ (&(%%#!+0 &+',( $(%$1  #++ )#!#"($(!% POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 

        
      SLLS534B − MAY 2002 − REVISED OCTOBER 2004 Function Tables EACH DRIVER INPUTS DIN OUTPUT DOUT PWRDOWN X L Z L H H H H L H = high level, L = low level, X = irrelevant, Z = high impedance EACH RECEIVER INPUTS RIN EN OUTPUT ROUT H L L H L L X H Z Open L H H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off logic diagram (positive logic) DIN1 DIN2 PWRDOWN EN ROUT1 ROUT2 2 13 17 12 8 20 DOUT1 DOUT2 Powerdown 1 15 16 10 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 RIN1 RIN2  

        
      SLLS534B − MAY 2002 − REVISED OCTOBER 2004 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V Positive output supply voltage range, V+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 7 V Negative output supply voltage range, V− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to −7 V Supply voltage difference, V+ − V− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V Input voltage range, VI: Drivers, EN, PWRDOWN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −25 V to 25 V Output voltage range, VO: Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −13.2 V to 13.2 V Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VCC + 0.3 V Package thermal impedance, θJA (see Notes 2 and 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltages are with respect to network GND. 2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 4 and Figure 5) Supply voltage VCC = 3.3 V VCC = 5 V VIH Driver and control high-level input voltage DIN, EN, PWRDOWN VIL VI Driver and control low-level input voltage DIN, EN, PWRDOWN Driver and control input voltage DIN, EN, PWRDOWN VI Receiver input voltage TA Operating free-air temperature VCC = 3.3 V VCC = 5 V MIN NOM MAX 3 3.3 3.6 4.5 5 5.5 UNIT V 2 V 2.4 0.8 V 0 5.5 V V −25 25 SN65C3222 −40 85 SN75C3222 0 70 °C NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V. electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 5) PARAMETER II ICC TEST CONDITIONS Input leakage current (EN, PWRDOWN) MIN TYP‡ MAX ±0.01 ±1 µA UNIT Supply current No load, PWRDOWN at VCC 0.3 1 mA Supply current (powered off) No load, PWRDOWN at GND 1 10 µA ‡ All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 

        
       SLLS534B − MAY 2002 − REVISED OCTOBER 2004 DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 5) PARAMETER TEST CONDITIONS MIN TYP† VOH VOL High-level output voltage DOUT at RL = 3 kΩ to GND, DIN = GND 5 5.4 Low-level output voltage DOUT at RL = 3 kΩ to GND, DIN = VCC −5 −5.4 IIH IIL High-level input current VI = VCC VI at GND Low-level input current ±0.01 IOS Short-circuit output current‡ VCC = 3.6 V, VCC = 5.5 V, ro Output resistance VCC, V+, and V− = 0 V, Ioff Output leakage current PWRDOWN = GND VO = 0 V VO = 0 V VO = ±2 V 300 MAX UNIT V V ±1 µA ±0.01 ±1 µA ±35 ±60 ±35 ±90 mA Ω 10M VO = ±12 V, VCC = 3 V to 3.6 V ±25 VO = ±10 V, VCC = 4.5 V to 5.5 V ±25 µA † All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. ‡ Short-circuit durations should be controlled to prevent exceeding the device absolute power-dissipation ratings, and not more than one output should be shorted at a time. NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V. switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 4) PARAMETER Maximum data rate (see Figure 1) TEST CONDITIONS RL = 3 kΩ, kΩ One DOUT switching MIN CL = 1000 pF CL = 250 pF, CL = 1000 pF, TYP† VCC = 3 V to 4.5 V VCC = 4.5 V to 5.5 V tsk(p) Pulse skew§ CL = 150 pF to 2500 pF RL = 3 kΩ to 7 kΩ, See Figure 2 SR(tr) Slew rate, transition region (see Figure 1) RL = 3 kΩ to 7 kΩ, VCC = 3.3 V CL = 150 pF to 1000 pF 1000 POST OFFICE BOX 655303 UNIT kbit/s 1000 300 18 † All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. § Pulse skew is defined as |tPLH − tPHL| of each channel of the same device. NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V. 4 MAX 250 • DALLAS, TEXAS 75265 ns 150 V/µs 

        
      SLLS534B − MAY 2002 − REVISED OCTOBER 2004 RECEIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 5) PARAMETER VOH VOL MIN TYP† VCC − 0.6 V VCC − 0.1 V TEST CONDITIONS High-level output voltage IOH = −1 mA IOL = 1.6 mA Low-level output voltage VIT+ Positive-going input threshold voltage VCC = 3.3 V VCC = 5 V VIT− Negative-going input threshold voltage VCC = 3.3 V VCC = 5 V Vhys Ioff Input hysteresis (VIT+ − VIT−) MAX V 0.4 1.5 2.4 1.8 2.4 0.6 1.2 0.8 1.5 ±0.05 EN = VCC ri Input resistance VI = ±3 V to ±25 V 3 5 † All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V. V V V 0.3 Output leakage current UNIT V ±10 µA 7 kΩ switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT tPLH tPHL Propagation delay time, low- to high-level output CL = 150 pF, See Figure 3 300 ns Propagation delay time, high- to low-level output CL= 150 pF, See Figure 3 300 ns ten Output enable time CL= 150 pF, RL = 3 kΩ, See Figure 4 200 ns tdis Output disable time CL= 150 pF, RL = 3 kΩ, See Figure 4 200 ns tsk(p) Pulse skew‡ See Figure 3 300 † All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. ‡ Pulse skew is defined as |tPLH − tPHL| of each channel of the same device. NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ns 5 

        
       SLLS534B − MAY 2002 − REVISED OCTOBER 2004 PARAMETER MEASUREMENT INFORMATION 3V Input Generator (see Note B) 1.5 V RS-232 Output 50 Ω RL 1.5 V 0V CL (see Note A) 3V PWRDOWN tTHL tTLH VOH 3V 3V Output −3 V −3 V VOL TEST CIRCUIT VOLTAGE WAVEFORMS SR(tr) + t THL 6V or t TLH NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 1. Driver Slew Rate 3V Generator (see Note B) RS-232 Output 50 Ω RL Input 1.5 V 1.5 V 0V CL (see Note A) tPHL tPLH VOH 3V PWRDOWN 50% 50% Output VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 2. Driver Pulse Skew EN 0V 3V Input 1.5 V 1.5 V −3 V Output Generator (see Note B) 50 Ω tPHL CL (see Note A) tPLH VOH 50% Output 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 3. Receiver Propagation-Delay Times 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 

        
       SLLS534B − MAY 2002 − REVISED OCTOBER 2004 PARAMETER MEASUREMENT INFORMATION VCC S1 GND RL Output 3 V or 0 V CL (see Note A) EN 3V Input 1.5 V −3 V tPZH (S1 at GND) tPHZ S1 at GND) VOH Output 50% 0.3 V Generator (see Note B) 1.5 V 50 Ω tPLZ (S1 at VCC) 0.3 V Output 50% VOL tPZL (S1 at VCC) TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 4. Receiver Enable and Disable Times POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 

        
      SLLS534B − MAY 2002 − REVISED OCTOBER 2004 APPLICATION INFORMATION 1 EN 2 20 Powerdown VCC C1+ PWRDOWN 19 + C BYPASS = 0.1 µF + C1 − 3 + V+ GND 18 − C3† − 4 5 17 C1− 16 C2+ DOUT1 RIN1 + C2 − 6 7 C4 DOUT2 RIN2 ROUT2 − 15 C2− 14 V− ROUT1 NC + 8 13 9 12 10 11 DIN1 DIN2 NC † C3 can be connected to VCC or GND. NOTES: A. Resistor values shown are nominal. B. NC − No internal connection VCC vs CAPACITOR VALUES VCC 3.3 V " 0.3 V C1 0.1 µF C2, C3, and C4 0.1 µF 5 V " 0.5 V 0.047 µF 0.33 µF 3 V to 5.5 V 0.1 µF 0.47 µF Figure 5. Typical Operating Circuit and Capacitor Values 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN65C3222DBR ACTIVE SSOP DB 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CB3222 Samples SN65C3222DWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 65C3222 Samples SN65C3222PW ACTIVE TSSOP PW 20 70 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CB3222 Samples SN75C3222DW ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 75C3222 Samples SN75C3222DWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 75C3222 Samples SN75C3222PW ACTIVE TSSOP PW 20 70 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 CA3222 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of