SN75LBC171DBR

SN65LBC171, SN75LBC171 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001 D D D D D D D D D D D D Three Differential Transceivers in One Package Signaling Rates1 Up to 30 Mbps Low Power and High Speed Designed for TIA/EIA-485, TIA/EIA-422, ISO 8482, and ANSI X3.277 (HVD SCSI Fast–20) Applications Common-Mode Bus Voltage Range –7 V to 12 V ESD Protection on Bus Terminals Exceeds 12 kV Driver Output Current up to ±60 mA Thermal Shutdown Protection Driver Positive and Negative Current Limiting Power-Up, Power-Down Glitch-Free Operation Pin-Compatible With the SN75ALS171 Available in Shrink Small-Outline Package SN65LBC171DB (Marked as BL171) SN75LBC171DB (Marked as LB171) SN65LBC171DW (Marked as 65LBC171) SN75LBC171DW (Marked as 75LBC171) (TOP VIEW) 1R 1DE 1D GND GND 2R 2DE 2D 3R 3DE 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 1B 1A RE CDE VCC 2B 2A 3B 3A 3D logic diagram CDE 1DE 1D 1A 1B RE description The SN65LBC171 and SN75LBC171 are monolithic integrated circuits designed for bidirectional data communication on multipoint bus-transmission lines. Potential applications include serial or parallel data transmission, cabled peripheral buses with twin axial, ribbon, or twisted-pair cabling. These devices are suitable for FAST–20 SCSI and can transmit or receive data pulses as short as 25 ns, with skew less than 3 ns. These devices combine three 3-state differential line drivers and three differential input line receivers, all of which operate from a single 5-V power supply. 1R 2DE 2D 2A 2B 2R 3DE 3D 3A 3B 3R The driver differential outputs and the receiver differential inputs are connected internally to form three differential input/output (I/O) bus ports that are designed to offer minimum loading to the bus whenever the driver is disabled or VCC = 0. These ports feature a wide common-mode voltage range making the device suitable for party-line applications over long cable runs. The SN75LBC171 is characterized for operation over the temperature range of 0°C to 70°C. The SN65LBC171 is characterized for operation over the temperature range of –40°C to 85°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second). Copyright  2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN65LBC171, SN75LBC171 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001 AVAILABLE OPTIONS{ PACKAGE TA PLASTIC SMALL-OUTLINE (JEDEC MS-013) PLASTIC SHRINK SMALL-OUTLINE (JEDEC MO-150) 0°C to 70°C SN75LBC171DW SN75LBC171DB – 40°C to 85°C SN65LBC171DW † Add R suffix for taped and reel SN65LBC171DB Function Tables EACH RECEIVER EACH DRIVER INPUT D H L OPEN X X X X ENABLE DE CDE H H H H H H L X X L OPEN X X OPEN OUTPUTS A B H L L H L H Z Z Z Z Z Z Z Z DIFFERENTIAL INPUT ENABLE OUTPUT (VA–VB) RE R VID ≥ 0.2 V – 0.2 V < VID < 0.2 V VID ≤ – 0.2 V X OPEN L H L L H L ? L Z H H = high level, L = low level, X = irrelevant, Z = high impedance (off), ? = indeterminate equivalent input and output schematic diagrams D, DE,CDE INPUTS RE INPUT VCC R OUTPUT VCC VCC 100 kΩ 8V 40 Ω 1 kΩ 1 kΩ Output Input Input 8V 100 kΩ A INPUT A AND B OUTPUT B INPUT VCC 100 kΩ 16 V 4 kΩ VCC 4 kΩ 16 V 18 kΩ Input VCC 18 kΩ 16 V 4 kΩ 18 kΩ Input Output 100 kΩ 16 V 2 4 kΩ 16 V 4 kΩ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 4 kΩ 16 V SN65LBC171, SN75LBC171 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001 absolute maximum ratings† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V Voltage range at any bus I/O terminal (steady state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –10 V to 15 V Voltage input range, A and B, (transient pulse through 100 Ω, see Figure 12) . . . . . . . . . . . . . . –30 V to 30 V Voltage range at any DE, RE, or CDE terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V Electrostatic discharge: Human body model (A, B, GND) (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . 12 kV All pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 kV Charged-device model (all pins) (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 kV Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Power Dissipation Rating Table Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential I/O bus voltages, are with respect to network ground terminal. 2. Tested in accordance with JEDEC Standard 22, Test Method A114–A. 3. Tested in accordance with JEDEC Standard 22, Test Method C101. POWER DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR‡ ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING DB 995 mW 8.0 mW/°C 635 mW 515 mW DW 1480 mW 11.8 mW/°C 950 mW 770 mW ‡ This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow. recommended operating conditions Supply voltage, VCC Voltage at any bus I/O terminal High-level input voltage, VIH Low-level input voltage, VIL Differential input voltage, VID Output current Operating free-air free air temperature, temperature TA MIN NOM MAX UNIT 4.75 5 5.25 V –7 12 V 2 0 VCC 0.8 V A with respect to B –12 12 V Driver –60 60 –8 8 SN75LBC171 0 70 SN65LBC171 –40 85 A, B DE CDE, DE, CDE RE Receiver POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 mA °C 3 SN65LBC171, SN75LBC171 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001 DRIVER SECTION electrical characteristics over recommended operating conditions PARAMETER VIK VO Input clamp voltage TEST CONDITIONS D, DE, CDE Open-circuit output voltage (single-ended) II = 18 mA A or B, No load TYP† –1.5 –0.7 0 No load |VOD(SS) ( )| St d t t diff ti l output t t voltage lt Steady-state differential magnitude‡ ∆VOD Change in differential output voltage magnitude, | VOD(H) | – |VOD(L) | VOC(SS) Steady-state common-mode output voltage ∆VOC(SS) Change in steady-state common-mode output voltage (VOC(H) – VOC(L)) II IO Input current D, DE, CDE Output current with power off IOS Short-circuit output current VCC = 0 V, VO = –7 V to 12 V, VO = –7 V to 12 V See Figure 7 ICC Supply current (driver enabled) D at 0 V or VCC, CDE, DE, RE at VCC, No load RL = 54 Ω, MIN See Figure 1 With common-mode loading, See Figure 2 See Figure 1 UNIT V 4.3 VCC VCC V 3.8 1 1.6 2.4 V 1 1.6 2.4 V 0.2 V 2.8 V –0.2 0.2 V –100 100 µA –700 900 µA –250 250 mA 20 mA –0.2 Ω RL = 54 Ω, CL = 50 pF F MAX 2 2.4 14 V † All typical values are at VCC = 5 V and TA = 25°C. ‡ The minimum VOD may not fully comply with TIA/EIA-485-A at operating temperatures below 0°C. System designers should take the possibly lower output signal into account in determining the maximum signal-transmission distance. switching characteristics over recommended operating conditions MIN TYP MAX tPLH tPHL Differential output propagation delay, low-to high PARAMETER TEST CONDITIONS 4 8.5 12 Differential output propagation delay, high-to-low 4 8.5 11 tr tf Differential output rise time 3 7.5 11 3 7.5 11 tsk(p) tsk(o) Pulse skew | (tPLH – tPHL) | Output skew§ tsk(pp) tPLH Part-to-part skew¶ RL = 54 Ω Ω, See Figure 3 Differential output fall time pF CL = 50 pF, 1.5 2 3 7 10 tPHL tr Differential output propagation delay, high-to-low 3 7.5 10 Differential output rise time 3 7.5 12 tf tsk(p) Differential output fall time 3 7.5 12 tPZH tPHZ See Figure 4 4, (HVD SCSI double-terminated load) Pulse skew | (tPLH – tPHL) | Output skew§ Output disable time from high level ns 3 1.5 Part-to-part skew¶ Output enable time to high level ns 2 Differential output propagation delay, low-to high tsk(o) tsk(pp) UNIT 2.5 See Figure 5 15 25 18 25 ns tPZL Output enable time to low level 10 25 See Figure 6 ns tPLZ Output disable time from low level 17 25 § Output skew (tsk(o)) is the magnitude of the time delay difference between the outputs of a single device with all of the inputs connected together. ¶ Part-to-part skew (tsk(pp)) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same input signals, the same supply voltages, at the same temperature, and have identical packages and test circuits. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN65LBC171, SN75LBC171 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001 RECEIVER SECTION electrical characteristics over recommended operating conditions PARAMETER TEST CONDITIONS VIT+ VIT– Positive-going differential input voltage threshold Vhys VOH Hysteresis voltage (VIT+ – VIT–) VOL Low-level output voltage VID = 200 mV, IOH = –8 mA, see Figure 10 VID = –200 mV, IOL = –8 mA, see Figure 10 II Line input current Other input = 0 V II RI Input current RE Input resistance A, B MIN TYP† MAX 0.2 Negative-going differential input voltage threshold –0.2 40 High-level output voltage ICC Supply current (receiver enabled) † All typical values are at VCC = 5 V and TA = 25°C. VI = 12 V VI = –7 V 4 4.7 0 0.2 0.9 100 12 A, B, D open, V mV VCC 0.4 –0.7 –100 UNIT V mA µA kΩ RE, DE, and CDE at 0 V 16 mA switching characteristics over recommended operating conditions PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH tPHL Propagation delay time, low-to-high level output 7 16 ns Propagation delay time, high-to-low level output 7 16 ns tr tf Receiver output rise time 1.3 3 ns Receiver output fall time 1.3 3 ns tPZH tPHZ Receiver output enable time to high level 26 40 tPZL tPLZ Receiver output enable time to low level tsk(p) tsk(o) Pulse skew (| ( tPLH – tPHL |) Receiver output disable time from high level Receiver output enable time to high level VID = –3 3 V to 3 V V, See Figure 9 See Figure 10 See Figure 11 Output skew} 40 29 40 40 ns ns 2 ns 1.5 ns Part-to-part skeww tsk(pp) 3 ns ‡ Output skew (tsk(o)) is the magnitude of the time delay difference between the outputs of a single device with all of the inputs connected together. § Part-to-part skew (tsk(pp)) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same input signals, the same supply voltages, at the same temperature, and have identical packages and test circuits. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN65LBC171, SN75LBC171 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001 PARAMETER MEASUREMENT INFORMATION IO 27 Ω II 0 V or 3 V IO VO 50 pF{ VOD 27 Ω VOC VO †Includes probe and jig capacitance Figure 1. Driver Test Circuit, VOD and VOC Without Common-Mode Loading 375 Ω VOD Input 60 Ω VTEST = –7 V to 12 V 375 Ω VTEST Figure 2. Driver Test Circuit, VOD With Common-Mode Loading RL = 54 Ω Signal Generator{ CL = 50 pF} VOD 50 Ω † PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, Zo = 50 Ω ‡ Includes Probe and Jig Capacitance 3V Input 1.5 V 1.5 V 0V tPLH Output tPHL 90% 90% 10% tr 10% VOD(H) 0V VOD(L) tf Figure 3. Driver Switching Test Circuit and Waveforms, 485-Loading 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN65LBC171, SN75LBC171 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001 PARAMETER MEASUREMENT INFORMATION 5V S1 0V 375 Ω 165 Ω 60 pF} 3V Input 1.5 V 1.5 V 0V 75 Ω Signal 50 Ω Generator{ tPLH VOD tPHL 90% 90% Output 165 Ω 375 Ω 5V 10% 10% 60 pF} tr VOD(H) 0V VOD(L) tf S2 0V † PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, Zo = 50 Ω ‡ Includes Probe and Jig Capacitance Figure 4. Driver Switching Test Circuit and Waveforms, HVD SCSI-Loading (double terminated) A S1 0 V or 3 V{ B Output CL = 50 pFw RL = 110 Ω Input Generator} 50 Ω † 3 V if testing A output, 0 V if testing B output ‡ PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, Zo = 50 Ω w Includes Probe and Jig Capacitance 3V Input 1.5 V 1.5 V 0V 0.5 V tPZH Output VOH 2.3 V 0V tPHZ Figure 5. Driver Enable/Disable Test, High Output POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SN65LBC171, SN75LBC171 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001 PARAMETER MEASUREMENT INFORMATION 5V RL = 110 Ω A S1 0 V or 3 V{ Output 1.5 V 1.5 V 0V B CL = 50 pFw Input Generator} 3V Input tPZH tPHZ 5V Output 2.3 V 50 Ω VOL 0.5 V † 0 V if testing A output, 3 V if testing B output ‡ PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, Zo = 50 Ω w Includes Probe and Jig Capacitance Figure 6. Driver Enable/Disable Test, Low Output IOS IO VO VID Voltage Source VO Figure 7. Driver Short-Circuit Test Generator{ 50 Ω Input B A R VID Generator{ Figure 8. Receiver DC Parameters 50 Ω IO Input A B CL = 15 pF‡ 3V 1.5 V 0V tPLH VO Output tPHL 1.5 V 10% tr † PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, Zo = 50 Ω ‡ Includes Probe and Jig Capacitance Figure 9. Receiver Switching Test Circuit and Waveforms 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 90% 90% VOH 1.5 V 10% V OL tf SN65LBC171, SN75LBC171 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001 PARAMETER MEASUREMENT INFORMATION 1.5 V VCC A 3V 1 kΩ R B 1.5 V 0V CL = 15 pF} tPZH EN Generator{ 1.5 V tPHZ VOH VOH –0.5 V 1.5 V 50 Ω GND † PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, Zo = 50 Ω ‡ Includes Probe and Jig Capacitance Figure 10. Receiver Enable/Disable Test, High Output –1.5 V VCC A 3V R B EN 1 kΩ 1.5 V 1.5 V 0V CL = 15 pF} tPZL tPLZ VCC 1.5 V Generator{ 50 Ω VOL + 0.5 V VOL † PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, Zo = 50 Ω ‡ Includes Probe and Jig Capacitance Figure 11. Receiver Enable/Disable Test, Low Output 100 Ω Pulse Generator, 15-µs Duration, 1% Duty Cycle VTEST 0V 15 µs 1.5 ms –VTEST Figure 12. Test Circuit and Waveform, Transient Over Voltage Test POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SN65LBC171, SN75LBC171 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001 TYPICAL CHARACTERISTICS DIFFERENTIAL OUTPUT VOLTAGE vs OUTPUT CURRENT DIFFERENTIAL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 2.5 3.5 VOD – Differential Output Voltage – V VOD – Differential Output Voltage – V 4 3 VCC = 5.25 V 2.5 VCC = 5 V 2 1.5 VCC = 4.75 V 1 0.5 0 0 20 40 60 80 IO – Output Current – mA VCC = 5 V 1.5 VCC = 4.75 V 1 0.5 0 –60 100 VCC = 5.25 V 2 –40 Figure 13 165 160 10 I CC – Supply Current – mA Driver Propagation Delay – ns 11 SCSI Load 9 8 RS–485 Load 6 All 3 Channels Driving RL = 54 Ω, CL = 50 pF (Each Channel), Pseudorandom NRZ Data 155 150 145 140 5 –20 0 20 40 60 TA – Free-Air Temperature – °C 80 135 0.1 Figure 15 10 100 SUPPLY CURRENT vs SIGNALING RATE 12 4 –40 80 Figure 14 DRIVER PROPAGATION DELAY vs FREE-AIR TEMPERATURE 7 –20 0 20 40 60 TA – Free-Air Temperature – °C 1 10 Signaling Rate – Mbps Figure 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 100 SN65LBC171, SN75LBC171 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001 TYPICAL CHARACTERISTICS BUS INPUT CURRENT vs BUS INPUT VOLTAGE RECEIVER PROPAGATION DELAY TIME vs FREE-AIR TEMPERATURE 800 t pd– Receiver Propagation Delay Time – ns 12 600 Bus Input Current –µ A VCC = 0 V 400 VCC = 5 V 200 0 –200 –400 –600 –10 –5 0 5 10 15 11 10 tPHL 9 tPLH 8 7 6 5 4 –40 –20 Bus Input Voltage – V Figure 17 0 20 40 60 TA – Free-Air Temperature °C 80 Figure 18 SN65LBC171 (as Driver) 15 Meters, Cat. 5 Twisted-Pair Cable Signal Generator SN65LBC171 (as Receiver) 100 Ω 15 pF Figure 19. Circuit Diagram for Signaling Characteristics POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 SN65LBC171, SN75LBC171 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001 TYPICAL CHARACTERISTICS Driver Input (5 V/div) Driver Output (2 V/div) Receiver Input (2 V/div) 25 ns Receiver Output (5 V/div) Figure 20. Signal Waveforms at 30 Mbps Driver Input (5 V/div) Driver Output (2 V/div) Receiver Input (2 V/div) 12.5 ns Receiver Output (5 V/div) Figure 21. Eye Patterns, Pseudorandom Data at 30 Mbps 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN65LBC171, SN75LBC171 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001 TYPICAL CHARACTERISTICS Driver Input (5 V/div) Driver Output (2 V/div) Receiver Input (2 V/div) 25 ns Receiver Output (5 V/div) Figure 22. Signal Waveforms at 50 Mbps Driver Input (5 V/div) Driver Output (2 V/div) Receiver Input (2 V/div) 12.5 ns Receiver Output (5 V/div) Figure 23. Eye Patterns, Pseudorandom Data at 50 Mbps POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 SN65LBC171, SN75LBC171 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001 MECHANICAL DATA DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,15 NOM 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°– 8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /D 09/00 NOTES: A. B. C. D. 14 All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN65LBC171, SN75LBC171 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001 MECHANICAL DATA DW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 16 PINS SHOWN 0.050 (1,27) 0.020 (0,51) 0.014 (0,35) 16 0.010 (0,25) M 9 0.419 (10,65) 0.400 (10,15) 0.010 (0,25) NOM 0.299 (7,59) 0.291 (7,39) Gage Plane 0.010 (0,25) 1 8 0°– 8° A 0.050 (1,27) 0.016 (0,40) Seating Plane 0.104 (2,65) MAX 0.012 (0,30) 0.004 (0,10) PINS ** 0.004 (0,10) 16 20 24 28 A MAX 0.410 (10,41) 0.510 (12,95) 0.610 (15,49) 0.710 (18,03) A MIN 0.400 (10,16) 0.500 (12,70) 0.600 (15,24) 0.700 (17,78) DIM 4040000 / D 01/00 NOTES: A. B. C. D. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). Falls within JEDEC MS-013 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN65LBC171DB ACTIVE SSOP DB 20 70 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 BL171 SN65LBC171DW ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 65LBC171 SN65LBC171DWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 65LBC171 SN75LBC171DB ACTIVE SSOP DB 20 70 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 LB171 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of