SN65LBC174A
SN75LBC174A
www.ti.com
SLLS446F – OCTOBER 2000 – REVISED OCTOBER 2009
QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS
Check for Samples: SN65LBC174A SN75LBC174A
FEATURES
1
•
2
•
•
•
(1)
Designed for TIA/EIA-485, TIA/EIA-422 and
ISO 8482 Applications
Signaling Rates (1) up to 30 Mbps
Propagation Delay Times < 11 ns
Low Standby Power Consumption 1.5-mA Max
•
•
•
•
•
The signaling rate of a line is the number of voltage
transitions that are made per second expressed in the units
bps (bits per second).
Output ESD Protection: 12 kV
Driver Positive- and Negative-Current Limiting
Power-Up and Power-Down Glitch-Free for
Line Insertion Applications
Thermal Shutdown Protection
Industry Standard Pin-Out, Compatible With
SN75174, MC3487, DS96174, LTC487, and
MAX3042
DESCRIPTION
The SN65LBC174A and SN75LBC174A are quadruple differential line drivers with 3-state outputs, designed for
TIA/EIA-485 (RS-485), TIA/EIA-422 (RS-422), and ISO 8482 applications.
These devices are optimized for balanced multipoint bus transmission at signaling rates up to 30 million bits per
second. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate
and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise
coupling to the environment.
N PACKAGE
(TOP VIEW)
1A
1Y
1Z
1,2EN
2Z
2Y
2A
GND
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
16-DW PACKAGE
(TOP VIEW)
VCC
4A
4Y
4Z
3,4EN
3Z
3Y
3A
1A
1Y
1Z
1,2EN
2Z
2Y
2A
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
logic diagram (positive logic)
VCC
4A
4Y
4Z
3,4EN
3Z
3Y
3A
1A
1,2EN
2A
3A
3,4EN
4A
20-DW PACKAGE
(TOP VIEW)
1A
1Y
NC
1Z
1,2EN
2Z
NC
2Y
2A
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1
2
3
4
7
9
6
5
10
11
12
15
14
13
1Y
1Z
2Y
2Z
3Y
3Z
4Y
4Z
logic diagram (positive logic)
VCC
4A
4Y
NC
4Z
3,4EN
3Z
NC
3Y
3A
1A
1,2EN
2A
3A
3,4EN
4A
1
2
4
5
9
11
8
6
12
14
15
19
18
16
1Y
1Z
2Y
2Z
3Y
3Z
4Y
4Z
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinBiCMOS is a registered trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2009, Texas Instruments Incorporated
SN65LBC174A
SN75LBC174A
SLLS446F – OCTOBER 2000 – REVISED OCTOBER 2009
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
DESCRIPTION (CONTINUED)
Each driver features current limiting and thermal-shutdown circuitry making it suitable for high-speed multipoint
applications in noisy environments. These devices are designed using LinBiCMOS®, facilitating low power
consumption and robustness.
The two EN inputs provide pair-wise driver enabling, or can be externally tied together to provide enable control
of all four drivers with one signal. When disabled or powered off, the driver outputs present a high-impedance to
the bus for reduced system loading.
The SN75LBC174A is characterized for operation over the temperature range of 0°C to 70°C. The
SN65LBC174A is characterized for operation over the temperature range of –40°C to 85°C.
Table 1. AVAILABLE OPTIONS
PACKAGE
TA
0°C to 70°C
–40°C to 85°C
(1)
16-PIN
PLASTIC SMALL OUTLINE
(JEDEC MS-013)
(1)
20-PIN
PLASTIC SMALL OUTLINE
(JEDEC MS-013)
SN75LBC174A16DW
16-PIN
PLASTIC THROUGH-HOLE
(JEDEC MS-001)
(1)
SN75LBC174ADW
SN75LBC174AN
MARKED AS 75LBC174A
SN65LBC174A16DW
SN65LBC174DW
SN65LBC174AN
MARKED AS 65LBC174A
Add R suffix for taped and reeled version.
Table 2. FUNCTION TABLE (EACH DRIVER) (1)
(1)
2
INPUT
ENABLE
OUTPUT
OUTPUT
A
EN
Y
Z
L
H
L
H
H
H
H
L
OPEN
H
H
L
L
OPEN
L
H
H
OPEN
H
L
OPEN
OPEN
H
L
X
L
Z
Z
H = high level, L = low level, X = irrelevant, Z = high impedance (off)
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Copyright © 2000–2009, Texas Instruments Incorporated
Product Folder Link(s): SN65LBC174A SN75LBC174A
SN65LBC174A
SN75LBC174A
www.ti.com
SLLS446F – OCTOBER 2000 – REVISED OCTOBER 2009
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
VALUE / UNIT
Supply voltage range, VCC
(2)
–0.3 V to 6 V
Voltage range at any bus (DC)
–10 V to 15 V
Voltage range at any bus (transient pulse through 100 Ω, see Figure 8)
–30 V to 30 V
Input voltage range at any A or EN terminal, VI
Human body model
Electrostatic
discharge
–0.5 V to VCC + 0.5 V
(3)
Charged-device model
(4)
Y, Z, and GND
±12 kV
All pins
±5 kV
All pins
±1 kV
Storage temperature range, Tstg
–65°C to 150°C
Continuous power dissipation
(1)
(2)
(3)
(4)
See Dissipation Rating Table
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential I/O bus voltages, are with respect to GND.
Tested in accordance with JEDEC standard 22, Test Method A114-A.
Tested in accordance with JEDEC standard 22, Test Method C101.
Table 3. DISSIPATION RATING TABLE
PACKAGE
(1)
JEDEC BOARD
MODEL
16 DW
20 DW
16 N
(1)
(2)
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
(2)
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
LOW K
1200 mW
9.6 mW/°C
769 mW
625 mW
HIGH K
2240 mW
17.9 mW/°C
1434 mW
1165 mW
LOW K
1483 mW
11.86 mW/°C
949 mW
771 mW
HIGH K
2753 mW
22 mW/°C
1762 mW
1432 mW
LOW K
1150 mW
9.2 mW/°C
736 mW
598 mW
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.
RECOMMENDED OPERATING CONDITIONS
Supply voltage, VCC
Voltage at any bus terminal
High-level input voltage, VIH
Low-level input voltage, VIL
Y, Z
A, EN
Output current
Operating free-air
temperature, TA
MIN
NOM
MAX
UNIT
4.75
5
5.25
V
–7
12
V
2
VCC
0
0.8
–60
60
SN75LBC174A
0
70
SN65LBC174A
–40
85
Copyright © 2000–2009, Texas Instruments Incorporated
Product Folder Link(s): SN65LBC174A SN75LBC174A
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V
mA
°C
3
SN65LBC174A
SN75LBC174A
SLLS446F – OCTOBER 2000 – REVISED OCTOBER 2009
www.ti.com
ELECTRICAL CHARACTERISTICS
over recommended operating conditions
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
VIK
Input clamp voltage
II = -18 mA
VO
Open-circuit output voltage
Y or Z, No load
0
VCC
No load (open circuit)
3
VCC
RL = 54 Ω, See Figure 1
1
1.6
2.5
With common-mode loading, See Figure 2
1
1.6
2.5
|VOD(SS)|
Steady-state differential output voltage
magnitude (2)
–1.5
(1)
ΔVOD(SS)
Change in steady-state differential
output voltage between logic states
See Figure 1
–0.1
VOC(SS)
Steady-state common-mode output
voltage
See Figure 3
2
ΔVOC(SS)
Change in steady-state common-mode
See Figure 3
output voltage between logic states
II
Input current
IOS
Short-circuit output current
High-impedance-state output current
IO(OFF)
Output current with power off
ICC
Supply current
CIN
Input Capacitance
(1)
(2)
VI = 0 V or VCC, No load
V
V
V
V
2.8
V
–0.02
0.02
V
–50
50
μA
–200
200
mA
EN at 0 V
–50
50
VCC = 0 V
–10
10
VI = 0 V
IOZ
UNIT
0.1
A, EN
VTEST = -7 V to 12 V, See
Figure 7
–0.77
VI = VCC
2.4
All drivers enabled
23
All drivers disabled
1.5
μA
mA
A inputs
13
pF
EN inputs
21
pF
All typical values are at VCC = 5 V and 25°C.
The minimum VOD may not fully comply with TIA/EIA-485-A at operating temperatures below 0°C. System designers should take the
possibly lower output signal into account in determining the maximum signal transmission distance.
SWITCHING CHARACTERISTICS
over recommended operating conditions
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
tPLH
Propagation delay time, low-to-high level output
5.5
8
11
ns
tPHL
Propagation delay time, high-to-low level output
5.5
8
11
ns
tr
Differential output voltage rise time
3
7.5
11
ns
tf
Differential output voltage fall time
3
7.5
11
ns
0.6
2
0.6
2
RL = 54 Ω, CL = 50 pF,
See Figure 4
tsk(p)
Pulse skew |tPLH – tPHL|
tsk(o)
Output skew (1)
2
ns
tsk(pp)
Part-to-part skew (2)
3
ns
tPZH
Propagation delay time, high-impedance-to-high-level output
25
ns
tPHZ
Propagation delay time, high-level-output-to-high impedance
25
ns
tPZL
Propagation delay time, high-impedance-to-low-level output
30
ns
tPLZ
Propagation delay time, low-level-output-to-high impedance
20
ns
(1)
(2)
4
See Figure 5
See Figure 6
ns
Output skew (tsk(o)) is the magnitude of the time delay difference between the outputs of a single device with all of the inputs connected
together.
Part-to-part skew (tsk(pp)) is the magnitude of the difference in propagation delay times between any specified terminals of two devices
when both devices operate with the same input signals, the same supply voltages, at the same temperature, and have identical
packages and test circuits.
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Copyright © 2000–2009, Texas Instruments Incorporated
Product Folder Link(s): SN65LBC174A SN75LBC174A
SN65LBC174A
SN75LBC174A
www.ti.com
SLLS446F – OCTOBER 2000 – REVISED OCTOBER 2009
PARAMETER MEASUREMENT INFORMATION
IOY
Y
II
A
Z
IOZ
VOD
54 Ω
VOY
GND
VI
VOZ
Figure 1. Test Circuit, VOD Without Common-Mode Loading
375 Ω
Y
A
Input
VOD
60 Ω
Z
VTEST = –7 V to 12 V
375 Ω
VTEST
VI
Figure 2. Test Circuit, VOD With Common-Mode Loading
Y
27 Ω
A
Z
Signal
Generator†
†
‡
27 Ω
CL = 50 pF‡
50 Ω
VOC
PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, ZO = 50 Ω
Includes probe and jig capacitance
Figure 3. VOC Test Circuit
Copyright © 2000–2009, Texas Instruments Incorporated
Product Folder Link(s): SN65LBC174A SN75LBC174A
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SN65LBC174A
SN75LBC174A
SLLS446F – OCTOBER 2000 – REVISED OCTOBER 2009
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
Y
A
RL = 54 Ω
CL = 50 pF‡
VOD
Z
Signal
Generator†
†
‡
50 Ω
PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, ZO = 50 Ω
Includes probe and jig capacitance
3V
1.5 V
Input
0V
tPLH
tPHL
≈ 1.5 V
90%
0V
10%
Output
tr
≈ –1.5 V
tf
Figure 4. Output Switching Test Circuit and Waveforms
6
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Copyright © 2000–2009, Texas Instruments Incorporated
Product Folder Link(s): SN65LBC174A SN75LBC174A
SN65LBC174A
SN75LBC174A
www.ti.com
SLLS446F – OCTOBER 2000 – REVISED OCTOBER 2009
PARAMETER MEASUREMENT INFORMATION (continued)
Y
S1
A
3 V or 0 V w
Output
Z
CL = 50 pF‡
RL = 110 Ω
Input
EN
Signal
Generator†
50 Ω
PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, ZO = 50 Ω
Includes probe and jig capacitance
§ 3 V if testing Y output, 0 V if testing Z output
†
‡
3V
1.5 V
Input
0V
tPZH
0.5 V
VOH
2.3 V
0V
Output
tPHZ
Figure 5. Enable Timing Test Circuit and Waveforms, tPZH and tPHZ
Copyright © 2000–2009, Texas Instruments Incorporated
Product Folder Link(s): SN65LBC174A SN75LBC174A
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SN65LBC174A
SN75LBC174A
SLLS446F – OCTOBER 2000 – REVISED OCTOBER 2009
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
5V
RL = 110 Ω
Y
S1
A
0 V or 3 V w
Output
Z
CL = 50 pF‡
Input
EN
Signal
Generator†
50 Ω
PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, ZO = 50 Ω
Includes probe and jig capacitance
§ 3 V if testing Y output, 0 V if testing Z output
†
‡
3V
1.5 V
Input
0V
tPZL
tPLZ
5V
Output
2.3 V
VOL
0.5 V
Figure 6. Enable Timing Test Circuit and Waveforms, tPZL and tPLZ
8
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Product Folder Link(s): SN65LBC174A SN75LBC174A
SN65LBC174A
SN75LBC174A
www.ti.com
SLLS446F – OCTOBER 2000 – REVISED OCTOBER 2009
PARAMETER MEASUREMENT INFORMATION (continued)
Y
IO
VI
Z
VTEST
Voltage Source
VTEST = –7 V to 12 V
Slew Rate ≤ 1.2 V/µs
Figure 7. Test Circuit, Short-Circuit Output Current
Y
Z
100 Ω
VTEST
0V
15 µs
Pulse Generator
15 µs Duration,
1% Duty Cycle
–VTEST
1.5 ms
Figure 8. Test Circuit Waveform, Transient Overvoltage Test
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
Y or Z Output
A or EN Input
VCC
VCC
16 V
20 V
100 kΩ
16 V
1 kΩ
Input
Output
16 V
9V
17 V
16 V
Copyright © 2000–2009, Texas Instruments Incorporated
Product Folder Link(s): SN65LBC174A SN75LBC174A
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SN65LBC174A
SN75LBC174A
SLLS446F – OCTOBER 2000 – REVISED OCTOBER 2009
www.ti.com
TYPICAL CHARACTERISTICS
DIFFERENTIAL OUTPUT VOLTAGE
vs
OUTPUT CURRENT
DIFFERENTIAL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
2.5
3.5
VOD - Differential Output Voltage - V
VOD - Differential Output Voltage - V
4
3
2.5
VCC = 5.25 V
VCC = 5 V
2
1.5
VCC = 4.75 V
1
0.5
0
0
20
40
80
60
VCC = 5.25 V
2
VCC = 5 V
1.5
VCC = 4.75 V
1
0.5
0
-60
100
IO - Output Current - mA
20
40
60
Figure 9.
Figure 10.
PROPAGATION DELAY TIME
vs
FREE-AIR TEMPERATURE
SUPPLY CURRENT (FOUR CHANNELS)
vs
SIGNALING RATE
80
100
144
ICC - Supply Current (Four Channels) - mA
VCC = 5.25 V
7.5
VCC = 4.75 V
7
6.5
6
5.5
RL = 54 W
CL = 50 pF
(Each Channel)
142
140
138
136
134
132
130
128
-20
0
20
40
60
80
1
10
Signaling Rate - Mbps
o
TA - Free- Air Temperature - C
Figure 11.
10
0
TA - Free-Air Temperature - C
8
Propigation Delay Time - ns
-20
o
8.5
5
-40
-40
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100
Figure 12.
Copyright © 2000–2009, Texas Instruments Incorporated
Product Folder Link(s): SN65LBC174A SN75LBC174A
SN65LBC174A
SN75LBC174A
www.ti.com
SLLS446F – OCTOBER 2000 – REVISED OCTOBER 2009
TYPICAL CHARACTERISTICS (continued)
DIFFERENTIAL OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
EYE PATTERN, PSEUDORANDOM DATA AT+ 30 Mbps
3
RL = 54 Ω
CL = 50 pF
VOD - Differential Output Voltage - V
RL = 54 W
2.5
2
1.5
1
0.5
0
0 0.5
1 1.5 2
2.5 3
3.5 4 4.5 5
5.5
6
VCC - Supply Voltage - V
Figure 13.
Figure 14.
Copyright © 2000–2009, Texas Instruments Incorporated
Product Folder Link(s): SN65LBC174A SN75LBC174A
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SN65LBC174A
SN75LBC174A
SLLS446F – OCTOBER 2000 – REVISED OCTOBER 2009
www.ti.com
APPLICATION INFORMATION
TMS320F243
DSP
(Controller)
SN65LBC174A
SN65LBC175A
TMS320F241
DSP
(Embedded
Application)
SPISIMO
SPISIMO
IOPA1
(Enable)
IOPA1
SPISTE
SPISTE
SPICLK
SPICLK
IOPA2
(Enable)
IOPA2
IOPA0
(Handshake
/Status)
IOPA0
SPISOMI
SPISOMI
Figure 15. Typical Application Circuit, DSP-to-DSP Link via Serial Peripheral Interface
REVISION HISTORY
Changes from Original (October 2000) to Revision A
•
Page
Changed multiple items throught the data sheet. ................................................................................................................. 1
Changes from Revision A (February 2001) to Revision B
Page
•
Changed DW Package appearance ..................................................................................................................................... 1
•
Added Figure 13 ................................................................................................................................................................. 11
Changes from Revision B (June 2001) to Revision C
Page
•
Changed Features bullet From: Output ESD Protection Exceeds 13 kV To: Output ESD Protection: 11 kV ...................... 1
•
Changed Features bullet for Industry Standard From: Compatible With SN75174, MC3487, and DS96174 To:
Compatible With SN75174, MC3487, DS96174, LTC487, and MAX3042 ........................................................................... 1
Changes from Revision C (May 2003) to Revision D
Page
•
Changed the AVAILABLE OPTIONS table ........................................................................................................................... 2
•
Changed Electrostatic discharge-Human body model-Y, Z, and GND From: 13kV To: 11kV ............................................. 3
•
Changed the DISSIPATION RATING TABLE ...................................................................................................................... 3
12
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SLLS446F – OCTOBER 2000 – REVISED OCTOBER 2009
Changes from Revision D (June 2008) to Revision E
Page
•
Changed Features bullet From: Output ESD Protection Exceeds 11 kV To: Output ESD Protection: 12 kV ...................... 1
•
Changed Electrostatic discharge-Human body model-Y, Z, and GND From: 11kV To: 12kV ............................................. 3
•
From: A, G, G To: A, EN ....................................................................................................................................................... 4
Changes from Revision E (July 2008) to Revision F
Page
•
Changed FUNCTION TABLE header From: ENABLE G To: ENABLE EN .......................................................................... 2
•
Added CIN - Input Capacitance to the Electrical Characteristics table .................................................................................. 4
•
Changed the location of the EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAM ............................................. 9
Copyright © 2000–2009, Texas Instruments Incorporated
Product Folder Link(s): SN65LBC174A SN75LBC174A
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PACKAGE OPTION ADDENDUM
www.ti.com
13-Aug-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
SN65LBC174A16DW
ACTIVE
SOIC
DW
16
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
65LBC174A
SN65LBC174A16DWR
ACTIVE
SOIC
DW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
65LBC174A
SN65LBC174A16DWRG4
ACTIVE
SOIC
DW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
65LBC174A
SN65LBC174ADW
ACTIVE
SOIC
DW
20
25
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
65LBC174A
SN65LBC174ADWR
ACTIVE
SOIC
DW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
65LBC174A
SN65LBC174AN
ACTIVE
PDIP
N
16
25
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 85
65LBC174A
SN75LBC174A16DW
ACTIVE
SOIC
DW
16
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
75LBC174A
SN75LBC174A16DWR
ACTIVE
SOIC
DW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
75LBC174A
SN75LBC174ADW
ACTIVE
SOIC
DW
20
25
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
75LBC174A
SN75LBC174ADWR
ACTIVE
SOIC
DW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
75LBC174A
SN75LBC174AN
ACTIVE
PDIP
N
16
25
RoHS & Green
NIPDAU
N / A for Pkg Type
0 to 70
75LBC174A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of