SN55LBC180, SN65LBC180, SN75LBC180
SLLS174I – FEBRUARY 1994 – REVISED OCTOBER 2022
Low-Power RS-485 Line Driver and Receiver Pairs
1 Features
2 Description
•
The SN55LBC180, SN65LBC180 and SN75LBC180
differential driver and receiver pairs are monolithic
integrated circuits designed for bidirectional data
communication over long cables that take on
the characteristics of transmission lines. They are
balanced, or differential, voltage mode devices
that meet or exceed the requirements of industry
standards ANSI RS-485 and ISO 8482:1987(E).
These devices are designed using the TI proprietary
LinBiCMOS™ with the low-power consumption of
CMOS and the precision and robustness of bipolar
transistors in the same circuit.
•
•
•
•
•
•
•
•
Designed for high-speed multipoint Data
transmission over long cables
Operate with pulse durations as low as 30 ns
Low supply current: 5 mA maximum
Meet or exceed the requirements of ANSI
standard RS-485 and ISO 8482:1987(E)
3-State outputs for party-line buses
Common-mode voltage range of –7 V to 12 V
Thermal shutdown protection prevents
driver damage from bus contention
Positive and negative output current
limiting
Pin compatible with the SN75ALS180
Package Information
PART NUMBER
SN75LBC180
SN65LBC180
SN55LBC180
(1)
PACKAGE(1)
BODY SIZE (NOM)
N (PDIP)
19.3 mm x 63.5 mm
D (SOIC)
8.65 mm x 3.91 mm
RSA (QFN)
4 mm x 4 mm
RSA (QFN)
4 mm x 4 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
4
DE
9
5
D
Y
10
Z
3
RE
12
2
R
A
11
B
Logic Diagram (positive logic)
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN55LBC180, SN65LBC180, SN75LBC180
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SLLS174I – FEBRUARY 1994 – REVISED OCTOBER 2022
Table of Contents
1 Features............................................................................1
2 Description.......................................................................1
3 Description (Continued)..................................................2
4 Revision History.............................................................. 3
5 Pin Configuration and Functions...................................4
6 Specifications.................................................................. 5
6.1 Absolute Maximum Ratings........................................ 5
6.2 Dissipation Rating Table............................................. 5
6.3 Recommended Operating Conditions.........................5
6.4 Thermal Information Table.......................................... 6
6.5 Driver Section............................................................. 6
6.6 Receiver Section.........................................................7
6.7 Typical Characteristics................................................ 9
7 Parameter Measurement Information.......................... 12
8 Detailed Description......................................................15
8.1 Function Tables.........................................................15
8.2 Schematics of Inputs and Outputs............................ 16
9 Application and Implementation.................................. 17
9.1 Application Information............................................. 17
10 Device and Documentation Support..........................18
10.1 Receiving Notification of Documentation Updates..18
10.2 Support Resources................................................. 18
10.3 Trademarks............................................................. 18
10.4 Electrostatic Discharge Caution..............................18
10.5 Glossary..................................................................18
11 Mechanical, Packaging, and Orderable
Information.................................................................... 18
3 Description (Continued)
The SN55LBC180, SN65LBC180 and SN75LBC180 combine a differential line driver and receiver with 3-state
outputs and operate from a single 5-V supply. The driver and receiver have active-high and active-low enables,
respectively, which can be externally connected to function as a direction control. The driver differential outputs
and the receiver differential inputs are connected to separate terminals for full-duplex operation and are
designed to present minimum loading to the bus whether disabled or powered off (VCC = 0). These parts feature
a wide common-mode voltage range making them suitable for point-to-point or multipoint data-bus applications.
The devices also provide positive and negative output-current limiting and thermal shutdown for protection from
line fault conditions. The line driver shuts down at a junction temperature of approximately 172°C.
The SN75LBC180 is characterized for operation over the commercial temperature range of 0°C to 70°C. The
SN65LBC180 is characterized over the industrial temperature range of –40°C to 85°C.
The SN55LBC180 is characterized for operation over the military temperature range of –55°C to 125°C.
2
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4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision H (June 2022) to Revision I (October 2022)
Page
• Changed RSA (QFN) values in the Thermal Information Table .........................................................................6
Changes from Revision G (April 2009) to Revision H (June 2022)
Page
• Changed the Ordering Information Table to the Package Information table.......................................................1
• Added the Pin Configuration and Functions ...................................................................................................... 4
• Added the Thermal Information Table ................................................................................................................6
• Fixed the typo in the unit for the Receiver enable IIH to change the unit from A to µA....................................... 7
• Updated Figure 6-1, Figure 6-2, and Figure 6-3, limiting the x-axis to a maximum of 70 mA driver output
current.................................................................................................................................................................9
• Updated Figure 9-1 to remove legacy terminology ..........................................................................................17
Changes from Revision F (March 2009) to Revision G (April 2009)
Page
• Added 3 ESD rows to the Absolute Maximum Ratings ......................................................................................5
Changes from Revision E (February 2006) to Revision F (March 2009)
Page
• Changed Differential to RS-485 in the data sheet title........................................................................................1
• Added device number SN55LBC180 .................................................................................................................1
• Changed the word both to these ........................................................................................................................1
• Added the Ordering Information Table................................................................................................................1
• Changed the Description (Continued) section.................................................................................................... 2
• Changed and moved the Function Tables from the front page to the Description (Continued) section..............2
• Deleted condition, moved cross reference......................................................................................................... 5
• Added all symbols in text that were not appearing in the PDF........................................................................... 5
• Deleted TA row from the Absolute Maximum Ratings ........................................................................................5
• Added the last column to Dissipation Rating Table ............................................................................................5
• Added a row to TA in the Recommended Operating Conditions for SN55LBC180............................................ 5
• Added SN55LB180 to the |VOD| row...................................................................................................................6
• Change: moved 5 max values to the min column (-1.5, -50, -100, -0.8, -0.8).................................................... 7
• Added the Switching Characteristics: SN55LBC180 table ................................................................................ 8
• Changed moved schematics to the Typical Characteristics section................................................................. 16
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4
11
B
R
2
D
5
10
Z
RE
3
DE
4
GND
6
9
Y
GND
7
8
NC
V
CC
DE
13
1
Thermal
Pad
8
NC
NC
A
V
CC
12
14
3
7
RE
GND
V
CC
NC
13
15
2
6
R
GND
V
CC
NC
14
5
1
D
NC
16
5 Pin Configuration and Functions
12
A
11
B
10
Z
9
Y
Not to scale
Not to scale
Figure 5-1. D OR N Package (SOIC)
(Top View)
Figure 5-2. RSA Package (QFN)
(Top View)
Table 5-1. Pin Functions
PIN NAME
TYPE(1)
DESCRIPTION
D Or N
RSA
NC
1
1
NC
R
2
2
O
Receiver output
RE
3
3
I
Receiver enable input. Active low.
DE
4
4
I
Driver enable input. Active high
D
5
5
I
Driver input pin
6, 7
6, 7
G
Ground connection. Pins 6 and 7 are connected together internally.
8
8
NC
GND
NC
No internal connection
No internal connection
Y
9
9
O
Bus output port (complementary to Z)
Z
10
10
O
Bus output port (complementary to Y)
B
11
11
I
Bus input port (complementary to A)
A
12
12
I
Bus input port (complementary to B)
VCC
13, 14
13, 14
P
Supply input pins. Pins 13 and 14 are connected together internally.
NC
N/A
15, 16
NC
(1)
4
PIN NO
No internal connection
Signal Types: I = Input, O = Output, P= Power input,
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6 Specifications
6.1 Absolute Maximum Ratings
See note (1)
UNIT
Supply voltage range (2)
VCC
VBUS
Bus voltage range (A, B, Y,
V
–10 to 15
V
–0.3 to VCC + 0.5
V
Z)(2)
Voltage range at D, R, DE, RE (2)
Continuous total power
–0.3 to 7
dissipation(3)
Internally limited
Total power dissipation
See Dissipation Rating Table
Tstg
Storage temperature range
–65 to 150
°C
IO
Receiver output current range
–50 to 50
mA
HBM (Human Body Model) EIA/JESD22-A114
±4
kV
ESD
Electrostatic discharge
MM (Machine Model) EIA/JESD22-A115
400
V
CDM (Charge Device Model) EIA/JESD22-C101
1.5
kV
(1)
(2)
(3)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to GND.
The maximum operating junction temperature is internally limited. Use the dissipation rating table to operate below this temperature.
6.2 Dissipation Rating Table
(1)
PACKAGE(1)
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
D
950 mW
7.6 mW/°C
608 mW
494 mW
—
N
1150 mW
9.2 mW/°C
736 mW
598 mW
—
RSA
3333 mW
26.67 mW/°C
2133 mW
1733 mW
400 mW
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
6.3 Recommended Operating Conditions
MIN
NOM
MAX
UNIT
4.75
5
5.25
V
VCC
Supply voltage
VIH
High-level input voltage
D, DE, and RE
VIL
Low-level input voltage
D, DE, and RE
VID
Differential input voltage
–6(1)
Voltage at any bus terminal (separately or common mode)
–7(1)
VO, VI, or VIC
IOH
High-level output current
IOL
Low-level output current
TA
(1)
Operating free-air temperature
A, B, Y, or Z
2
Y or Z
V
0.8
V
6
V
12
V
–60
R
–8
Y or Z
60
R
8
SN55LBC180
–55
125
SN65LBC180
–40
85
SN75LBC180
0
70
mA
mA
°C
The algebraic convention where the least positive (more negative) limit is designated minimum, is used in this data sheet for the
differential input voltage, voltage at any bus terminal, operating temperature, input threshold voltage, and common-mode output
voltage.
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6.4 Thermal Information Table
THERMAL METRIC(1)
D (SOIC)
N (PDIP)
RSA (QFN)
14 Pins
14 Pins
16 Pins
UNIT
R θJA
Junction-to-ambient thermal resistance
93.2
53.4
38.7
°C/W
R θJC(top)
Junction-to-case (top) thermal resistance
47.5
40.0
35.6
°C/W
R θJB
Junction-to-board thermal resistance
49.4
33.2
17.5
°C/W
ψ JT
Junction-to-top characterization parameter
11.2
19.0
1.1
°C/W
ψ JB
Junction-to-board characterization parameter
48.9
32.9
17.5
°C/W
R θJC(bot)
Junction-to-case (bottom) thermal resistance
n/a
n/a
7.9
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application
report.
6.5 Driver Section
6.5.1 Electrical Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER
VIK
Input clamp voltage
II = -18 mA
RL = 54 Ω,
See Figure 7-1
| VOD |
Differential output voltage magnitude(2)
RL = 60 Ω,
See Figure 7-2
Δ| VOD | Change in magnitude of differential output voltage(3)
VOC
MAX
UNIT
–1.5
V
SN55LBC180
1
2.5
5
SN65LBC180
1.1
2.5
5
SN75LBC180
1.5
2.5
5
SN55LBC180
1
2.5
5
SN65LBC180
1.1
2
5
SN75LBC180
1.5
2
See Figure 7-1 and Figure 7-2
Common-mode output voltage
1
2.5
V
5
±0.2
V
3
V
±0.2
V
±100
μA
±100
μA
Change in magnitude of common-mode output
Δ| VOC |
voltage(3)
RL = 54 Ω,
See Figure 7-1
IO
Output current with power off
VCC = 0,
VO = –7 V to 12 V
IOZ
High-impedance-state output current
VO = –7 V to 12 V
IIH
High-level input current
VI = 2.4 V
100
μA
IIL
Low-level input current
VI = 0.4 V
100
μA
IOS
Short-circuit output current
–7 V ≤ VO ≤ 12 V
±250
mA
ICC
(1)
(2)
(3)
6
MIN TYP(1)
TEST CONDITIONS
Supply current
Receiver disabled
Outputs enabled
5
Outputs disabled
3
mA
All typical values are at VCC = 5 V and TA = 25°C.
The minimum VOD specification may not fully comply with ANSI RS-485 at operating temperatures below 0°C. System designers
should take the possibly lower output signal into account in determining the maximum signal-transmission distance.
Δ|VOD| and Δ|VOC| are the changes in the steady-state magnitude of VOD and VOC, respectively, that occur when the input is changed
from a high level to a low level.
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6.5.2 Switching Characteristics
VCC = 5 V, TA = 25°C
PARAMETER
td(OD)
Differential output delay time
tt(OD)
Differential output transition time
tPZH
TEST CONDITIONS
MIN
TYP
MAX
7
12
18
UNIT
ns
5
10
RL = 54 Ω,
See Figure 7-3
20
ns
Output enable time to high level
RL = 110 Ω,
See Figure 7-4
35
ns
tPZL
Output enable time to low level
RL = 110 Ω,
See Figure 7-5
35
ns
tPHZ
Output disable time from high level
RL = 110 Ω,
See Figure 7-4
50
ns
tPLZ
Output disable time from low level
RL = 110 Ω,
See Figure 7-5
35
ns
6.5.3 Switching Characteristics: SN55LBC180
VCC = 5 V, TA = 25°C
PARAMETER
td(OD)
Differential output delay time
tt(OD)
Differential output transition time
tPZH
Output enable time to high level
tPHZ
Output disable time from high level
tPZL
Output enable time to low level
tPLZ
Output disable time from low level
TEST CONDITIONS
RL = 54 Ω,
See Figure 7-3
RL = 110 Ω,
See Figure 7-4
RL = 110 Ω,
See Figure 7-5
MIN
TYP
MAX
UNIT
15
ns
21
ns
32
ns
55
32
ns
20
6.6 Receiver Section
6.6.1 Electrical Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
VIT+
Positive-going input threshold voltage
IO = –8 mA
VIT–
Negative-going input threshold voltage
IO = 8 mA
–0.2
Vhys
Hysteresis voltage (VIT+ – VIT–)
VIK
Enable-input clamp voltage
II = –18 mA
-1.5
VOH
High-level output voltage
VID = 200 mV,
IOH = –8 mA
VOL
Low-level output voltage
VID = –200 mV,
IOL = 8 mA
IOZ
High-impedance-state output current
VO = 0 V to VCC
IIH
High-level enable-input current
VIH = 2.4 V
IIL
Low-level enable-input current
VIL = 0.4 V
II
ICC
Bus input current
Supply current
TYP
MAX
0.2
mV
V
4.5
0.3
V
0.5
V
±20
μA
–50
µA
–100
μA
VI = 12 V, VCC = 5 V,
Other input at 0 V
VI = 12 V, VCC = 0 V,
Other input at 0 V
VI = -7 V, VCC = 5 V,
Other input at 0 V
–0.8
-0.5
VI = -7 V, VCC = 0 V,
Other input at 0 V
–0.8
–0.5
Driver disabled
0.7
1
0.8
1
Outputs enabled
5
Outputs disabled
3
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V
V
45
3.5
UNIT
mA
mA
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6.6.2 Switching Characteristics
VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
tPHL
Propagation delay time, high- to low-level output
tPLH
Propagation delay time, low- to high-level output
tsk(p)
Pulse skew (| tPHL – tPLH|)
tt
Transition time
tPZH
Output enable time to high level
tPZL
Output enable time to low level
tPHZ
Output disable time from high level
tPLZ
Output disable time from low level
VID = –1.5 V to 1.5 V,
See Figure 7-6
MIN
TYP
MAX
11
22
33
ns
11
22
33
ns
3
6
ns
5
See Figure 7-7
UNIT
8
ns
35
ns
30
ns
35
ns
30
ns
6.6.3 Switching Characteristics: SN55LBC180
VCC = 5 V, TA = 25°C
PARAMETER
8
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tPHL
Propagation delay time, high- to low-level output
26
ns
tPLH
Propagation delay time, low- to high-level output
23
ns
tsk(p)
Pulse skew (| tPHL – tPLH|)
3
ns
tsk(p)t
Transition time
4
ns
tPZH
Output enable time to high level
30
ns
tPHZ
Output disable time from high level
26
ns
tPZL
Output enable time to low level
30
ns
tPLZ
Output disable time from low level
30
ns
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VID = –1.5 V to 1.5 V,
See Figure 7-6
See Figure 7-4
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6.7 Typical Characteristics
5
5
VCC = 5 V
TA = 25 C
4
3.5
3
2.5
2
1.5
1
0.5
4
3.5
3
2.5
2
1.5
1
0.5
0
0
0
10
20
30
40
50
60
IOH - High-Level Ouptut Current - mA
70
80
Figure 6-1. Driver High-Level Output Voltage vs
High-Level Output Current
0
20
40
60
IOL - Low-Level Output Current - mA
80
Figure 6-2. Driver Low-Level Output Voltage vs
Low-Level Output Current
4
2.4
3.5
2.3
VCC = 5V
TA = 25 C
VOD - Driver Output Voltage - V
VOD - Differential Output Voltage - V
VCC = 5 V
TA = 25 C
4.5
VOL - Low-Level Output Voltage - V
VOH - High-Level Output Voltage - V
4.5
3
2.5
2
1.5
1
0.5
2.2
2.1
2
1.9
1.8
1.7
1.6
0
0
10
20
30
40
50
60
IO - Output Current - mA
70
Figure 6-3. Driver Differential Output Voltage vs
Output Current
80
1.5
-60
-40
-20
0
20 40 60 80 100 120
TA - Ambient Temperature - °C
Figure 6-4. Driver Differential Output Voltage vs
Free-Air Temperature
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80
20
60
18
IOL
40
16
I O − Output Current − mA
Driver Output Voltage - ns
RL = 54 Ω
14
12
10
8
20
0
−20
−40
IOH
−60
6
-60
−80
-40
0
-20
0
20 40 60 80 100 120
TA - Ambient Temperature - °C
3
4
5
6
Figure 6-6. Driver Output Current vs
Supply Voltage
6
1
VID = 200 mV
VCC = 5 V
TA = 25°C
VID = − 200 mV
0.9
5
VOL − Low-Level Output Voltage − V
VOH − High-Level Output Voltage − V
2
VCC − Supply Voltage − V
Figure 6-5. Driver Differential Delay Times vs
Free-Air Temperature
4
3
2
1
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
0
− 40
−10
− 20
− 30
IOH − High-Level Output Current − mA
− 50
Figure 6-7. Receiver High-Level Output Voltage vs
High-Level Output Current
10
1
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0
15
20
25
35
5
10
30
IOL − Low-Level Output Current − mA
40
Figure 6-8. Receiver Low-Level Output Voltage vs
Low-Level Output Current
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60
I CC − Average Supply Current − mA
6
VO − Output Voltage − V
5
VIC = 12 V
4
VIC = 0 V
3
2
VIC = −7 V
1
55
50
45
TA = 25°C
VCC = 5 V
DRVR and RCVR Enabled
Driver Load = Receiver Inputs
Receiver Load = 50 pF
40
35
30
25
20
15
10
5
0
− 80 − 60
− 40
− 20
0
20
40
60
0
10 k
80
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
100 k
VID − Differential Input Voltage − mV
Figure 6-9. Receiver Output Voltage vs
Differential Input Voltage
0.8
I I − Bus Input Current − mA
0.6
0.4
0.2
0
− 0.2
− 0.4
− 0.6
− 0.8
−1
−8
30
TA = 25°C
VCC = 5 V
The shaded region of this graph represents
more than 1 unit load per RS-485.
−6 −4
−2
0
2
4
6
8
10
12
VI − Input Voltage − V
Figure 6-11. Receiver Bus Input Current vs Input
Voltage (Complementary Input at 0 V)
100 M
Figure 6-10. Average Supply Current vs Frequency
29
28
Receiver Output Delay - ns
1
1M
10 M
f − Frequency − Hz
27
26
25
24
23
22
21
20
-60
-40
-20
0
20 40 60 80 100 120
TA - Ambient Temperature - °C
Figure 6-12. Receiver Propagation DELAY Tl vs
Free-Air Temperature
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7 Parameter Measurement Information
Y
RL
2
D
VOD
0 V or 3 V
RL
2
DE at 3 V
VOC
Z
Figure 7-1. Differential and Common-Mode Output Voltages
Vtest
–7 V < Vtest < 12 V
R1
375 Ω
Y
D
RL = 60 Ω
0 V or 3 V
VOD
Z
DE at 3 V
R2
375 Ω
Vtest
Figure 7-2. Driver VOD Test Circuit
3V
Input
1.5 V
Y
CL = 50 pF
(see Note B)
Generator
(see Note A)
RL = 54 Ω
1.5 V
0V
td(OD)
≈ 2.5 V
td(OD)
Output
Output
50 Ω
90%
50%
10%
90%
50%
10%
Z
DE at 3 V
tt(OD)
TEST CIRCUIT
≈ – 2.5 V
tt(OD)
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR > 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 7-3. Driver Test Circuit and Differential Output Delay and Transition Time Voltage Waveforms
Y
0 V or 3 V
Generator
(see Note A)
D
3V
S1
Z
Input
50 Ω
DE
Output
Input
1.5 V
1.5 V
0V
tPZH
CL = 50 pF
(see Note B)
0.5 V
RL = 110 Ω
VOH
Output
2.3 V
Voff ≈ 0
tPHZ
TEST CIRCUIT
VOLTAGE WAVEFORMS
Figure 7-4. Driver Test Circuit and Enable and Disable Time Waveforms
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5V
Y
D
0 V or 3 V
Generator
(see Note A)
RL = 110 Ω
S1
Input
Input
1.5 V
0V
Output
Z
DE
3V
1.5 V
tPZL
CL = 50 pF
(see Note B)
tPLZ
5V
0.5 V
50 Ω
2.3 V
Output
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
Figure 7-5. Driver Test Circuit and Enable and Disable Time Voltage Waveforms
3V
Input
Input
Generator
(see Note A)
1.5 V
1.5 V
A
R
50 Ω
B
1.5 V
tPLH
Output
RE
CL = 15 pF
(see Note B)
0V
0V
Output
tPHL
90%
1.3 V
10%
tt
TEST CIRCUIT
VOH
90%
1.3 V
10%
VOL
tt
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 7-6. Receiver Test Circuit and Propagation Delay Time Voltage Waveforms
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Output
S1
1.5 V
A
R
− 1.5 V
2 kΩ
S2
5V
B
CL = 15 pF
(see Note B)
RE
IN916 or Equivalent
(4 places)
5 kΩ
Input
Generator
(see Note A)
50 Ω
S3
TEST CIRCUIT
3V
Input
1.5 V
S1 to − 1.5 V
S2 Closed
1.5 V S3 Open
3V
S1 to 1.5 V
S2 Open
S3 Closed
Input
0V
0V
tPZH
tPZL
VOH
Output
1.5 V
0V
≈ 4.5 V
Output
1.5 V
VOL
3V
Input
1.5 V
S1 to 1.5 V
S2 Closed
S3 Closed
3V
Input
1.5 V
S1 to − 1.5 V
S2 Closed
S3 Closed
0V
0V
tPHZ
tPLZ
VOH
≈ 1.3 V
Output
Output
0.5 V
≈ 1.3 V
0.5 V
VOL
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 7-7. Receiver Output Enable and Disable Times
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8 Detailed Description
8.1 Function Tables
Table 8-1. DRIVER
(1)
OUTPUTS
INPUT
D(1)
ENABLE
DE
Y
H
H
H
L
L
H
L
H
X
L
Z
Z
Z
H = high level, L = low level, ? = Indeterminate, X = irrelevant,
Z = high impedance (off)
Table 8-2. RECEIVER
OUTPUT
R
DIFFERENTIAL INPUTS
A–B
ENABLE
RE
VID ≥ 0.2 V
L
H
–0.2 V < VID < 0.2 V
L
?
VID ≤ –0.2 V
L
L
X
H
Z
Open circuit
L
H
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Y
Z
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8.2 Schematics of Inputs and Outputs
EQUIVALENT OF D, DE, AND RE INPUTS
RECEIVER A INPUT
VCC
VCC
100 kΩ
NOM
18 kΩ
NOM
22 kΩ
3 kΩ
NOM
Input
Input
12 kΩ
1.1 kΩ
NOM
DRIVER OUTPUT
RECEIVER B INPUT
VCC
18 kΩ
NOM
TYPICAL OF RECEIVER OUTPUT
VCC
VCC
3 kΩ
NOM
Input
R Output
Output
100 kΩ
NOM
16
12 kΩ
1.1 kΩ
NOM
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
ddd
1
ddd
2
ddd
3
ddd
4
Figure 9-1. Full Duplex Application Circuit
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10 Device and Documentation Support
10.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
10.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
10.3 Trademarks
LinBiCMOS™ is a trademark of Texas Instruments.
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
10.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
10.5 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
11 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
18
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PACKAGE OPTION ADDENDUM
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18-Nov-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN55LBC180RSAR
ACTIVE
QFN
RSA
16
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-55 to 125
SN55
LBC180
SN55LBC180RSAT
LIFEBUY
QFN
RSA
16
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-55 to 125
SN55
LBC180
SN65LBC180D
NRND
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
6LB180
SN65LBC180DR
ACTIVE
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
6LB180
Samples
SN65LBC180DRG4
ACTIVE
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
6LB180
Samples
SN65LBC180N
ACTIVE
PDIP
N
14
25
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 85
SN65LBC180N
Samples
SN65LBC180RSAR
ACTIVE
QFN
RSA
16
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BL180
Samples
SN65LBC180RSAT
LIFEBUY
QFN
RSA
16
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BL180
SN75LBC180D
NRND
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
7LB180
SN75LBC180DG4
NRND
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
7LB180
SN75LBC180DR
NRND
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
7LB180
SN75LBC180DRG4
NRND
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
7LB180
SN75LBC180N
ACTIVE
PDIP
N
14
25
RoHS & Green
NIPDAU
N / A for Pkg Type
0 to 70
SN75LBC180N
SN75LBC180RSAT
LIFEBUY
QFN
RSA
16
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
0 to 70
LB180
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of