SN761645
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SLES262 – SEPTEMBER 2010
DIGITAL TV TUNER IC
Check for Samples: SN761645
FEATURES
1
•
•
•
•
•
•
•
•
•
•
•
•
•
Integrated Mixer/Oscillator/PLL and IF GCA
VHF-L, VHF-H, UHF 3-Band Local Oscillator
RF AGC Detector Circuit
I2C Bus Protocol
Seven-Step Charge Pump Current
Four NPN Emitter-Follower Type Band Switch
Drivers
One Auxiliary Port/5-Level ADC
Programmable Reference Divider Ratio
Crystal Oscillator 4-MHz/16-MHz Support
Selectable Digital IFOUT and Analog IFOUT
Standby Mode
5-V Power Supply
38-Pin TSSOP Package
APPLICATIONS
•
•
•
Digital TV
Digital CATV
Set-Top Box
DBT PACKAGE
(TOP VIEW)
VLO OSC
VHI OSC
UHF OSC1
UHF OSC2
OSC GND
CP
VTU
IF GND
AIF OUT
DIF OUT1
DIF OUT2
P5/ADC
VCC
IF GCA IN1
IF GCA IN2
IF GCA CTRL
IF GCA GND
IF GCA OUT2
IF GCA OUT1
1
38
2
37
3
36
4
35
5
34
6
33
7
32
8
31
9
30
10
29
11
28
12
27
13
26
14
25
15
24
16
23
17
22
18
21
19
20
BS4
UHF RFIN1
UHF RFIN2
VHI RFIN
VLO RFIN
RF GND
MIXOUT2
MIXOUT1
IFIN
BUS GND
RF AGC OUT
BS3
BS2
BS1
SDA
SCL
AS
XTAL2
XTAL1
DESCRIPTION
The SN761645 is a low-phase-noise synthesized tuner IC designed for digital TV tuning systems. The circuit
consists of a PLL synthesizer, three-band local oscillator and mixer, RF AGC detector circuit, and IF gain
controlled amplifier, and is available in a small outline package.
ORDERING INFORMATION
For the most current package and ordering information, see the Package Option Addendum at the end of this
document, or see the TI web site at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
SN761645
SLES262 – SEPTEMBER 2010
www.ti.com
FUNCTIONAL BLOCK DIAGRAM
IF IN
MIXOUT 1
MIXOUT 2
UHF OSC 2
UHF OSC 1
VHI OSC
OSC GND
VLO OSC
IF AMP
DIFOUT1
VHF-L
OSC
VHF-H
OSC
UHF
OSC
DIFOUT 2
AIFOUT
IF GND
VLO RF IN
VHF-H
MIXER
VHF-L
MIXER
UHF
MIXER
VHI RF IN
UHF RF IN 1
UHF RF IN 2
RF AGC OUT
RF AGC
DETECT
RF GND
PROGRAMMABLE
DIVIDER
CP
VTU
XTAL 1
XTAL 2
XTAL
OSC
1/1,1/4
DIV
REFERENCE
DIVIDER
PHASE
DETECTOR
CHARGE
PUMP
OP
AMP
VCC
NPN SWITCH
PORT
SCL
SDA
I2C BUS
INTERFACE
IF
GCA
AS
BUS GND
IF GCA OUT2
IF GCA GND
5-LEVEL
ADC
IF GCA CTRL
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IF GCA IN2
IF GCA IN1
BS 1
BS 2
BS 3
BS 4
P5/ADC
2
IF GCA OUT1
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SN761645
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SLES262 – SEPTEMBER 2010
TERMINAL FUNCTIONS
TERMINAL
NAME
DESCRIPTION
NO.
SCHEMATIC
AIF OUT
9
IF amplifier output (unbalanced)
Figure 1
AS
22
Address selection input (open or connection to GND)
Figure 2
BS1
25
Band-switch 1 output (emitter follower)
Figure 3
BS2
26
Band-switch 2 output (emitter follower)
Figure 3
BS3
27
Band-switch 3 output (emitter follower)
Figure 3
BS4
38
Band-switch 4 output (emitter follower)
Figure 3
BUS GND
29
BUS ground
CP
6
Charge pump output
Figure 4
DIF OUT1
10
IF amplifier balance output 1
Figure 5
DIF OUT2
11
IF amplifier balance output 2
Figure 5
IF GCA CTRL
16
IF GCA control voltage input
Figure 6
IF GCA GND
17
IF GCA ground
IF GCA IN1
14
IF GCA input 1
Figure 7
IF GCA IN2
15
IF GCA input 2
Figure 7
IF GCA OUT1
19
IF GCA output 1
Figure 8
IF GCA OUT2
18
IF GCA output 2
Figure 8
IF GND
8
IF ground
IF IN
30
IF amplifier input
Figure 9
MIX OUT1
31
Mixer output 1
Figure 10
MIX OUT2
32
Mixer output 2
Figure 10
OSC GND
5
Oscillator ground
P5/ADC
12
Port-5 output/ADC input
Figure 11
RF AGC OUT
28
RF AGC output
Figure 12
RF GND
33
RF ground
SCL
23
Serial clock input
Figure 13
SDA
24
Serial data input/output
Figure 14
UHF OSC1
3
UHF oscillator 1
Figure 15
UHF OSC2
4
UHF oscillator 2
Figure 15
UHF RF IN1
37
UHF RF input 1
Figure 16
UHF RF IN2
36
UHF RF input 2
Figure 16
VCC
13
Supply voltage
VHI OSC
2
VHF HIGH oscillator
Figure 17
VHI RF IN
35
VHF HIGH RF input
Figure 18
VLO OSC
1
VHF LOW oscillator
Figure 19
VLO RF IN
34
VHF LOW RF input
Figure 20
VTU
7
Tuning voltage amplifier output
Figure 21
XTAL1
20
Crystal oscillator
Figure 22
XTAL2
21
Crystal oscillator
Figure 22
10 W
22
9
Figure 1. AIF OUT
Figure 2. AS
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SN761645
SLES262 – SEPTEMBER 2010
www.ti.com
10 W
25 W
25
6
26
25 W
27
50 kW
38
Figure 3. BS1, BS2, BS3, BS4
Figure 4. CP
500 W
16
10 W
100 kW
10
11
Figure 5. DIF OUT1, DIF OUT2
Figure 6. IF GCA CTRL
Vbias
1 kW
1 kW
15
14
15 W
18
19
Figure 7. IF GCA IN1, IF GCA IN2
2 kW
25 W
A
Figure 8. IF GCA OUT1, IF GCA OUT2
25 W
1 kW
32
31
25 W
A
30
25 W
1 kW
1 kW
Figure 9. IF IN
12
25 W
Figure 10. MIXOUT1, MIXOUT2
50 W
25 W
Figure 11. P5/ADC
4
28
Figure 12. RF AGC OUT
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SLES262 – SEPTEMBER 2010
23
1 kW
25 W
24
Figure 13. SCL
1 kW
Figure 14. SDA
Vref1
Vref2
37
36
3 kW
3
4
Figure 15. UHF OSC 1, UHF OSC 2
Figure 16. UHF RF IN1, UHF RF IN2
Vref2
Vref1
35
3 kW
2
Figure 17. VHI OSC
Figure 18. VHI RF IN
Vref2
Vref1
34
3 kW
1
Figure 19. VLO OSC
Figure 20. VLO RF IN
7
21
20
20 W
10 W
50 kW
Figure 21. VTU
Figure 22. XTAL1, XTAL2
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SN761645
SLES262 – SEPTEMBER 2010
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ABSOLUTE MAXIMUM RATINGS (1)
over recommended operating free-air temperature range (unless otherwise noted)
MIN
MAX
Supply voltage range
(2)
VCC
–0.4
6.5
V
VGND
Input voltage range 1
(2)
RF GND, OSC GND, BUS GND
–0.4
0.4
V
VTU
Input voltage range 2
(2)
VTU
–0.4
35
V
VIN
Input voltage range 3
(2)
Other pins
–0.4
6.5
PD
Continuous total dissipation
TA
Operating free-air temperature range
–20
85
°C
Tstg
Storage temperature range
–65
150
°C
TJ
Maximum junction temperature
150
°C
tSC(max
Maximum short-circuit time
10
s
VCC
(3)
)
(1)
(2)
(3)
TA ≤ 25°C
1277
Each pin to VCC or to GND
UNIT
V
mW
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Voltage values are with respect to the IF GND of the circuit.
Derating factor is 10.2 mW/°C for TA > 25°C.
RECOMMENDED OPERATING CONDITIONS
VCC
Supply voltage
VCC
VTU
Tuning supply voltage
VTU
IBS
Output current of band switch
BS1 to BS4, one band switch on
IP5
Output current of port 5
P5
TA
Operating free-air temperature
MIN
NOM
MAX
4.5
5
5.3
30
33
V
10
mA
–5
mA
85
°C
–20
UNIT
V
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
IF IN1, MIX OUT 1, and MIX OUT 2 (pins 30, 31, and 32, respectively) withstand 1.5 kV, and all other pins
withstand 2 kV, according to the Human-Body Model (1.5 kΩ, 100 pF).
6
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ELECTRICAL CHARACTERISTICS
Total Device and Serial Interface
VCC = 4.5 V to 5.3 V, TA = –20°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ICC1
Supply current 1
BS[1:4] = 0100, IFGCA disabled
90
mA
ICC2
Supply current 2
BS[1:4] = 0100, IFGCA enabled
110
mA
ICC-STBY
Standby supply current
BS[1:4] = 1100
9
mA
VIH
High-level input voltage (SCL, SDA)
VIL
Low-level input voltage (SCL, SDA)
1.05
V
IIH
High-level input current (SCL, SDA)
10
µA
IIL
Low-level input current (SCL, SDA)
–10
VPOR
Power-on-reset supply voltage (threshold of supply
voltage between reset and operation mode)
2.1
2.3
V
µA
2.8
3.5
V
I2C Interface
VADC
ADC input voltage
See Table 11
IADH
ADC high-level input current
VADC = VCC
0
IADL
ADC low-level input current
VADC = 0 V
VOL
Low-level output voltage (SDA)
VCC = 5 V, IOL = 3 mA
0.4
V
lSDAH
High-level output leakage current (SDA)
VSDA = 5.3 V
10
µA
fSCL
Clock frequency (SCL)
V
10
µA
400
kHz
tHD-DAT
Data hold time
3.45
µs
tBUF
Bus free time
1.3
µs
tHD-STA
Start hold time
0.6
µs
tLOW
SCL-low hold time
1.3
µs
tHIGH
SCL-high hold time
0.6
µs
tSU-STA
Start setup time
0.6
µs
tSU-DAT
Data setup time
0.1
tr
Rise time (SCL, SDA )
tf
Fall time (SCL, SDA)
tSU-STO
Stop setup time
–10
µA
100
See Figure 23
VCC
0
µs
1
µs
0.3
µs
0.6
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7
SN761645
SLES262 – SEPTEMBER 2010
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PLL and Band Switch
VCC = 4.5 V to 5.3 V, TA = –20°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
N
Divider ratio
15-bit frequency word
512
fXTAL
Crystal oscillator frequency
RXTAL = 25 Ω to 300 Ω
4
ZXTAL
Crystal oscillator input impedance
4-MHz crystal, VCC = 5 V, TA = 25°C
2
VVTUL
Tuning amplifier low-level output voltage
RL = 20 kΩ, VTU = 33 V
IVTUOFF
Tuning amplifier leakage current
Tuning amplifier = off, VTU = 33 V
0.2
0.45
ICP000
CP[2:0] = 000
ICP001
CP[2:0] = 001
70
ICP010
CP[2:0] = 010
140
ICP011
Charge-pump current
CP[2:0] = 011
210
CP[2:0] = 100
280
ICP101
CP[2:0] = 101
350
CP[2:0] = 110
420
VCP
Charge-pump output voltage
PLL locked
1.95
ICPOFF
Charge-pump leakage current
VCP = 2 V, TA = 25°C
IBS
Band switch driver output current (BS1–BS4)
VBS1
Band switch driver output voltage (BS1–BS4)
VBS2
IBSOFF
Band switch driver leakage current (BS1–BS4)
IP5
Band switch port sink current (P5/ADC)
VP5ON
Band switch port output voltage (P5/ADC)
UNIT
16
MHz
kΩ
0.6
V
10
µA
35
ICP100
ICP110
MAX
32767
–15
IBS = 10 mA
2.9
IBS = 10 mA, VCC = 5 V, TA = 25°C
3.4
µA
V
15
nA
10
mA
V
3.6
VBS = 0 V
8
–5
µA
mA
IP5 = –2 mA, VCC = 5 V, TA = 25°C
0.6
V
RF AGC (1)
VCC = 5 V, TA = 25°C, measured in Figure 24 reference measurement circuit at 50-Ω system, IF = 36.15 MHz (unless
otherwise noted)
PARAMETER
IOAGC0
TEST CONDITIONS
RF AGC output source current
IOAGC1
MIN
ATC = 0
TYP
µA
ATC = 1
9
RF AGC peak sink current
ATC = 0
100
VOAGCH
RFAGCOUT output high voltage (max level)
ATC = 1
VOAGCL
RFAGCOUT output low voltage (min level)
ATC = 1
4.2
0.3
VAGCSP00
ATP[2:0] = 000
114
VAGCSP01
ATP[2:0] = 001
112
VAGCSP02
ATP[2:0] = 010
110
VAGCSP03
ATP[2:0] = 011
108
VAGCSP04
ATP[2:0] = 100
106
VAGCSP05
ATP[2:0] = 101
104
VAGCSP06
ATP[2:0] = 110
102
(1)
8
Start-point IF output level
AISL = 0
UNIT
nA
IOAGCSINK
3.7
MAX
300
µA
4.7
V
V
dBµV
When AISL = 1, RF AGC function is not available at VHF-L band.
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Mixer, Oscillator, IF Amplifier (DIF OUT)
VCC = 5 V, TA = 25°C, measured in Figure 24 reference measurement circuit at 50-Ω system, IF = 36.15 MHz (unless
otherwise noted)
PARAMETER
GC1D
GC3D
GC4D
GC6D
GC7D
GC9D
NF1D
NF3D
NF4D
NF6D
NF7D
NF9D
CM1D
CM3D
CM4D
CM6D
CM7D
CM9D
VIFO1D
VIFO3D
VIFO4D
VIFO6D
VIFO7D
VIFO9D
ΦPLVL1D
ΦPLVL3D
ΦPLVL4D
ΦPLVL6D
ΦPLVL7D
ΦPLVL9D
(1)
(2)
(3)
(4)
TEST CONDITIONS
Conversion gain (mixer - IF amplifier), VHF-LOW
Conversion gain (mixer - IF amplifier), VHF-HIGH
Conversion gain (mixer - IF amplifier), UHF
Noise figure, VHF-LOW
Noise figure, VHF-HIGH
Noise figure, UHF
MIN
TYP
MAX
UNIT
fIN = 50.85 MHz (1)
35
dB
fIN = 149.85 MHz (1)
35
dB
(1)
35
dB
fIN = 425.85 MHz (1)
35
dB
fIN = 433.85 MHz (1)
35
dB
fIN = 857.85 MHz (1)
35
dB
fIN = 50.85 MHz
9
dB
fIN = 149.85 MHz
9
dB
fIN = 156.85 MHz
9
dB
fIN = 425.85 MHz
10
dB
fIN = 433.85 MHz
10
dB
fIN = 857.85 MHz
11
dB
fIN = 156.85 MHz
(2)
Input voltage causing 1% cross modulation distortion,
VHF-LOW
fIN = 50.85 MHz
92
dBµV
fIN = 149.85 MHz (2)
92
dBµV
Input voltage causing 1% cross modulation distortion,
VHF-HIGH
fIN = 156.85 MHz (2)
92
dBµV
fIN = 425.85 MHz (2)
92
dBµV
(2)
92
dBµV
fIN = 857.85 MHz (2)
92
dBµV
fIN = 50.85 MHz
117
dBµV
fIN = 149.85 MHz
117
dBµV
fIN = 156.85 MHz
117
dBµV
fIN = 425.85 MHz
117
dBµV
fIN = 433.85 MHz
117
dBµV
fIN = 857.85 MHz
117
dBµV
fIN = 50.85 MHz (3)
-92
dBc/Hz
fIN = 149.85 MHz (4)
-91
dBc/Hz
(3)
-86
dBc/Hz
fIN = 425.85 MHz (4)
-83
dBc/Hz
fIN = 433.85 MHz (3)
-79
dBc/Hz
(4)
-77
dBc/Hz
Input voltage causing 1% cross modulation distortion, UHF
IF output voltage, VHF-LOW
IF output voltage, VHF-HIGH
IF output voltage, UHF
Phase noise, VHF-LOW
Phase noise, VHF-HIGH
Phase noise, UHF
fIN = 433.85 MHz
fIN = 156.85 MHz
fIN = 857.85 MHz
RF input level = 70 dBµV, differential output
fundes = fdes ± 7 MHz, Pin = 70 dBµV, AM 1 kHz, 30%, DES/CM = S/I = 46 dB
Offset = 1 kHz, CP current = 70 µA, reference divider = 24
Offset = 1 kHz, CP current = 420 µA, reference divider = 24
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Mixer, Oscillator, IF Amplifier (AIF OUT)
VCC = 5 V, TA = 25°C, measured in Figure 24 reference measurement circuit at 50-Ω system, IF = 36.15 MHz (unless
otherwise noted)
PARAMETER
GC1A
Conversion gain (mixer - IF amplifier), VHF-LOW
GC3A
GC4A
Conversion gain (mixer - IF amplifier), VHF-HIGH
GC6A
GC7A
Conversion gain (mixer - IF amplifier), UHF
GC9A
NF1A
Noise figure, VHF-LOW
NF3A
NF4A
Noise figure, VHF-HIGH
NF6A
NF7A
Noise figure, UHF
NF9A
CM1A
CM3A
CM4A
CM6A
CM7A
VIFO1A
VIFO4A
VIFO7A
ΦPLVL1A
ΦPLVL3A
ΦPLVL4A
ΦPLVL6A
ΦPLVL7A
ΦPLVL9A
10
MAX
UNIT
29
dB
f IN = 149.85 MHz
(1)
29
dB
f IN = 156.85 MHz
(1)
29
dB
f IN = 425.85 MHz
(1)
29
dB
f IN = 433.85 MHz
(1)
29
dB
f IN = 857.85 MHz
(1)
29
dB
f IN = 50.85 MHz
9
dB
f IN = 149.85 MHz
9
dB
f IN = 156.85 MHz
9
dB
f IN = 425.85 MHz
10
dB
f IN = 433.85 MHz
10
dB
f IN = 857.85 MHz
11
dB
(2)
87
dBµV
(2)
87
dBµV
Input voltage causing 1% cross modulation distortion,
VHF-HIGH
f IN = 156.85 MHz
(2)
87
dBµV
f IN = 425.85 MHz
(2)
87
dBµV
f IN = 433.85 MHz
(2)
87
dBµV
f IN = 857.85 MHz
(2)
87
dBµV
f IN = 50.85 MHz
117
dBµV
f IN = 149.85 MHz
117
dBµV
f IN = 156.85 MHz
117
dBµV
f IN = 425.85 MHz
117
dBµV
f IN = 433.85 MHz
117
dBµV
f IN = 857.85 MHz
117
dBµV
-92
dBc/Hz
IF output voltage, UHF
VIFO9A
TYP
f IN = 149.85 MHz
IF output voltage, VHF-HIGH
VIFO6A
MIN
f IN = 50.85 MHz
IF output voltage, VHF-LOW
VIFO3A
(1)
Input voltage causing 1% cross modulation distortion,
VHF-LOW
Input voltage causing 1% cross modulation distortion, UHF
CM9A
(1)
(2)
(3)
TEST CONDITIONS
f IN = 50.85 MHz
Phase noise, VHF-LOW
Phase noise, VHF-HIGH
Phase noise, UHF
f IN = 50.85 MHz
(3)
f IN = 149.85 MHz
(3)
-96
dBc/Hz
f IN = 156.85 MHz
(3)
-85
dBc/Hz
f IN = 425.85 MHz
(3)
-88
dBc/Hz
f IN = 433.85 MHz
(3)
-80
dBc/Hz
f IN = 857.85 MHz
(3)
-85
dBc/Hz
RF input level = 70 dBµV
fundes = fdes ± 7 MHz, Pin = 70 dBµV, AM 1 kHz, 30%, DES/CM = S/I = 46 dB
Offset = 10 kHz, CP current = 35 µA, reference divider = 64
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IF Gain Controlled Amplifier
VCC = 5 V, TA = 25°C, measured in Figure 24 reference measurement circuit at 50-Ω system, IF = IF = 36.15 MHz (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
60
90
UNIT
µA
VCC
V
IIFGCA
Input current (IF GCA CTRL)
VIFGCA = 3 V
VIFGCAMAX
Maximum gain control voltage
Gain maximum
3
VIFGCAMIN
Minimum gain control voltage
Gain minimum
0
GIFGCAMAX
Maximum gain
VIFGCA = 3 V
GIFGCAMIN
Minimum gain
VIFGCA = 0 V
GCRIFGCA
Gain control range
VIFGCA = 0 V to 3 V
VIFGCAOUT
Output voltage
Single-ended output,
VIFGCA = 3 V
2.1
Vpp
NFIFGCA
Noise figure
VIFGCA = 3 V
11
dB
IM3IFGCA
Third order intermodulation distortion
fIFGCAIN1 = 35.65 MHz,
fIFGCAIIN2 = 36.65 MHz,
VIFGCAOUT = –2 dBm,
VIFGCA = 3 V
–50
dBc
IIP3IFGCA
Input intercept point
VIFGCA = 0 V
11
dBm
RIFGCAIN
Input resistance (IF GCA IN1, IF GCA IN2)
1
kΩ
RIFGCAOUT
Output resistance (IF GCA OUT1, IF GCA OUT2)
25
Ω
0.2
dB
3
dB
64
dB
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FUNCTIONAL DESCRIPTION
I2C Bus Mode
I2C Write Mode (R/W = 0)
Table 1. Write Data Format
MSB
(1)
LSB
Address Byte (ADB)
1
1
0
0
0
0
MA
R/W = 0
A (1)
Divider Byte 1 (DB1)
0
N14
N13
N12
N11
N10
N9
N8
A (1)
Divider Byte 2 (DB2)
N7
N6
N5
N4
N3
N2
N1
N0
A (1)
Control Byte 1 (CB1)
1
0
ATP2
ATP1
ATP0
RS2
RS1
RS0
A (1)
Band Switch Byte (BB)
CP1
CP0
AISL
P5
BS4
BS3
BS2
BS1
A (1)
Control Byte 2 (CB2)
1
1
ATC
MODE
DISGCA
IFDA
CP2
IXD4
A (1)
A = acknowledge
Table 2. Write Data Symbol Description
SYMBOL
DESCRIPTION
DEFAULT
Address set bit
MA
MA = 0 : AS pin = 0 V (connection to GND)
MA = 1 : AS pin = Open
N[14:0]
Programmable counter set bits
N = N14 x 214+ N13 x 213 + ... + N1 x 2 + N0
N14 = N13 = N12 = ... = N0 = 0
ATP[2:0]
RF AGC start-point control bits (see Table 3)
ATP[2:0] = 000
RS[2:0]
Reference divider ratio-selection bits (see Table 4)
RS[2:0] = 000
CP[2:0]
Charge-pump current set bits (see Table 5)
CP[2:0] = 000
Port output / ADC input control bit
P5
P5 = 0 : ADC input
P5 = 0
P5 = 1 : Tr = ON
Band-switch driver output control bits
BSn = 0: Tr = OFF
BSn = 1: Tr = ON
Band selection and standby function control bits
BS[4:1]
BS2
BS1
BS[4:1] = 0000
0
1
VHF-LO
1
0
VHF-HI
0
0
UHF
1
1
Standby mode / stop MOP function
RFAGC output current-set bit
ATC
ATC = 0: Source current = 300nA
ATC = 0
ATC = 1: Source current = 9uA
Device mode selection bit
MODE
MODE = 0 : Test mode
MODE = 0
MODE = 1 : Normal operation
Other control bits
DISGCA
12
DISGCA
IF GCA control bit (see Table 6)
IFDA
IFDA
AIF/DIF OUT selection bit (see Table 7)
AISL
AISL
RFAGC detector input selection bit (see Table 8)
AISL = 0
IXD4
IXD4
Reference divider control bit (see Table 4)
IXD4 = 0
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DISGCA = 0
IFDA = 0
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Table 3. RF AGC Start Point
MODE
ATP2
ATP1
ATP0
1
0
0
1
0
0
1
0
1
IFOUT LEVEL
(dBmV)
(mVp-p)
0
114
1417
1
112
1126
1
0
110
894
0
1
1
108
710
1
1
0
0
106
564
1
1
0
1
104
448
1
1
1
0
102
356
1
1
1
1
Disabled
Table 4. Reference Divider Ratio
MODE
IXD4
RS2
RS1
RS0
REFERENCE DIVIDER
RATIO
1
0
0
0
0
96
1
0
0
0
1
112
1
0
0
1
0
128
1
0
0
1
1
256
1
0
1
0
0
512
1
0
1
0
1
320
1
1
0
0
0
24
1
1
0
0
1
28
1
1
0
1
0
32
1
1
0
1
1
64
1
1
1
0
0
128
1
1
1
0
1
80
1
X
1
1
1
Forbidden
Table 5. Charge-Pump Current
MODE
CP2
CP1
CP0
CHARGE PUMP CURRENT
(µA)
1
0
0
0
35
1
0
0
1
70
1
0
1
0
140
1
0
1
1
210
1
1
0
0
280
1
1
0
1
350
1
1
1
0
420
1
1
1
1
Forbidden
Table 6. IF GCA Control
MODE
DISGCA
IF GCA FUNCTION
1
0
IF GCA enabled
1
1
IF GCA disabled
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Table 7. AIF / DIF OUT Selection
MODE
IFDA
IF OUT FUNCTION
1
0
DIF OUT 1,2 selected
1
1
AIF OUT selected
Table 8. RF AGC Detector Input Selection
MODE
AISL
RF AGC DETECTOR INPUT
1
0
IF amplifier selected
1
1 (1)
Mixer selected
(1)
When AISL = 1, RF AGC function is not available at VHF-L band
(output level is undefined).
I2C Read Mode (R/W = 1)
Table 9. Read Data Format
MSB
Status byte (SB)
(1)
LSB
1
1
0
0
0
0
MA
R/W = 1
A (1)
POR
FL
1
1
1
A2
A1
A0
–
Address byte (ADB)
A = acknowledge
Table 10. Read Data Symbol Description
SYMBOL
MA
DESCRIPTION
DEFAULT
Address set bit
MA = 0 : VLO OSC/AS pin = 0 V (connection to GND)
MA = 1 : VLO OSC/AS pin = Open
POR
Power-on-reset flag
POR = 1
POR set: power on
POR reset: end-of-data transmission procedure
FL
In-lock flag (1)
FL = 0 : PLL unlocked
FL = 1 : PLL locked
A[2:0]
Digital data of ADC (see Table 11)
Bit P5 must be set to 0.
(1)
Lock detector works by using phase error pulse at the phase detector. Lock flag (FL) is set or reset according to this pulse-width
disciminator. Hence, instability of the PLL may cause the lock detection circuit to malfunction. To stablize the PLL, it is required to
evaluate application circuit in various condition of loop-gain (loop filter, CP current) and to verify under operation of the actual
application.
Table 11. ADC Level (1)
(1)
14
A2
A1
A0
1
0
0
0.6 VCC to VCC
VOLTAGE APPLIED ON ADC INPUT
0
1
1
0.45 VCC to 0.6 VCC
0
1
0
0.3 VCC to 0.45 VCC
0
0
1
0.15 VCC to 0.3 VCC
0
0
0
0 V to 0.15 VCC
Accuracy is 0.03 × VCC.
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Example I2C Data Write Sequences
Telegram examples:
Start - ADB - DB1
Start - ADB - DB1
Start - ADB - CB1
Start - ADB - CB1
Start - ADB - CB2
-
DB2 - CB1 – BB - CB2 - Stop
DB2 - Stop
BB - CB2 - Stop
BB - Stop
Stop
Abbreviations:
ADB: Address byte
BB: Band switch byte
CB1: Control byte 1
CB2: Control byte 2
DB1: Divider byte 1
DB2: Divider byte 2
Start: Start condition
Stop: Stop condition
t HD-STA
t SU-STA
t HIGH
tF
SCL
t SU-DAT
t LOW
t SU-STO
tR
SDA
t HD-DAT
t BUF
Figure 23. I2C Timing
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APPLICATION INFORMATION
C17
R11
VC1
C15 R9
L7
R13
VC2 C18 R12
1
VLO OSC
2
VHI OSC
BS4
38
UHF RF IN1
37
BS4
C20
C1
L8
UHF RF IN1
C21 R14
3
UHF OSC 1
UHF RF IN2
36
4
UHF OSC 2
VHI RF IN
35
L9
R16
VC3
C2
C22 R15
C23
C25
R1
C4
VHI RF IN
R17
R2
C3
5
OSC GND
VLO RF IN
34
VLO RF IN
C27
R3
R18
C26
6
CP
RF GND
33
7
VTU
MIX OUT2
32
R19
L1
R20
VTU
C29
C28
L2
C6
R4
C5
8
IF GND
MIX OUT1
31
L4
L3
C30
AIF OUT
9
R22
AIF OUT
IF IN
30
BUS GND
29
C31
R21
DIF OUT1
R24
R5
C7
L5
10
DIF OUT1
11
DIF OUT2
C32
RF AGC OUT
RF AGC OUT
28
R25
C10
P5/ADC
12
P5/ADC
BS3
27
BS3
13
VCC
BS2
26
BS2
14
IF GCA IN1
BS1
25
BS1
15
IF GCA IN2
SDA
24
16
IF GCA CTRL
SCL
23
17
IF GCA GND
AS
22
18
IF GCA OUT2
XTAL2
21
R40
VCC
C33
IF GCA IN1
R28
C35
C36
R30
R39
R8
SDA
R38
IF GCA CTRL
C42
SCL
C12
R41
R33
R32
C40
C38
C13
R35
IF GCA OUT1
X1
C39
19
IF GCA OUT1
XTAL1
20
C14
R36
NOTE: This application information is advisory and performance-check is required at actual application circuits. TI assumes
no responsibility for the consequences of use of this circuit, such as an infringement of intellectual property rights or
other rights, including patents, of third parties.
Figure 24. Reference Measurement Circuit
16
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XTAL1
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20
21
Crystal X1
X1
Capacitors
Frequency
Type
C13
C14
4 MHz
HC49SFNB04000H0 (Kyocera)
27 pF
27 pF
16 MHz
CX3225GB16000D0 (Kyocera)
14 pF
14 pF
C13
C14
Figure 25. Reference Crystal Oscillation Circuit
Table 12. Component Values for Measurement Circuit
PART NAME
VALUE
PART NAME
VALUE
C1 (UHF RFIN1)
2.2nF
R1 (UHF RFIN1)
Open (51Ω)
C2 (VHI RFIN)
2.2nF
R2 (VHI RFIN)
Open (51Ω)
C3 (VLO RFIN)
2.2nF
R3 (VLO RFIN)
Open (51Ω)
C4 (UHF RFIN)
2.2nF
R4 (MIXOUT)
Open
C5 (MIXOUT)
5.5pF
R5 (MIXOUT)
0Ω
C6 (MIXOUT)
2.2nF
R8 (IF GCA CTRL)
0Ω
C7 (IF IN)
0Ω
R9 (VLO OSC)
0Ω
C10 (RF AGC OUT)
0.15µF
R11 (VLO OSC)
3.3kΩ
C12 (IF GCA CTRL)
0.1µF
R12 (VHI OSC)
10Ω
C13 (XTAL2)
27pF
R13 (VHI OSC)
3.3kΩ
C14 (XTAL1)
27pF
R14 (UHF OSC)
4.7Ω
C15 (VLO OSC)
4pF
R15 (UHF OSC)
4.7Ω
C17 (VLO OSC)
68pF
R16 (UHF OSC)
1kΩ
C18 (VHI OSC)
10pF
R17 (UHF OSC)
2.2kΩ
C20 (VHI OSC)
130pF
R18 (VTU)
3.3kΩ
C21 (UHF OSC)
6pF
R19 (CP)
82kΩ
C22 (UHF OSC)
6pF
R20 (VTU)
22kΩ
C23 (UHF OSC)
20pF
R21 (DIF OUT1)
200Ω
C25 (VTU)
2.2nF/50V
R22 (DIF OUT1)
Open
C26 (CP)
3.9nF/50V
R24 (DIF OUT2)
200Ω
C27 (CP)
10pF/50V
R25 (DIF OUT2)
51Ω
C28 (VTU)
150pF/50V
R28 (IF GCA IN1)
(51Ω)
C29 (VTU)
2.2nF/50V
R30 (IF GCA IN2)
(0Ω)
C30 (AIF OUT)
2.2nF
R32 (IF GCA OUT2)
200Ω
C31 (DIF OUT1)
2.2nF
R33 (IF GCA OUT2)
51Ω
C32 (DIF OUT2)
2.2nF
R35 (IF GCA OUT1)
200Ω
C33 (VCC)
0.1µF
R36 (IF GCA OUT1)
Open
C35 (IF GCA IN1)
2.2nF
R38 (SCL)
330Ω
C36 (IF GCA IN2)
2.2nF
R39 (SDA)
330Ω
C38 (IF GCA OUT2)
2.2nF
R40 (P5)
Open
C39 (IF GCA OUT1)
2.2nF
R41 (AS)
Open
C40 (SCL)
Open
C42 (SDA)
Open
VC1 (VLO OSC)
KDV270E
VC2 (VHI OSC)
KDV270E
VC3 (UHF OSC)
KDV216E
X1
4MHz crystal
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Table 12. Component Values for Measurement Circuit (continued)
PART NAME
VALUE
PART NAME
L1 (MIXOUT)
470nH (LK1608R47KT Taiyo Yuden)
L2 (MIXOUT)
560nH (LK1608R56KT Taiyo Yuden)
L3 (MIXOUT)
470nH (LK1608R47KT Taiyo Yuden)
L4 (MIXOUT)
560nH (LK1608R56KT Taiyo Yuden)
L5 (IFIN)
Open
L7 (VLO OSC)
f3.0mm, 9T, wire0.32mm
L8 (VHI OSC)
f1.8mm, 4T, wire0.4mm
L9 (UHF OSC)
f1.8mm, 2T, wire0.4mm
IF frequency:
Local frequency range:
18
VALUE
36 MHz
VHF-LOW: 87 to 186 MHz
VHF-HIGH: 193 to 462 MHz
UHF: 470 to 894 MHz
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Test Circuits
SG
DUT
Vout diff
VLO RFIN
(VHI RFIN)
50Ω
DIFOUT1
Spectrum
Analyzer
Gv=20log(Vout diff/Vin)
50Ω
Vin
50Ω
200Ω
Vout
DIFOUT2
=20log(Vout/Vin)+6+14.0
250Ω
Figure 26. VHF Conversion Gain Measurement Circuit (at DIFOUT)
SG
Spectrum
Analyzer
DUT
VLO RFIN
(VHI RFIN)
50Ω
50Ω
Gv=20log(Vout/Vin)
AIFOUT
50Ω
Vin
Vout
Figure 27. VHF Conversion Gain Measurement Circuit (at AIFOUT)
SG
DUT
Vout diff
UHFRF IN1
Spectrum
Analyzer
Gv=20log(Vout diff/Vin)
DIFOUT1
50Ω
50Ω
200Ω
50Ω
Vin
=20log(Vout/Vin)+6+14.0
Vout
DIFOUT2
UHFRF IN2
250Ω
Figure 28. UHF Conversion Gain Measurement Circuit (at DIFOUT)
SG
Spectrum
Analyzer
DUT
UHFRF IN1
Gv=20log(Vout/Vin)
AIFOUT
50Ω
50Ω
Vin
50Ω
Vout
UHFRF IN2
Figure 29. UHF Conversion Gain Measurement Circuit (at AIFOUT)
DUT
SG
Vout difft
IFGCAIN1
50Ω
50Ω
Vin
200Ω
Spectrum
Analyzer
IFGCAOUT1
Gv=20log(Vout diff/Vin)
50Ω
IFGCAIN2
Vout
IFGCAOUT2
IFGCACTRL
=20log(Vout/Vin)+6+14.0
250Ω
DC Power
Source
Figure 30. IF GCA Gain Measurement Circuit
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NF
Meter
Noise
Source
DUT
Figure 31. Noise Figure Measurement Circuit
Signal
Generator
fdes:P=70dBuV
Mix
Pad
Signal
Generator
DUT
Modulation
Analyzer
fdes+/-7Mhz
AM30%,1kHz
Figure 32. 1% Cross Modulation Distortion Measurement Circuit
20
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TYPICAL CHARACTERISTICS
Band Switch Driver Output Voltage (BS1-BS4)
5.0
Band Switch Output Voltage (V)
4.5
4.0
VCC = 5.3 V
3.5
VCC = 5.0 V
3.0
VCC = 4.5 V
2.5
2.0
1.5
1.0
0.5
0.0
0
2
4
6
8
10
12
14
16
18
20
Band Switch Current (mA)
Figure 33. Band Switch Driver Output Voltage
S-Parameter
40MHz
400MHz
500MHz
900MHz
Figure 34. VLO, VHI RFIN
Figure 35. UHF RFIN
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TYPICAL CHARACTERISTICS (continued)
60MHz
60MHz
30MHz
30MHz
Figure 36. DIFOUT
Figure 37. AIFOUT
60MHz
30MHz
60MHz
Figure 38. IF GCA IN
22
30MHz
Figure 39. IF GCAOUT
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TYPICAL CHARACTERISTICS (continued)
IF GCA Gain vs Control Voltage
70
60
Gain (dB)
50
VCC = 5.3 V
VCC = 5 V
40
VCC = 4.5 V
30
20
10
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
IF GCA CTRL Voltage (V)
Figure 40. IF GCA Gain vs Control Voltage
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PACKAGE OPTION ADDENDUM
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10-Oct-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
SN761645DBTR
OBSOLETE
Package Type Package Pins Package
Drawing
Qty
TSSOP
DBT
38
Eco Plan
Lead/Ball Finish
(2)
TBD
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Call TI
Call TI
(4/5)
-20 to 85
B1645
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
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www.ti.com/audio
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Computers and Peripherals
www.ti.com/computers
DLP® Products
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Logic
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Microcontrollers
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RFID
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www.ti.com/omap
TI E2E Community
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Wireless Connectivity
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