User's Guide
SLAU496A – February 2014 – Revised July 2015
TAS2552 EVM
This user’s guide contains support documentation for the TAS2552 evaluation module (EVM). Also
included are the performance specifications, operating instructions, schematics, printed-circuit board
(PCB) layouts and the bill of materials (BOM) for the TAS2552 EVM.
1
2
3
Contents
Introduction ................................................................................................................... 2
1.1
Description ........................................................................................................... 2
1.2
EVM Specifications ................................................................................................. 2
1.3
GUI Installation ...................................................................................................... 2
Operation ..................................................................................................................... 3
2.1
Quick-Start List for Stand-Alone Operation ..................................................................... 3
Reference ..................................................................................................................... 9
3.1
TAS2552EVM Schematic ......................................................................................... 9
3.2
TAS2552EVM PCB Layers ...................................................................................... 12
3.3
TAS2552 EVM Bill of Materials .................................................................................. 13
List of Figures
1
Power Connections .......................................................................................................... 3
2
TAS2552EVM Default Jumper Settings
3
..................................................................................
TAS2552EVM Analog Input Connections ................................................................................
4
5
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11
....................................................................................................... 6
CodecControl GUI ........................................................................................................... 6
TAS2552 GUI Gain and Input Settings ................................................................................... 7
TAS2552 EVM Power and USB Controller Schematic ................................................................. 9
TAS2552 EVM Schematic (2 of 3) ....................................................................................... 10
TAS2552 EVM Schematic (3 of 3) ....................................................................................... 11
TAS2552 EVM Top X-Ray View ......................................................................................... 12
TAS2552 EVM Bottom X-Ray View...................................................................................... 12
1
EVM Specifications .......................................................................................................... 2
2
TAS2552EVM Default Jumper Settings for Analog Input Operation .................................................. 4
3
Jumper Settings for Digital Input Mode ................................................................................... 8
4
Bill of Materials for TAS2552EMV
4
5
6
7
8
9
10
DISABLE Pushbutton
List of Tables
1
.......................................................................................
13
Introduction
This section provides an overview of the Texas Instruments (TI) TAS2552 Class-D mono speaker amplifier
evaluation module (EVM). It includes a brief description of the module and a list of EVM specifications.
1.1
Description
The TAS2552 is a high efficiency Class-D audio power amplifier with advanced battery current
measurement and an integrated boost converter. It drives up to 3.5 W into an 8-Ω speaker. The built-in
boost converter generates the Class-D amplifier supply rail. This boosted supply rail provides louder audio
than a stand-alone amplifier directly connected to the battery.
The AGC function automatically adjusts Class-D gain to reduce battery current at end-of-charge voltages,
and prevents output clipping and distortion.
The Class-D output switching is adjustable by the I2C interface, providing a method to slow the Class-D
switching edge rate to improve EMI. For more information about the TAS2552, refer to the datasheet
(SLAS898).
1.2
EVM Specifications
Table 1. EVM Specifications
Boost input supply voltage
2.7 V to 5.5 V
Analog supply voltage
1.6 V to 2.0 V
Digital I/O supply voltage
1.5 V to 3.3 V
Continuous output power, PO, VDD = 3.6 V, 8 Ω, THD+N 1%
3.5 W
USB Connection
1.3
Mini-USB
GUI Installation
Copy the supplied GUI into a directory and unzip it. Place the supplied scripts in the same directory
There is no set-up or other install necessary, simply run the GUI as described in Section 2.1.3 of this
document.
2
TAS2552 EVM
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2
Operation
This section describes how to operate the TAS2552EVM.
2.1
Quick-Start List for Stand-Alone Operation
Use the following steps when operating the TAS2552EVM stand alone or when connecting the EVM into
an existing circuit.
2.1.1
Power and Ground
Use the following steps to operate the EVM:
1. Verify that the external power sources are set to OFF.
2. Connect a 3.6-V supply to the VBAT terminal in the lower right corner of the EVM and the GND
terminal located to the left of the VBAT terminal.
3. Make sure the 5V-SEL jumper in the upper left corner is in the “USB” Position (the red box in
Figure 1). Connect the USB cable to the EVM. This will supply power to required blocks of the EVM.
Figure 1. Power Connections
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4. Ensure the jumpers are set according to Table 2 and Figure 2:
Table 2. TAS2552EVM Default Jumper Settings for Analog Input Operation
Jumper Name
Position
Comments
5V-SEL
USB
Uses USB +5 V
IOVDD-SEL
+3.3V
Supplies +3.3 V to IOVDD from on-board LDO
SPI
ALL OUT
SPI interface is currently not being used
WE
OUT
Write protect for TAS1020 EEPROM
J1, J2
OUT
For external I2C connectivity only
JP1, JP2 (SDA, SCL)
IN
Connect I2C bus from TAS1020 to TAS2552 and AIC3253
JP3 – LRCLK
LEFT SIDE
Connects LRCLK to TAS2552
JP3 – BCLK
LEFT SIDE
Connects BCLK to TAS2552
JP3 – MCLK
LEFT SIDE
Connects MCLK to TAS2552
JP3 – DOUT
LEFT SIDE
Data out of the TAS2552
JP3 – DIN
LEFT SIDE
Data coming into the TAS2552
JP3 – IVCLK
LEFT SIDE
Connects IVCLK to TAS2552
JP3 – SCL
LEFT SIDE
Connects SCL to TAS2552
JP3 – SDA
LEFT SIDE
Connects SDA to TAS2552
JP3 – A0
RIGHT SIDE
Address pin of the TAS2552
JP3 – EN
OUT
Leave this pin floating. ENABLE pin pulled high
JP4, JP6
1–2
External RCA analog input connector to TAS2552
JP5
OUT
n/a
JP7 – SE
OUT
Default input mode set to differential
JP11 – JP17
ALL OUT
These jumpers are hard pull-ups tied to IOVDD
JP20, JP21
IOVDD
I2C pull-up resistors for SDA and SCL
JP22
+1.8V
Supplies +1.8 V to AVDD from on-board LDO
Figure 2. TAS2552EVM Default Jumper Settings
4
TAS2552 EVM
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If this is the first time you connect the EVM to a PC, Windows® will install it as a USB HID device.
2.1.1.1
Jumpering Notes
The EVM can run in several input modes:
1. Analog input – Remove all of the jumpers in the JP3 block except for SDA, SCL, and A0. Be sure that
JP4/6 are in the 1 to 2 position and JP5 is not installed. Run the
TAS255x_Analog_Input_Init_Script.cfg script.
2. Digital input from digital interface when attached to a device like an AP PSIA – Remove all of the
jumpers in the JP3 block except for SDA, SCL, and A0. Be sure that jumpers IV CLK, JP DOUT, and
DAT OUT are not installed. Run the TAS255x_I2S_Input_Init_Script.cfg script.
3. Digital input from a PC media player to the digital input of the TAS2552 – Install all of the jumpers in
the JP3 jumper block except for the EN jumper. Be sure that the jumpers IV CLK, JP DOUT, and DAT
OUT are not installed. Run the TAS255x_I2S_Input_Init_Script.cfg script.
2.1.2
Inputs and Outputs
The inputs and outputs for this EVM are described in this section.
2.1.2.1
Audio
1. Verify that the audio source is set to the minimum level.
2. Connect the audio source to the TAS2552-AIN RCA jack located in the top right corner of the EVM
(highlighted in red in Figure 3).
3. Connect an 8-Ω load to the OUT– and OUT+ terminals.
Figure 3. TAS2552EVM Analog Input Connections
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2.1.2.2
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Shutdown Controls
Shutdown is controlled with the pushbutton labeled “DISABLE”, see Figure 4. Press and hold DISABLE to
place the TAS2552 in shutdown. The device can be activated via the I2C interface.
Figure 4. DISABLE Pushbutton
2.1.3
Power Up
1. Verify the correct connections as described in Section 2.1.1 and Section 2.1.2.
2. Verify the correct voltage setting of the power supply and turn ON the power supply.
3. Run CodeControl.exe and select TAS2552EVM. The GUI starts and shows the main TAS2552 block
diagram with corresponding controls. The correct EVM name should appear at the top of the screen. If
the program fails to detect the EVM properly, try unplugging the USB cable and plug it into the EVM
again.
Note: This EVM uses the TAS255x GUII as illustrated in Figure 5.
Figure 5. CodecControl GUI
6
TAS2552 EVM
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2.1.4
Gain Setting and Input configuration
The gain and input mode settings are programmed via the I2C interface. The default gain of the TAS2552
is set to –21.5 dB. The gain can be adjusted by clicking on the orange amplifier block and moving the
slider up/down as illustrated in Figure 6. The input can be switched from digital to analog and vice versa
by clicking on the input MUX mode switch.
When clicking on the “Class-D Enable” checkbox, the output of the amplifier will be enabled and the
Class-D will start switching. Set the Volume Control to 0 dB. Refer to the datasheet SLAS898 for more
details on gain settings.
Figure 6. TAS2552 GUI Gain and Input Settings
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2.1.5
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Analog Input Configuration
In order to operate the TAS2552 in Analog input mode, go to View → Command, and open the
TAS255x_Analog_Input_Init_Script.cfg setup script from the Scripts folder. Click Run to execute the
script.
After running this script, you should be able to input a signal and measure the output.
2.1.6
Digital Input Configuration
In order to operate the TAS2552 in digital input mode (I2S from TAS1020), set the jumpers as shown in
Table 3:
Table 3. Jumper Settings for Digital Input Mode
Jumper Name
Position
Comments
JP3 (LRCLK)
L-M
Connects LRCLK line to TAS2552
JP3 (BCLK)
L-M
Connects BCLK line to TAS2552
JP3 (MCLK)
L-M
Connects MCLK line to TAS2552
JP3 (DIN)
L-M
Connects Data In line to TAS2552
JP3 (SCL, SDA)
L-M
Connects I2C lines to TAS2552
JP3 (FAULT)
L-M
Connects FAULT line from TAS2552 to TAS1020
Go to View → Command and open the TAS255x_I2S_Input_Init_Script.cfg setup script located in the
Scripts sub-directory. Click Run to execute the script.
If using an external I2S interface or PSIA, the clock and data lines can be connected straight to JP3. The
rightmost column of headers is GND for each pair. The same I2S script can also be used for direct digital.
Note: The sample rate for this script is 44.1 kHz. The format is I2S.
8
TAS2552 EVM
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Reference
This section includes the EVM schematics, board layout views, and the BOM.
3.1
TAS2552EVM Schematic
Figure 7 through Figure 9 illustrate the schematics for this EVM.
TAS2552YFF EVALUATION BOARD
TO AIC3253/TAS2552
MCLK
MCLK
DIN
DIN
BCLK
BCLK
DOUT
OE
1.50k
3.09k
27.4
6
4
9
3
10
2
11
48
27.4
FB2
0.1uF/10V
GND
R4
JP2
44
43
42
41
40
39
38
37
1
36
2
35
3
34
4
33
U2
TAS1020BPFB
R6
100k
600 Ohms/2A
1
8
2
7
3
6
4.70k
R19
28
10
27
11
26
GND
SCL
2.70k
SDA
R20
5
29
9
2.70k
24FC512-I/SM
2
WE
1
WE =Write Enable
GND
25
GND
+3.3V
C6
13
0.1uF/10V
14
15
16
17
18
19
20
21
GND
22
23
24
+3.3V
R21
10.0K
GND
GND
I2C/RESET BUS
GND
+3.3V
30
12
2
GND
R1
U5
32
8
+3.3V
2
1
J2
2
+3.3V
4
GND
J1
+3.3V
31
7
GND
1
45
6
47pF/50V
600 Ohms/2A
FB1
46
5
C5
2
47
1
+3.3V
C17
GND
1
JP1
GND
1000pF/50V
C4
47pF/50V
1
USB MINIB
C3
100pF/50V
SDA-USB
R3
5
SIGNAL DIRECTION IS RESPECT TO
TAS2552 AND/OR AIC3253
GND
SCL-USB
R5
USB
8
EXT I2C CONNECTION OPTION
0.1uF/10V
3
C2
Mini USB INPUT
7
4
Vcc
GND OUT
SIT8002AI
6MHz/3.3V
GND
LRCLK
C1
Y1
1
2
R2
I2S
DOUT
LRCLK
+3.3V
+3.3V
R22
10.0K
GPIO
P3.0
R7
Yellow
649
C21
C22
0.1uF/10V
0.1uF/10V
GND
TO TAS2552
GND
GND
+3.3V
+3.3V
TAS1020B DECOUPLING
RESET
E
5V-SEL
1-2 = TIE TO USB +5V
3-4 = TIE TO EXT +5V
5-6 = TIE TO VBAT
RESET
EXTERNAL
+5V SUPPLY
INPUT
B
RST
C
GND
Vbat
+5V
C24
Q2
Red
357
GND
GND
USB/EXTERNAL
+5V SUPPLY
5V-SEL
1
2
3
4
5
6
+5V
+1.8V
VR1
C8
C9
1.0uF/16V
0.1uF/10V
22uF/10V
2
C10
0.1uF/10V
3
GND
4
C26
0.1uF/10V
GND
0.1uF/10V
GND
C27
0.1uF/10V
GND
C28
0.1uF/10V
GND
C29
0.1uF/10V
GND
+1.8V
5
1
C7
C25
22uF/10V
R16
+1.8V
C11
C12
22uF/10V
0.1uF/10V
TPS73618DBVT
1.8V/400mA
GND
GND
GND
GND
GND
R13
GND
GROUND TEST POINTS
10.0K
STANDOFFS
+3.3V
VR2
1
+5V
5V
R9
Blue
POWER
649
5
2
C13
C14
22uF/10V
0.1uF/10V
GND
3
GND
+3.3V
4
GND
R14
HW2
HW3
GND1
C15
C16
22uF/10V
0.1uF/10V
TPS73633DBVT
GND
GND
GND5
GND2
GND
GND7
GND4
GND
GND6
GND8
GND
GND
0.5in
GND
GND3
HW4
+3.3V
3.3V/400mA
GND
HW1
0.5in
0.5in
GND
GND
GND
0.5in
GND
10.0K
TI
POWER & USB CONTROLLER
PAGE INFO:
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JANUARY 28, 2014
DATE
FILENAME AIP015B_Schematic.sbk
SCH REV
B
PCB REV
B
SHEET 1 OF 5
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LDN
Figure 7. TAS2552 EVM Power and USB Controller Schematic
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TAS2552YFF EVALUATION BOARD
FROM TAS1020B
+1.8V
+3.3V
C38
C37
22uF/10V
0.1uF/16V
C32
0.1uF/16V
I2S
10
LRCLK
DIN
R28
10
DOUT
GND
BCLK-3253
E5
LOL
LOL-3253
C5
LOR
LOR-3253
LOL-3253
A1
DIN-3253
LOR-3253
B2
R29
DOUT-3253
B3
U3
10
JP DOUT
D4
E3
LRCLK-3253
10
TO TAS2552
D5
10
R27
C3
GND
D3
R26
BCLK
GND
MCLK-3253
C1
R8
MCLK
A2
MISO-IVCLK
D2
TLV320AIC3253YZK
A3
E1
R25
GND
R300
33.0
E2
C2
C30
C4
1.0uF/16V
DNP
B5
E4
33.0
B4
R32
GND
R36
10
B1
SCL-3253
SCL
A5
D1
R31
I2C
A4
IV CLK
1
2
SDA-3253
SDA
33.0
GND
I2C ADDR = 0011000
FROM TAS2552
DAT OUT
1
2
R35
10
DEFAULT JUMPER SETTINGS
2-3 (USB-5V)
JP20
JP1
IN
JP21
JP2
IN
SPI
OUT
WE
IN
JP3
L-M
J1
OUT
JP4
1-2 (TAS2552-AIN)
J2
OUT
JP5
OUT
2-3 (+1.8V)
JP6
1-2 (TAS2552-AIN)
5V-SEL
TO TAS2552
EN_DUT
JP22
J3
IOVDD-SEL
JP10-17
TI
PAGE INFO:
TLV320AIC3253YZK
DESIGN LEAD DOMINIK HARTL
1-2 (IOVDD)
1-2 (IOVDD)
OUT
7-8 (+3.3V)
OUT
DATE
JANUARY 28, 2014
FILENAME AIP015B_Schematic.sbk
SCH REV
B
PCB REV
B
SHEET 2 OF 5
DRAWN BY
LDN
Figure 8. TAS2552 EVM Schematic (2 of 3)
10
TAS2552 EVM
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TAS2552YFF EVALUATION BOARD
AVDD
VBAT-TP
AVDD
+1.8V
2
C39
C40
C41
22uF/16V
1.0uF/16V
0.1uF/16V
VBAT-JP
1
GND
IOVDD-SEL
1-2 = TIE TO VBAT
3-4 = TIE TO AVDD
5-6 = TIE TO +1.8V
7-8 = TIE TO +3.3V
AVDD-TP
Vbat
VBAT
IOVDD VOLTAGE
SELECTION
GND
GND
1
2
3
JP22
+
GND
C44
C45
C46
10uF/16V
1.0uF/16V
0.1uF/16V
GND
GND
+3.3V +1.8V AVDD Vbat
SHIELD
GND
GND
1
2
4
5
6
7
8
R40
10.0k
R41
10.0k
1
GND
GND
1
IOVDD
2
3
4
0.1uF/16V
GND
GND
EN
VREF1
FROM
TAS1020B
C63
U4
GND
C43
C42
1.0uF/16V
R42
200k
0.1uF/16V
2.5id/5.5od
GND
IOVDD
+3.3V
IOVDD
C62
1
SIGNAL
2
3
GND
IOVDD
3
1
GND
VBAT DEMO
SHUNT
IOVDD
IOVDD-SEL
VREF2
SCL1
SCL2
SDA1
SDA2
0.1uF/16V
8
7
GND
6
SCL
5
SDA
PCA9306DCT
VBST
C51
22uF/16V
Vbat
L1
C59
1
0.1uF/16V
2.2uH/6.0A
JP20
GND
JP21
1 2 3
1 2 3
REMOVE JUMPERS
TO DRIVE
EXTERNALLY
2
GND
GND
U1
GND
GND
OUT+
A5
FB3
1
1
2
8V
R38
1.00k
DNP
GND
C47
C48
GND
0.0
GND TP
C52
0.01uF/16V
4700pF/50V
GND
DNP
OUT1
C50
2
DNP
GND
10
C4
D4
C4
D4
E4
F4
B3
E3
C3
D3
R55
10
F2
10
A2
B2
C2
D2
E3
E2
F3
F2
F1
0.0
A1
B1
C1
D1
E1
F1
B1
E1
C1
D1
BSS138ZXCT
GND
LRCLK
R54
D3
E2
GND
A0
10
C3
Q3
IVCLK
10
R53
B3
D2
DOUT
DIN
FROM
AIC3253
EN_DUT
EN
GND
DISABLE
EN_DUT
GND
IOVDD
IOVDD
R46
AVDD
2
C54
JP4
10.0k
TAS2552YFF
R47
C53
1.0uF/10V
BCLK
R52
F3
A3
A1
0.0
SCL
SDA
R51
B4
DIN
MCLK
D5
A4
C2
R11
GND
10
B2
1000pF/50V
8V
R50
470pF/50V
FB4
1
F5
E5
C0
R39
1.00k
TVS2
F5
F4
A2
OUT- TP
TB1
E5
E4
A3
R10
4700pF/50V
2
1
D5
B4
A4
OUT+ TP
6A/125V
C5
C5
1000pF/50V
GND
GND
B5
B5
0.0
C49
TVS1
A5
DOUT
JP3
TOP VIEW
1.0uF/16V
3
1
JP5
10.0k
1
2
3
JP4/6
1-2 = ANALOG INPUT
2-3 = AIC3253
2
A0=0, I2C ADDR = 0000100
A0=1, I2C ADDR = 0000110
C55
JP6
1
1
JP7
2
GND
1.0uF/16V
3
TAS2552-AIN
1
2
EXTERNAL
ANALOG INPUT
GND
Vbat
R15
R44
0.0
C18
C56
1.0uF/10V
0.047uF/16V
GND
OPTIONAL
RC FILTER
100
FROM AIC3253
LINE OUTPUT
GND
R45
C57
100
0.047uF/16V
GND
TI
TAS2552YFF I/O
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SCH REV
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PCB REV
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DRAWN BY
Figure 9. TAS2552 EVM Schematic (3 of 3)
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TAS2552EVM PCB Layers
Figure 10 and Figure 11 illustrate the PCB layouts for this EVM.
Figure 10. TAS2552 EVM Top X-Ray View
Figure 11. TAS2552 EVM Bottom X-Ray View
12
TAS2552 EVM
SLAU496A – February 2014 – Revised July 2015
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Copyright © 2014–2015, Texas Instruments Incorporated
Reference
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3.3
TAS2552 EVM Bill of Materials
Table 4 contains the BOM for this EVM.
Table 4. Bill of Materials for TAS2552EMV
Item
MFG Part NUM
MFG
Qty
Ref Designators
Description
1
TAS2552YFF
TEXAS INSTRUMENTS
1
U1
DIG IN 3.5W CLASS-D AUDIO AMP ADAPTIVE BOOST SPKR SENSE WCSP30-YFF
ROHS
2
TAS1020BPFB
TEXAS INSTRUMENTS
1
U2
USB STREAMING CONTROLLER TQFP48-PFB ROHS
3
TLV320AIC3253IYZKR
TEXAS INSTRUMENTS
1
U3
ULTRA LOW POWER STEREO AUDIO CODEC WITH miniDSP WCSP25-YZK ROHS
4
PCA9306DCTR
TEXAS INSTRUMENTS
1
U4
DUAL BIDIR I2C BUS AND SMBUS VOLT LEVEL TRANS SSOP8-DCT ROHS
5
24FC512-I/SM
MICROCHIP
1
U5
512K (64Kx8) I2C SERIAL EEPROM SOIC8-SM ROHS
6
TPS73618DBVT
TEXAS INSTRUMENTS
1
VR1
VOLT REG 1.8V 400MA LDO CAP FREE NMOS SOT23-DBV5 ROHS
7
TPS73633DBVT
TEXAS INSTRUMENTS
1
VR2
VOLT REG 3.3V 400MA LDO CAP FREE NMOS SOT23-DBV5 ROHS
8
DDTA143TCA-7-F
DIODES INC.
1
Q2
TRANSISTOR-PNP PREBIASED 4.7K SOT23-DBV3 ROHS
9
BSS138TA
ZETEX
1
Q3
N-CH ENHANCEMENT MODE VERT DMOS FET SOT23-DBV3 ROHS
10
ESD8V0R1B-02LSE6327
INFINEON
2
TVS1,TVS2
TVS BIDIR ILINE 8V TSSLP-2-1 ROHS
11
SML-LXT0805YW-TR
LUMEX OPTO
1
P3.0
LED, YELLOW 2.0V SMD0805 ROHS
12
SML-LXT0805SRW-TR
LUMEX OPTO
1
RST
LED, RED 2.0V SMD0805 ROHS
13
LTST-C170TBKT
LITE-ON INC.
1
5V
LED, BLUE 3.3V SMD0805 ROHS
14
SIT8002AI-13-33E6.00000T
SITIME
1
Y1
OSCILLATOR SMT 6MHz 3.3V OUT-ENABLE ROHS
15
C0402C471K5RACTU
KEMET
0
C0
CAP SMD0402 CERM 470PFD 50V 10% X7R ROHS
16
C0603C104K8RACTU
KEMET
15
C1, C6, C8, C10, C12, C14, C16, C17, C21, C22, C25, C26, C27, C28,
C29
CAP SMD0603 CERM 0.1UFD 10V 5% X7R ROHS
17
GRM1885C1H101JA01D
MURATA
1
C2
CAP SMD0603 CERM 100PFD 50V 5% COG ROHS
18
C1608C0G1H102J
TDK CORP.
1
C3
CAP SMD0603 CERM 1000PFD 50V 5% COG ROHS
19
GRM1885C1H470JA01D
MURATA
2
C4, C5
CAP SMD0603 CERM 47PFD 50V 5% COG ROHS
20
C1608X7R1C105K
TDK
4
C7, C30, C54, C55
CAP SMD0603 CERM 1.0UFD 16V 10% X7R ROHS
21
LMK212BJ226MG-T
TAIYO YUDEN
6
C9, C11, C13, C15, C24, C38
CAP SMD0805 CERM 22UFD 10V 20% X5R ROHS
22
C1005X5R1A105K
TDK CORP
2
C18, C53
CAP SMD0402 CERM 1.0UFD 10V 10% X5R ROHS
23
GRM188R71C104KA01D
MURATA
2
C32, C37
CAP SMD0603 CERM 0.1UFD 16V 10% X7R ROHS
24
C2012X5R1C226K
TDK
2
C39, C51
CAP SMD0805 CERM 22UFD 16V 10% X5R ROHS
25
C2012X7R1C105K
TDK
3
C40, C42, C45
CAP SMD0805 CERM 1.0UFD 16V 10% X7R ROHS
26
GRM155R71C104KA88D
MURATA
6
C41, C43, C46, C59, C62, C63
CAP SMD0402 CERM 0.1UFD 16V X7R 10% ROHS
27
EEE-1CS100SR
PANASONIC
1
C44
CAP ALUM-ELECT SMD-VSA 10UFD 16V 20% ROHS
28
GRM188R71H472KA01D
MURATA
2
C47, C48
CAP SMD0603 CERM 4700PFD 50V 10% X7R ROHS
29
C1608C0G1H102J
TDK CORP.
0
C49, C50
CAP SMD0603 CERM 1000PFD 50V 5% COG ROHS
30
0402YC103KAT2A
AVX
1
C52
CAP SMD0402 CERM 0.01ufd 16V 10% X7R ROHS
31
GRM188R71C473KA01D
MURATA
2
C56, C57
CAP SMD0603 CERM 0.047UFD 16V X7R 10% ROHS
32
CRCW06034K70FKEA
VISHAY
1
R1
RESISTOR SMD0603 4.70K OHMS 1% 1/10W 4.70K ROHS
33
ERJ-3EKF1501V
PANASONIC
1
R2
RESISTOR SMD0603 1.50K OHM 1% THICK FILM 1/10W ROHS
34
CRCW060327R4FKEA
VISHAY
2
R3, R4
RESISTOR SMD0603 27.4 OHM 1/10W 1% ROHS
35
ERJ-3EKF3091V
PANASONIC
1
R5
RESISTOR SMD0603 3.09K OHM 1% THICK FILM 1/10W ROHS
SLAU496A – February 2014 – Revised July 2015
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TAS2552 EVM
Copyright © 2014–2015, Texas Instruments Incorporated
13
Reference
www.ti.com
Table 4. Bill of Materials for TAS2552EMV (continued)
Item
MFG Part NUM
MFG
Qty
Ref Designators
Description
36
RMCF0603JT100K
STACKPOLE ELECTRONICS
1
R6
RESISTOR SMD0603 100K OHMS 5% 1/10W ROHS
37
RC0603FR-07649RL
YAGEO
2
R7, R9
RESISTOR SMD0603 THICK FILM 649 OHMS 1% 1/10W ROHS
38
RC0603JR-0710RL
YAGEO
13
R8, R26, R27, R28, R29, R35, R36, R50, R51, R52, R53, R54, R55
RESISTOR SMD0603 THICK FILM 10 OHM 5% 1/10W ROHS
39
ERJ-3GEY0R00V
PANASONIC
2
R10, R11
RESISTOR SMD0603 0.0 OHM 5% THICK FILM 1/10W ROHS
40
ERJ-3EKF1002V
PANASONIC
6
R13, R14, R21, R22, R40, R41
RESISTOR SMD0603 10.0K 1% THICK FILM 1/10W ROHS
41
RMCF0402ZT0R00
STACKPOLE ELECTRONICS
1
R15
ZERO OHM JUMPER SMT 0402 0 OHM 1/16W,5% ROHS
42
ERJ-3EKF3570V
PANASONIC
1
R16
RESISTOR SMD0603 357 OHM 1% THICK FILM 1/10W ROHS
43
ERJ-3EKF2701V
PANASONIC
2
R19, R20
RESISTOR SMD0603 2.70K OHMS 1% 1/10W ROHS
44
ERJ-3EKF33R0V
PANASONIC
3
R25, R31, R32
RESISTOR SMD0603 33.0 OHMS 1% 1/10W ROHS
45
RC0603FR-071KL
YAGEO
2
R38, R39
RESISTOR SMD0603 THICK FILM 1.00K OHM 1% 1/10W ROHS
46
RC0402FR-07200KL
YAGEO
1
R42
RESISTOR SMD0402 THICK FILM 200K OHMS 1% 1/16W ROHS
47
RMCF0402FT100R
STACKPOLE ELECTRONICS
2
R44, R45
RESISTOR SMD0402 100 OHMS 1% 1/16W ROHS
48
CRCW040210K0FKED
VISHAY
2
R46, R47
RESISTOR SMD0402 10.0K OHMS 1% 1/16W ROHS
49
ERJ-3GEY0R00V
PANASONIC
0
R300
RESISTOR SMD0603 0.0 OHM 5% THICK FILM 1/10W ROHS
50
MPZ2012S601A
TDK
2
FB1, FB2
FERRITE BEAD SMD0805 600 Ohms 2A ROHS
51
ERJ-6GEY0R00V
PANASONIC
2
FB3, FB4
RESISTOR SMD0805 ZERO OHM 5% 1/8W ROHS
52
XFL4020-222MEB
COIL CRAFT
1
L1
SHIELDED POWER INDUCTOR 2.2uH 6.0A ROHS
53
PBC02SAAN
SULLINS
2
J1, J2
HEADER THRU MALE 2 PIN 100LS 120 TAIL GOLD ROHS
54
TSW-110-08-T-T
SAMTEC
1
JP3
HEADER,THU,30P,3X10,MALE,TRIPLE ROW,100LS,200TL
55
26630301RP2
NORCOMP
5
JP4, JP6, JP20, JP21, JP22
HEADER 3 PIN, PCB 2.0MM ROHS
56
26630201RP2
NORCOMP
8
DAT OUT, IV CLK, JP1, JP2, JP5, JP7, JP DOUT, WE
HEADER 2 PIN, PCB 2.0MM ROHS
57
26640801RP2
NORCOMP
1
IOVDD-SEL
HEADER 8 PIN 2x4 PCB 2.0MM ROHS
58
26640601RP2
NORCOMP
1
5V-SEL
HEADER 6 PIN 2x3 PCB 2.0MM ROHS
59
B2P-VH(LF)(SN)
JST
1
VBAT-JP
JACK JST-VH 2-PIN 3.96mmLS ROHS
60
UX60-MB-5ST
HIROSE
1
USB
JACK USB MINIB SMT-RA 5PIN ROHS
61
PJRAN1X1U01X
SWITCHCRAFT
1
TAS2552-AIN
JACK, RCA 3-PIN PCB-RA BLACK ROHS
62
PJ-102B
CUI INC.
1
VBAT DEMO
JACK MINI-PWR THRU-RA 2,5ID/5.5OD 16VDC 5A ROHS
63
1725656
PHOENIX CONTACT
1
TB1
TERMINAL BLOCK MPT COMBICON 2PIN 6A/125V GREEN 100LS ROHS
64
5001
KEYSTONE ELECTRONICS
9
GNDx9
PC TESTPOINT, BLACK, ROHS
65
5002
KEYSTONE ELECTRONICS
20
A0, EN, DIN, LOL, LOR, SCL, SDA, BCLK, DOUT, MCLK, VBST, +1.8V,
+3.3V, IOVDD, IVCLK, LRCLK, AVDD-TP, OUT+ TP, OUT- TP, VBAT-TP
PC TESTPOINT, WHITE, ROHS
66
TL1015AF160QG
E-SWITCH
3
GPIO, RESET, DISABLE
SWITCH, MOM, 160G SMT 4X3MM ROHS
67
111-2223-001
EMERSON NPCS
7
+5V, GND, AVDD, OUT+, OUT-, VBAT, GND22
BINDING-POST,NONINS,THRU,ROHS
68
2029
KEYSTONE ELECTRONICS
4
STANDOFFS
STANDOFF 4-40 0.5IN 3/16IN DIA ALUM RND F-F ROHS
69
PMSSS 440 0025 PH
B&F FASTENER SUPPLY
4
STANDOFF SCREWS
4-40 SCREW STEEL 0.250 IN ROHS
70
969102-0000-DA
3M
8
JP3-LRCLK(L), JP3-BCLK(L), JP3-MCLK(L), JP3-DOUT(L), JP3-DIN(L),
JP3-SCL(L), JP3-SDA(L), JP3-A0(R)
SHUNT BLACK AU FLASH 0.100LS OPEN TOP ROHS
71
810-002-SP2L001
NORCOMP INC.
10
JP1, JP2, JP4(1-2), JP5, JP6(1-2), JP20(1-2), JP21(1-2), JP22(2-3), 5VSEL (Shunt VBAT), IOVDD-SEL(+3.3V)
SHUNT BLACK AU FLASH 2mmLS OPEN TOP ROHS
TOTAL
201
14
TAS2552 EVM
SLAU496A – February 2014 – Revised July 2015
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Copyright © 2014–2015, Texas Instruments Incorporated
Reference
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Table 4. Bill of Materials for TAS2552EMV (continued)
Item
MFG Part NUM
MFG
Qty
Ref Designators
Description
SPECIAL NOTES TO THIS BILL OF MATERIALS
SN1
These assemblies are ESD sensitive, ESD precautions shall be observed.
SN2
These assemblies must be clean and free from flux and all contaminants. Use of no clean flux is not acceptable.
SN3
These assemblies must comply with workmanship standards IPC-A-610 Class 2.
SN4
Ref designators marked with an asterisk ('**') cannot be substituted. All other components can be substituted with equivalent MFG's components.
SLAU496A – February 2014 – Revised July 2015
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TAS2552 EVM
Copyright © 2014–2015, Texas Instruments Incorporated
15
Revision History
www.ti.com
Revision History
Changes from Original (February 2014) to A Revision .................................................................................................. Page
•
Added 'be sure... JP5 is not installed' to Analog input bullet in the Jumpering Notes section.
.................................
5
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
16
Revision History
SLAU496A – February 2014 – Revised July 2015
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Copyright © 2014–2015, Texas Instruments Incorporated
STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1.
Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or
documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.
Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2
Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3
Regulatory Notices:
3.1 United States
3.1.1
Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
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FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•
•
•
•
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1
For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1
Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2
Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of
Japan to follow the instructions below with respect to EVMs:
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
3.3.3
Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
SPACER
4
EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1
User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2
EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5.
Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6.
Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7.
USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8.
Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9.
Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2015, Texas Instruments Incorporated
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IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
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TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
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requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
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