TAS3308
SLES215C – FEBRUARY 2008 – REVISED AUGUST 2010
www.ti.com
DIGITAL AUDIO PROCESSOR WITH ANALOG INTERFACE
Check for Samples: TAS3308
FEATURES
1
•
•
Digital Audio Processor
– Fully Programmable With the Graphical,
Drag-and-Drop PurePath Studio™ Software
Development Environment
– 135-MHz Operation 48-Bit Data Path With
76-Bit Accumulator
– Hardware Single-Cycle Multiplier (28 × 48)
– Five Simultaneous Operations Per Clock
Cycle
– Usable 1k Data RAM Words (48 Bit), Usable
1k Coefficient RAM (28 Bit)
– Usable 2.8k Program RAM
– 360 ms at 48 kHz, 17k Words 24-Bit Delay
Memory
– Slave Mode Fs is 32.44.1 and 48 kHz With
Auto Sample Rate Detection
– Master Mode Fs is 48 kHz
Analog Audio Input/Output
– 10:1 Stereo Analog Input MUX
– Stereo Analog Pass-Through Channel
– Stereo, Single-Ended ADC
(100 dB DNR Typical)
– Six Differential PWM Outputs
(105 dB DNR Typical)
– PurePath™ Digital Technology Minimizes
Pop/Click
– Fourth Order Chaotic Noise Shaper With
Non-Linear Correction
•
•
•
Digital Audio Input/Output
– Three Synchronous Serial Audio Inputs
(Six Channels)
– Two Synchronous Serial Audio Outputs
(Four Channels)
– Input and Output Data Formats: 16-, 20-, or
24-Bit Data Left, Right, and I2S
– S/PDIF Transmitter
System Control Processor
– Embedded 8051 WARP Microprocessor
– Programmable Using Standard 8051 C
Compilers
– Four Programmable GPIO pins
General Features
– Two I2C Ports for Slave or Master Download
– Single 3.3-V Power Supply
– Integrated Regulators
APPLICATIONS
•
•
•
•
•
•
Flat-Screen Televisions
MP3 Player/Music Phone Docks
Speaker Bars
Mini/Micro-Component Systems
Automotive Head Units
Musical Instruments
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2010, Texas Instruments Incorporated
TAS3308
SLES215C – FEBRUARY 2008 – REVISED AUGUST 2010
www.ti.com
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
DVSS_PWM2
PWM2_Li
PWM2_LO
PWM1_RI
PWM1_RO
DVDD_PWM1
DVSS_PWM1
PWM1_LI
PWM1_LD
VR_DIG1
DVSS1
DVDD1
VR_ANA
AVSS_OSC
XTAL_OUT
XTAL_IN
AVDD_OSC
VR_ANA2
AVSS_PLL
PLL_FLTM
PLL_FLTP
AVDD_PLL
AVSS_LO
LINEOUT1R
LINEOUT1R
PZT PACKAGE
(TOP VIEW)
DVDD_PWM2
PWM2_RD
PWM2_RI
PWM3_LD
PWM3_LI
DVSS_PWM3
DVDD_PWM3
PWM3_RD
PWM3_RI
VALID/SYNC
DVDD2
DVSS2
VREG_EN
RSVD
MCLKOUT
LRCLKOUT
SCLKOUT
SDOUT1
SDOUT2/SPDIF_OUT
SPDIF_IN
SDIN3
SDIN2
SDIN1
LRCLKIN
SCLKIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
AVDD_LO
AVDD_REF
V1P5_REF
BG_REF
BIAS_REF
LINEIN10R
LINEIN10L
AVSS_LI3
LINEIN9R
LINEIN9L
AVDD_LI3
LINEIN8R
LINEIN8L
AVDD_ADC
LINEIN7R
LINEIN7L
AVSS_ADC/REF
LINEIN6R
LINEIN6L
AVSS_LI2
LINEIN5R
LINEIN5L
AVDD_LI2
LINEIN4R
LINEIN4L
MCLKIN
DVSS_DPLL
VR_DIG2
DVDD3
DVSS3
I2C_SDA2
I2C_SCL2
I2C_SDA1
I2C_SCL1
CS
GPIO1
GPIO2
MUTE
RESET
DVSS4
VR_DIG3
DVDD4
LINEIN1L
LINEIN1R
AVSS_LI1
LINEIN2L
LINEIN2R
AVDD_LI1
LINEIN3L
LINEIN3R
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DESCRIPTION
The TAS3308 is a highly-integrated audio system-on-chip (SOC) consisting of a fully-programmable 48-bit digital
audio processor, 10:1 stereo analog input MUX, stereo ADC, six PWM output channels, and other analog
functionality. The TAS3308 is programmable with the graphical PurePath Studio™ and suite of DSP code
development software. PurePath Studio™ is a highly intuitive, drag-and-drop development environment that
minimizes software development effort while allowing the end user to utilize the power and flexibility of the
TAS3308's digital audio processing core.
TAS3308 processing capability includes speaker equalization and cross over, volume/bass/treble control, signal
mixing/MUXing/splitting, delay compensation, dynamic range compression, and many other basic audio
functions. Audio functions such as matrix decoding, stereo widening, surround sound virtualization and
psychoacoustic bass boost are also available with either third-party or TI royalty-free algorithms.
The TAS3308 contains a custom-designed, fully-programmable 135-MHz, 48-bit digital audio processor. A 76-bit
accumulator ensures that the high precision necessary for quality digital audio is maintained during arithmetic
operations.
A stereo 100-dB DNR ADC and six 105-dB DNR PWM output channels ensure that high quality audio is
maintained through the whole signal chain. The PWM outputs utilize TI's PurePath Digital PWM technology and
seamlessly interface with TI's extensive line of PWM input class D audio amplifiers.
Ordering Information
PACKAGE (1)
TA
0°C to 70°C
(1)
2
TQFP – PZT
ORDERABLE PART NUMBER
Tray
TAS3308PZT
Tape and reel
TAS3308PZTR
TOP-SIDE MARKING
TAS3308PZT
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
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Copyright © 2008–2010, Texas Instruments Incorporated
Product Folder Link(s): TAS3308
TAS3308
SLES215C – FEBRUARY 2008 – REVISED AUGUST 2010
www.ti.com
The TAS3308 comprises nine functional blocks:
• Analog input/MUX/stereo ADC
• Three stereo PWM output for speaker/headphone/stereo
• Line driver outputs
• Clock, digital PLL, analog PLL, serial data interface, and auto-detect system
• Serial control interface/device control
• Audio DSP – digital audio processing
• 8051 device controller
• Power supply
• Internal references
RESET
CS0
I2C_2
I2C_1
GPIO1–2
PLL
FILTER
MUTE
Block Diagram
MCLK
2
PWMCLK,
ADCCLK
APLL
IC
RESET
POWER
AutoDetect
XTAL
SDIN1–3,
LRCLKI,
SCLKI
OSC
%2
DPLL
DIGCLK
Input Serial
Audio Port
1–3
REFERENCE
8051 Device
Micro-Controller
1024 W
DATA RAM
Output Serial
Audio Port
1024 W
COEF RAM
LRCLKO, SCLKO,
MCLKO
SDOUT1
360 MS
DELAY RAM
SPDIF
Digital
Audio Processor
SPDOUT/SDOUT2
SPDIN
10 STEREO
ANALOG IN
Stereo
ADC
Sync
Decimation
Decimation
FW
Interpolation
PWM
1–3
VALID
PWM1L(I+D),R(I+D)
PWM2L(I+D),R(I+D)
PWM3L(I+D),R(I+D)
LINEOUT1(L+R)
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Copyright © 2008–2010, Texas Instruments Incorporated
Product Folder Link(s): TAS3308
3
TAS3308
SLES215C – FEBRUARY 2008 – REVISED AUGUST 2010
www.ti.com
APPLICATION INFORMATION
3.3V
TAS3308
DVDD1
0.1 u
10p (TBD)
DVSS1
MCLK_IN
3.3V
XTAL_OUT
1M
SCLK_IN
DVDD2
LRCLK_IN
0.1 u
24.576M
XTAL_IN
10p (TBD)
DVSS2
SDIN_1
SDIN_2
3.3V
DVDD3
0.1 u
DVSS3
VR_ANA2
SDIN_3
AVDD_PLL
GPIO_1
AVSS_PLL
3.3V
0.1u
4.7u
0.01u
0.1u
GPIO_2
3.3V
DVDD4
0.1 u
DVSS4
MUTE
PLL_FLTM
RSVD
PLL_FLTP
RESET
VREG_EN
220
220
0.01u
0.1u
I2C_SCL1
I2C_SDA1I
3.3V
AVDD_LI1
VR_ANA1
AVSS_SOC
VR_ANA2
AVSS_PLL
VR_DIG1
DVSS1
VR_DIG2
DVSS_DPLL
VR_DIG3
DVSS4
4. 7u
0.1u
AVSS_LI1
4.7 u
3.3V
AVDD_LI2
4.7 u
AVSS_LI2
4.7 u
0.1u
3.3V
4.7 u
AVDD_LI3
0.1u
CS
MCLKOUT
SCLKOUT
LRCLKOUT
SDOUT1
SPDIFOUT/SDOUT2
47K
AVSS_LI3
I2C_SCL2
I2C_SDA2
LINEIN1L
SPDIFIN
47K
LINEIN2L
3.3V
PWM1LI
47K
AVDD_OSC
LINEIN3L
0.1u
47K
AVSS_OSC
47K
3.3V
47K
AVDD_REF
47K
0.1u
47K
3.3V
LINEIN4L
LINEIN5L
PWM1RI
LINEIN7L
47K
PWM2LI
PWM2RI
47K
AVSS_LO
LINEIN10L
LPF
PWM2LD
LINEIN9L
0.1u
LPF
PWM1RD
LINEIN6L
LINEIN8L
AVDD_LO
LPF
PWM1LD
LPF
PWM2RD
3.3V
47K
AVDD_ADC
LINEIN1R
47K
0.1u
AVSS_ADC/REF
47K
47K
47K
22
DVDD_PWM1
47K
LINEIN3R
PWM3LD
DVSS_PWM1
LINEIN7R
47K
LINEIN8R
DVDD_PWM2
47K
LINEIN9R
10u
47K
DVSS_PWM2
LINEIN10R
22
DVDD_PWM3
10u
DVSS_PWM3
BIAS_REF
24 K
DVDD
±20
mA
IOK
Output clamp current
VO < 0 or VO > DVDD
±20
mA
Tstg
Storage temperature range
150
°C
(1)
(2)
(3)
(4)
–65
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operation
conditions is not implied. Exposure to absolute-maximum conditions for extended periods may affect device reliability.
AVDD is an internal 1.8-V supply derived from a regulator in the TAS3308 chip. Pin XTAL_IN is the only TAS3308 input that is
referenced to this 1.8-V logic supply. The absolute maximum rating listed is for reference; only a crystal should be connected to
XTAL_IN.
DVDD is an internal 1.8-V supply derived from regulators in the TAS3308 chip. DVDD is routed to DVDD_BYPASS_CAP to provide
access to external filter capacitors, but should not be used to source power to external devices.
Pin XTAL_OUT is the only TAS3308 output that is derived from the internal 1.8-V logic supply AVDD. The absolute maximum rating
listed is for reference; only a crystal should be connected to XTAL_OUT. AVDD is also routed to AVDD_BYPASS_CAP to provide
access to external filter capacitors, but should not be used to source power to external devices.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
DVDD
Digital supply voltage
AVDD
Analog supply voltage
DVDD_PWM
PWM supply voltage
VIH
High-level input voltage
MEASUREMENTS
MIN
NOM
MAX
3
3.3
3.6
V
3.3 V analog
3
3.3
3.6
V
3.3 V PWM
3
3.3
3.6
V
3.3 V TTL
2
3.3 V LVCMOS (I2C)
1.8 V LVCMOS (XTAL_IN)
0.7 × VDDS
V
1.26
3.3 V TTL
VIL
Low-level input voltage
3.3 V LVCMOS (I2C)
0.8
0.3 × VDDS
0
1.8 V LVCMOS (XTAL_IN)
TA
Operating ambient air temperature
TJ
Junction temperature
Specifying parametrics
Specifying functions
25
70
–20
25
70
96
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Product Folder Link(s): TAS3308
V
0.54
0
0
Copyright © 2008–2010, Texas Instruments Incorporated
UNIT
°C
°C
5
TAS3308
SLES215C – FEBRUARY 2008 – REVISED AUGUST 2010
www.ti.com
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
VOH
High-level output voltage
VOL
Low-level output voltage
High-impedance output
current
IOZ
IIL
IIH
(1)
(2)
IDVDD
MEASUREMENT
Digital supply current
Analog supply current
IAVDD
MAX
IOH = –4 mA
3.3 V LVCMOS (I2C)
IOH = –0.10 mA
1.8 V LVCMOS
(XTAL_OUT)
IOH = –0.6 mA
3.3 V TTL
IOL = 4 mA
0.5
3.3 V LVCMOS (I2C)
IOL = 0.10 mA
0.2
1.8 V LVCMOS
(XTAL_OUT)
IOL = 1.8 mA
V
1.197
V
0.585
±20
3.3 V LVCMOS (I2C)
Driver only, driver disable
3.3 V TTL
VI = VIL
±1
3.3 V LVCMOS (I C)
VI = VIL, Receiver only
±1
1.8 V LVCMOS
(XTAL_IN)
VI = VIL
±1
VI = VIH
±1
3.3 V LVCMOS (I C)
VI = VIH, Receiver only
±1
3.3 V TTL
VI = VIH
±1
2
UNITS
2.4
VDDS – 0.2
3.3 V TTL
1.8 V LVCMOS
(XTAL_IN)
High-level input current
MIN
3.3 V TTL
2
Low-level input current
TEST CONDITIONS
±20
µA
µA
µA
DSP clock = 135 MHz
LRCLKIN/LRCLKOUT = 48 KHz,
XTALI = 24.576 MHz
160
mA
DSP clock = 135 MHz
LRCLKIN/LRCLKOUT = 48 KHz,
XTALI = 24.576 MHz
40
mA
IDVDD
Digital supply current
RESET = LOW
100
mA
IAVDD
Analog supply current
RESET = LOW
10
mA
(1)
(2)
6
Value given is for those input pins that connect to an internal pullup resistor as well as an input buffer. For inputs that have a pulldown
resistor or no resistor, IIL is ±1 µA.
Value given is for those input pins that connect to an internal pulldown resistor as well as an input buffer. For inputs that have a pullup
resistor or no resistor, IIH is ±1 µA.
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Copyright © 2008–2010, Texas Instruments Incorporated
Product Folder Link(s): TAS3308
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
(3)
Device Marking
(4/5)
(6)
TAS3308PZT
ACTIVE
TQFP
PZT
100
90
RoHS & Green
NIPDAU
Level-3-260C-168 HR
0 to 70
TAS3308PZT
TAS3308PZTR
ACTIVE
TQFP
PZT
100
1000
RoHS & Green
NIPDAU
Level-3-260C-168 HR
0 to 70
TAS3308PZT
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
