TAS5412Q1PHDEVM

User's Guide SLOU344 – September 2013 TAS5412-Q1 Evaluation Module The purpose of the TAS5412-Q1 evaluation module (EVM) is to demonstrate the capabilities of the TAS5412-Q1 device. Access for all the device features is available through the hardware and the software graphical user interface (GUI) supplied. This user’s guide contains a description of the EVM and the GUI. Included are the EVM schematics, bill of materials, and the board layout. 1 2 3 Contents Quick-Start Guide ........................................................................................................... 1 EVM Description ............................................................................................................ 4 TAS5412-Q1 EVM Schematics, Board Layouts, and Bill of Materials ............................................... 8 List of Figures 1 EVM Connections ........................................................................................................... 2 2 End Panel for Input and Output Connections ........................................................................... 2 3 End Panel for I2C Connections ............................................................................................ 3 4 Main Window ................................................................................................................ 3 5 Wiring Harness for Power and Speaker Connections.................................................................. 4 6 TAS5412-Q1 EVM Schematic (Sheet 1 of 2) ........................................................................... 8 7 TAS5412-Q1 EVM Schematic (Sheet 2 of 2) ........................................................................... 8 8 TAS5412-Q1PHD Top Layer .............................................................................................. 9 9 TAS5412-Q1PHD Mid Layer Level 1 ..................................................................................... 9 10 TAS5412-Q1PHD Mid Layer Level 2 ................................................................................... 10 11 TAS5412-Q1PHD Bottom Layer ......................................................................................... 10 12 TAS5412-Q1PHD Top Silkscreen Overlay ............................................................................. 11 13 TAS5412-Q1PHD Bottom Silkscreen Overlay ......................................................................... 11 List of Tables 1 1 Bill of Materials for TAS5412-Q1 PHD EVM ........................................................................... 12 Quick-Start Guide This section provides a guide to set up and power up the EVM without the details in its operation. For more detailed operation, read the complete guide. 1.1 Overview The EVM consists of a single printed-circuit board (PCB) mounted inside a metal chassis for EMC testing. The EVM must have an external I2C controller board to function. The USB-to-I2C controller board connects to a personal computer (PC) through a USB cable. The EVM connects to the I2C controller through a supplied 6-pin DIN cable. The PC needs the graphical user interface (GUI) software to control the EVM. See Figure 1 for the device connections. Hardware provided in the EVM modules consists of the EVM, an I2C controller board, a USB cable, a 6pin DIN cable, and speaker cables. SLOU344 – September 2013 Submit Documentation Feedback TAS5412-Q1 Evaluation Module Copyright © 2013, Texas Instruments Incorporated 1 Quick-Start Guide www.ti.com Figure 1. EVM Connections 1.2 Software Installation The software is available on the TI Web site. Run the setup.exe program to install the GUI. For more details, read Section 2.2, Graphical User Interface. 1.3 Connections The connections are for an analog signal for the input, speaker loads, power, and I2C. Connect the audio inputs through the two RCA connectors. Connect the power and speakers using the six-pin connector. Make the I2C connections using a 6-pin DIN connector. The provided cable and adapter PCB connect the EVM to the PC. The adapter PCB is an I2C-to-USB converter, which is an HID device which the PC automatically recognizes when connected. Therefore, there is no need for drivers. The basic connections are: PVDD or power connects to the EVM through the supplied six-pin connector with the twisted red and black wires. The speakers or loads also connect through the same six-pin connector with the twisted red and white wires. The six-pin DIN connects to the I2C-to-USB adapter board. See Figure 2 and Figure 3 for EVM connection details. Figure 2. End Panel for Input and Output Connections 2 TAS5412-Q1 Evaluation Module SLOU344 – September 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Quick-Start Guide www.ti.com 1.4 Initial Power Up Before applying power, check to make sure the Standby control switch is in the Standby Off position, as shown in Figure 3. If the switch is in the Standby On position, then at power up the I2C LED indicator on the GUI is red (see Section 2.2.4.3, Connection Status Panel, for more details). Figure 3. End Panel for I2C Connections Apply power: the Standby, Mute, and Power LEDs should be on. The Fault LED may also be on, but not necessarily. This indicates that the unit is powered, and the TAS5412-Q1 is in standby mode and mute mode. The fault indicated is an undervoltage fault during power up. This is normal and is cleared by reading the I2C Register 0x00 (clicking the Read Faults button) twice. Reading the faults once clears the faults, and the second read is to ensure the clearing of all the faults. 1.5 Basic Graphical User Interface Controls The default state for the device is mute. To unmute, click the Play All button at the top left of the window. To mute, click the Mute All button. Figure 4 shows the main EVM window. Figure 4. Main Window SLOU344 – September 2013 Submit Documentation Feedback TAS5412-Q1 Evaluation Module Copyright © 2013, Texas Instruments Incorporated 3 EVM Description www.ti.com 2 EVM Description 2.1 Description of Input 2.1.1 Analog Inputs Analog inputs are unbalanced, with connections to the EVM through the two RCA jacks. The unbalanced inputs have the shield of the RCA jacks connected to ground. 2.1.1.1 Power The EVM requires one dc power connection. The connection is made through a six-pin supplied connector. The black wire is ground and the red wire connection is to PVDD, which can range from 6 to 24 Vdc. The power-supply voltage must exceed 7 Vdc for proper turnon, but can then dip to 6 Vdc and maintain operation. 2.1.2 Description of Outputs 2.1.2.1 Speaker and Power Connections The six-pin connector on the EVM (and consequently the cables) can be divided into two groups: the power connector and the speaker channel connectors. The power connector consists of a pair of red and black twisted wires which correspond to the plus (+) output and minus (–) output, respectively. This pair of wires must connect to a power supply. The speaker channel connectors consist of the remaining two pairs of red and white twisted wire. Each pair of red and white wires corresponds with a channel. The red wire corresponds to the plus (+) output and the white wire corresponds to the minus (–) output. These wires must terminate to a speaker load or resistive load. See Figure 1 for the location for the power connector, Figure 5 for more details about the speaker cables, and Figure 2 for the speaker-cable connections to the EVM. NOTE: Do not connect any of these outputs to ground. The TAS5412-Q1 has bridged outputs; connecting to ground triggers a fault. Figure 5. Wiring Harness for Power and Speaker Connections One can parallel the outputs can be paralleled by connecting the plus (+) of one channel to the plus (+) of the other channel. Connect the minus (–) connection of one channel and the minus (–) connection of the other channel together also. See the data sheet (SLOS685) for more details on parallel outputs (PBTL). 2.1.3 Controls 2.1.3.1 Standby The Standby switch is located next to the six-pin DIN I2C input connector. The switch is in the Standby On position with the toggle positioned downward. In this position, the switch forces the TAS5412-Q1 into the standby mode. This is the same as a Power-On Reset (POR). POR shuts down the device, and I2C is not functional. With the switch moved to the Standby Off position, the TAS5412-Q1 is in its default power-up mode. The I2C registers are at their default settings. The amplifier output is in Hi-Z mode. 4 TAS5412-Q1 Evaluation Module SLOU344 – September 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated EVM Description www.ti.com 2.1.4 Indicator Description There are five LED indicators on the chassis next to the Standby switch. The LED farthest away from the Standby switch is for the 3.3-Vdc supply. The 3.3-V supply is for the LEDs and the Standby circuit. The other four LEDs indicate the four non-I2C output pins: FAULT, CLIP_OTW, STANDBY, and MUTE. The FAULT and CLIP_OTW signals also go to the six-pin DIN connector for the GUI. In normal play mode, these four LEDs should not light. 2.2 Graphical User Interface 2.2.1 Introduction The TAS5412-Q1 GUI software design is for demonstrating the features of the TAS5412-Q1. The software is also able to assist the applications programmer in generating and saving the desired operating characteristics. The TAS5412-Q1 GUI has a feature by which it can log the I2C data being sent to the device. This can be helpful to the programmer in understanding the I2C commands needed for proper function. 2.2.2 Software Installation The GUI software is available on www.ti.com. Search for literature number SLOC296 and download the zip file. Run the setup.exe program on a personal computer (PC) with the Windows™ OS to install the GUI. The software is currently supported on Windows XP and Windows 7. The GUI requires the Microsoft .NET environment. If it is not already installed on the PC, it can be downloaded from www.microsoft.com. 2.2.3 Hardware Installation In the EVM package is a small PCB labeled USB2IIC-2. This is the USB-to-I2C converter used to communicate with the EVM. Connect the USB cable to the PC and the PCB. Connect one end of the sixpin cable to the socket labeled I2C on the converter PCB. Connect the other end to the six-pin socket on the EVM. The USB connection provides power for this card. The PC should automatically connect to the USB-connected PCB. See Figure 1 for more details. 2.2.4 2.2.4.1 Using the GUI The Main Window SLOU344 – September 2013 Submit Documentation Feedback TAS5412-Q1 Evaluation Module Copyright © 2013, Texas Instruments Incorporated 5 EVM Description 2.2.4.1.1 www.ti.com TAS5412-Q1 Control Panel The control panel consists of six buttons that perform basic functions on all four channels. Reset: This button sends a software reset to the device via I2C. Clicking the button is equivalent to sending 0x9F to register 0x0C. All the I2C defaults are restored. Read Faults: This button reads the two fault registers 0x00 and 0x01 and reports the data to the Device Status panel. Load Diag: This button runs a script to perform the built-in load diagnostics and reports any faults to the Device Status panel. The details are displayed for each channel. Play All: This button uses I2C to write 0x09 to register 0x0C, which places all four channels into play mode. Mute All: This button uses I2C to set all channels to mute mode by writing 0x10 to register 0x0C. All channels switch at 50% duty cycle, and no signal passes from the input to the output. Hi-Z All: This button places all four channel outputs into a high-impedance state by writing 0x1F to register 0x0C. This action first places the device in mute, then invokes the Low-Low state, and lastly places the outputs in Hi-Z. 2.2.4.2 Device Status Panel Device Panel Title: The title at the top of the Device Status panel shows the device to which the GUI is set to communicate. The four options are: Master, Slave1, Slave 2, and Slave 3. Use the Device Select menu item to changed this option. Global: This provides fault feedback from the device. If a fault occurs, a red Fault is indicated. Read the fault detail in tregisters 0x00 and 0x01. Temperature: This shows the temperature of the device. When the device is below 125ºC, the color is green. At Level 1 OTW, the color is yellow. At Level 2 OTW, the color is orange. At Level 3 OTW, the color is red. Channel 1 and Channel 2: These two items provide individual-channel output states: Hi-Z, Mute, LowLow, and Play. The display shows the gain setting with the play indication. Fsw: This item provides the switching frequency of the outputs. 2.2.4.3 Connection Status Panel There are two LED indicators to provide connection status. USB: The indicator is Green when a connection is good. This indicator is Gray when there is no USB connection to the USB2II2C PCB. The I2C LED is off. I2C: A Green indicator shows that I2C communication is functioning properly. It is Red when there is no I2C connection, but a USB connection. If the LED is off, then there is no USB connection. 2.2.4.4 I2C Log Panel All the I2C commands that are sent or received by the TAS5412-Q1 are shown in this panel except for I2C polling information. The displayed data can be copied to the clipboard for a programming aid. This type of information can be controlled by the I2C Log menu item. An R indicates a value read from the device and a W indicates a value sent to the device. Valuable comments are also provided. Polled I2C reads are not shown to prevent over-running the panel with background reads. See Section 2.2.4.7, Menu → I2C Log, for further details on each tab. 6 TAS5412-Q1 Evaluation Module SLOU344 – September 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated EVM Description www.ti.com 2.2.4.5 Register Overview Panel This panel provides the hexadecimal (hex) data for each I2C register. One can directly change the hex data control registers here and send the settings to the device with the Apply button. Clicking the Cancel button clears any changes made to the data. Either changing the register’s hex value directly or clicking on the register and changing the specific bit in the Register Detail panel updates the Register Detail panel (see Section 2.2.4.6, Register Detail Panel). 2.2.4.6 Register Detail Panel This panel provides a detailed view of each register. By clicking on a register in the Register Overview panel, the details of that register are shown. Each bit has its description and its value shown by the checkbox. A checkbox with a check mark indicates a logical 1 and an unchecked checkbox indicates a logical 0. One can change any bit by clicking on its checkbox. Clicking on the Apply button in the Register Overview panel sends the changes to the device. 2.2.4.7 Menu File: In this menu, the Exit function is at the bottom of the drop-down menu. Device Select: One can change he I2C device-select value in the menu. For the EVM, use the default value, which is Master. Macros: This menu allows the use of macros. TI has not implemented the use of macros at this time. Custom Macros: This will allow the users to create then save their own macros for later use. Preloaded Macros: This menu item will provide a list of built-in macros to perform typical I2C routines. Read: This menu contains the Read panel controls. Fault Registers: When selected, the I2C log displays the values of the fault registers. Note that reading fault registers is different from reading faults. Load Diagnostic Registers: When selected, the values of the load diagnostic registers are read and displayed in the I2C log. Status Registers: When selected, the values of the status registers are read and displayed in the I2C log. Control Registers: When selected, the values of the control registers are read and displayed in the I2C log. All Registers: When selected, the values of all the registers are read and displayed in the I2C log. Options: This menu contains the Options panel controls. Crosstalk Compensation Enabled: Selection of this option optimizes crosstalk. With this option disabled, the standard operation optimizes PSRR. 180 Phase Difference: When selected, the channels switch at 180° phase difference. Switching Frequency: When selected, one can set the switching frequency for AM avoidance to 357 kHz or 500 kHz. All Channels Gain: Selecting this option allows changing the gain on all the channels to 12 dB, 20 dB, or 32 dB. I2C Log: This menu contains the I2C Log panel controls. Enabled: When selected, this menu option shows the I2C Log panel. Deselecting hides the I2C Log panel. Show I2C Reads: When selected, this menu option shows the value read from the device. An R indicates read values. Show I2C Writes: When selected, this menu option shows the values sent to the device. A W indicates written values. Show Comments: When selected, this menu option shows the comments. Deselecting hides the comments. Clear: The menu item clears the log data. The data is lost. I2C Polling: This menu contains the I2C Polling panel controls. SLOU344 – September 2013 Submit Documentation Feedback TAS5412-Q1 Evaluation Module Copyright © 2013, Texas Instruments Incorporated 7 TAS5412-Q1 EVM Schematics, Board Layouts, and Bill of Materials www.ti.com Enabled: When selected, the I2C actively samples the status registers specifically. With I2C Polling disabled, there is no assurance that the register readings are valid. Rate: When selected, one can change the poll rate (in ms). The default setting is 250 ms. Help: About: This provides the revision level of the software. 3 TAS5412-Q1 EVM Schematics, Board Layouts, and Bill of Materials 3.1 TAS5412-Q1PHD EVM Schematic UA78M33CDCY 3.3V U3 3 IN C57 0.1uF 1 OUT GND 2 3.3V R2 4.7K R1 R3 4.7K 20K L1 P1 1 2 3 4 5 6 7 R4 10uH C9 1uF/50V C10 1uF/50V C5 C6 C7 C1 4.7u C8 47 C18 330nF 3 /MUTE C19 5 NC GND D_BYP OUT1_M 0.1uF OUT1_P 6 7 8 9 10 GND GND CP_TOP CP CP_BOT GND GND Channel 2 GND GND R8 NC R25 C44 499 1200pF/50V R37 C11 44 5.6 1 3 R10 42 5.6 C28 1uF/50V 41 L2 2 1nF/50V 43 C15 C12 C13 470nF/25V 10nF/25V C14 C29 470nF/50V C16 4 Dual_Inductor 1nF/50V 470nF/25V 1 2 3 4 5 6 Output C17 10nF/25V 40 C20 R12 39 38 1 5.6 C59 0.1uF 3 37 C24 R14 36 L3 2 C23 1nF/50V 5.6 4 Dual_Inductor 1nF/50V C30 C21 C22 470nF/25V 10nF/25V 470nF/50V C25 470nF/25V C26 10nF/25V 35 34 33 GND GND GND NC GND PVDD PVDD PVDD IN1_P GND GND GND GND GND GND 16 27 28 29 499 15 CAP2 R24 R22 C38 499 1200pF/50V 20 R28 0.47uF/16V 49.9K 499 GND C39 J2 R21 OUT2_P 17 Channel 1 R23 0.47uF/16V 49.9K CAP1 21 22 23 24 25 26 14 C37 J1 OUT2_M GND IN3_P 13 IN_M 12 45 A_BYP 19 C58 0.1uF P2 46 1uF/50V REXT 18 0.1uF 47 C27 GND 20K 11 C4 2200pF 48 GND R16 C33 C3 0.082uF 30 31 32 Rext /CLIP_OTW C2 4.7u 330uF/35V 51 50 49 54 53 52 /STANDBY 330uF/35V GND GND GND NC U1 TAS5412-Q1 PHD S1 4 60 59 58 57 56 55 61 GND GND GND GND GND GND GND SDA /FAULT 330uF/35V 470nF/63V 2 /MUTE PVDD PVDD PVDD 1 /FAULT /CLIP_OTW /STANDBY OSC_SYNC 64 63 R7 49.9K SCL R6 49.9K 62 OSC_SYNC I2C_ADDR R5 49.9K Header 7 330uF/35V 470nF/63V 3.3V C51 1uF/50V C50 1uF/50V C55 1uF/16V249 S001 Figure 6. TAS5412-Q1 EVM Schematic (Sheet 1 of 2) D1 R44 3.3V 470 GRN D2 R45 /FAULT 470 RED D3 R46 /CLIP_OTW 470 RED D4 R47 /STANDBY 470 RED 3.3V /MUTE Q1 D5 R48 YEL 332 S002 Figure 7. TAS5412-Q1 EVM Schematic (Sheet 2 of 2) 8 TAS5412-Q1 Evaluation Module SLOU344 – September 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated www.ti.com 3.2 TAS5412-Q1 EVM Schematics, Board Layouts, and Bill of Materials Board Layouts Figure 8. TAS5412-Q1PHD Top Layer Figure 9. TAS5412-Q1PHD Mid Layer Level 1 SLOU344 – September 2013 Submit Documentation Feedback TAS5412-Q1 Evaluation Module Copyright © 2013, Texas Instruments Incorporated 9 TAS5412-Q1 EVM Schematics, Board Layouts, and Bill of Materials www.ti.com Figure 10. TAS5412-Q1PHD Mid Layer Level 2 Figure 11. TAS5412-Q1PHD Bottom Layer 10 TAS5412-Q1 Evaluation Module SLOU344 – September 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated www.ti.com TAS5412-Q1 EVM Schematics, Board Layouts, and Bill of Materials Figure 12. TAS5412-Q1PHD Top Silkscreen Overlay Figure 13. TAS5412-Q1PHD Bottom Silkscreen Overlay SLOU344 – September 2013 Submit Documentation Feedback TAS5412-Q1 Evaluation Module Copyright © 2013, Texas Instruments Incorporated 11 TAS5412-Q1 EVM Schematics, Board Layouts, and Bill of Materials 3.3 www.ti.com Bill of Materials Table 1. Bill of Materials for TAS5412-Q1 PHD EVM Designator Value Description Manufacturer, P/N P/N (DIGIKEY) QTY C1, C2 4.7 µF Ceramic capacitor TDK, C2012X5R1E475K 445-4116-1-ND 2 C3 0.082 µF Ceramic capacitor Panasonic, ECJ-2YB1H823K PCC1839CT-ND 1 C4 2200 pF Ceramic capacitor Panasonic, ECJ-2VB1H222K PCC222BNCT-ND 1 C5, C6, C7, C8 330 µF, 35 V Electrolytic capacitor Nichicon, UVR1V331MPD 493-1083-ND 4 C9, C10, C27, C28, C50, C51 1 µF, 50 V Ceramic capacitor TDK,C3216X7R1H105K, 445-1423-1-ND 6 C11, C15, C20, C24 1nF, 50V Ceramic capacitor TDK, C3216X7R1H105K 445-1423-1-ND 4 C12, C16, C21, C25, 470 nF, 25 V Ceramic capacitor TDK,C2012X7R1E474K 445-1353-1-ND 4 C13, C17, C22, C26 10 nF, 25 V Ceramic capacitor Panasonic, ECJ-1VB1E103K PCC1763CT-ND 4 C29, C30 470nF, 50V Ceramic capacitor TDK, CGA5L2X7R1H474K160AA 445-5700-1-ND 2 C14, C23 470 nF, 63 V Film capacitor EPCOS, B32529C474J, not populated 495-1110-ND 2 C18 220 nF Ceramic capacitor Kemet, C0603C224K4RACTU 399-5619-1-ND 1 C19, C33, C57 0.1 µF Ceramic capacitor Panasonic, ECJ-1VB1C104K PCC1762CT-ND 3 C20, C24, C29, C34 1 nF, 50 V Ceramic capacitor Panasonic, ECJ-2VB1H102K PCC102BNCT-ND 4 C29, C30 470 nF, 50 V Ceramic capacitor TDK,CGA5L2X7R1H474K160AA 445-5700-1-ND 2 C37, C39 0.47 µF, 16 V Ceramic capacitor Panasonic, ECP-U1C474MA5 PCF1130CT-ND 2 C38, C44 1200pF, 50 V Ceramic capacitor Panasonic, ECJ-1VB1H122K PCC1773CT-ND 2 C55 1 µF, 16 V Film capacitor Panasonic, ECP-U1C105MA5 PCF1132CT-ND 1 D1 GRN Typical green GaAs LED Lumex, SML-LX0603GW-TR 67-1549-1-ND 1 D2, D3, D4 RED Typical red GaAs LED Lumex, SML-LX0603SRW-TR 67-1551-1-ND 3 D5 YEL Typical yellow GaAs LED Lumex, SML-LX0603YW-TR 67-1550-1-ND 1 J1, J2 Input connector RCA phono jack, right-angle, thru-hole, snap-in CUI, RCJ-011 CP-1400-ND 2 L1 10 µH Inductor Coilcraft, SER2918H-223KL L2, L3 Dual_inductor Dual inductor Toko, HEAW LP1 LIGHTPIPE 5 POS Horizontal, LED Light pipe Lumex, LPF-C051303S 67-1856-ND 1 P1 I2C connector Female Mini-DIN connector CUI, MD-60S CP-2460 1 P2 Output 6-Pin, Right Angle, connector Samtech, IPBT-106-H1-T-S-RA Q1 N MOS N MOS FET IR, IRLMS5703TRPBF IRLMS5703PBFCT-ND 1 R1, R16 20 kΩ RESISTOR Panasonic, ERJ-3EKF2002V P20.0KHCT-ND 2 R2, R3 4.7 kΩ RESISTOR Panasonic, ERJ-3EKF4701V P4.70KHCT-ND 2 R4 47 Ω RESISTOR Panasonic, ERJ-3EKF47R0V P47.0HCT-ND 1 R5, R6, R7, R28, R33 49.9 kΩ RESISTOR Panasonic,ERJ-3EKF4992V P49.9KHCT-ND 5 12 TAS5412-Q1 Evaluation Module 1 2 1 SLOU344 – September 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated TAS5412-Q1 EVM Schematics, Board Layouts, and Bill of Materials www.ti.com Table 1. Bill of Materials for TAS5412-Q1 PHD EVM (continued) Designator Value Description Manufacturer, P/N P/N (DIGIKEY) R8, R10, R12, R14 5.6 Ω RESISTOR Susumu, RL1220S-5R6-F RL12S5.6FCT-ND 4 R21, R22, R24, R25 499 Ω RESISTOR Panasonic, ERJ-3EKF4990V P499HCT-ND 4 R37 249 Ω RESISTOR Panasonic, ERJ-3EKF2490V P249HCT-ND 1 R44, R45, R46, R47 470 Ω RESISTOR Panasonic, ERJ-3GEYJ471V P470GCT-ND 4 R48 332 Ω RESISTOR Panasonic, ERJ-3EKF3320V P332HCT-ND 1 S1 S1 E-Switch, SPDT, right-angle E-Switch, 100SP1T2B4M7RE EG2364-ND 1 U1 TAS5412-Q1PHD Amplifier, 2 channel TI,. TAS5421TQ1PHDR U3 UA78M33CDCY Positive-Voltage Regulator TI,. UA78M33CDCYR SLOU344 – September 2013 Submit Documentation Feedback QTY 1 296-13424-1-ND 1 TAS5412-Q1 Evaluation Module Copyright © 2013, Texas Instruments Incorporated 13 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. 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