TAS5504APAG

Errata SLEZ009 – April 2006 TAS5504A Errata 1 Volume/Mute Operation With Remapped Output Mixer 1.1 Problem Description When the TAS5504A output mixer is used to mix several channels together or to route information from one DAP channel to a different PWM channel, then the TAS5504A can exhibit an unexpected response if one or more individual channels are set to mute. The mute can be performed with an individual channel mute or when the master volume plus individual volume is below –109 dB (0x1FC). The issue is that the PWM channels corresponding to muted DAP channels are not restarted when coming out of an all-channel shutdown. All-channel shutdowns happen as a response to master mute, mute-pin assertion, I2S clock error, or AM mode change. Using the pass-through output mixer configuration avoids this problem. 1.2 System Impact If using the remapped output mixer configuration, then after resuming from an all-channel shutdown, the remapped output channels do not stream audio. 1.3 Workaround Application software must ensure that combined master volume + channel volume does not go below –109 dB for all channels. 0xD0 Bit 30 Ouput Mixer Configuration Mode PWM (Speaker) Operation 1 Pass-through 4-channel mode Normal operation 0 (default) Remapped 4-channel mode Constraints are placed in setting the combined volume below –109 dB and in using individual channel mute. When remapping or mixing DAP channels to different PWM output channels (remapped output mixer configuration), consider the following limitations: • Individual channel mute should not be used. • The sum of the minimum channel volume and master volume must not be below –109 dB. • 0xD0 bit 30 = 0 2 DRC Control Timing 2.1 Problem Description Write operations to the DRC2 control register (0x97) can be missed if the values of the DRC1 control register (0x96) and DRC2 control register (0x97) are updated in successive I2C operations. The issue is that a DRC2 control register update can be missed if it occurs immediately following a DRC1 control register update. SLEZ009 – April 2006 Submit Documentation Feedback TAS5504A Errata 1 www.ti.com PSVC Control When Using Subwoofer as Lineout 2.2 System Impact The DRC2 control register configuration is changed, but due to an internal timing error in the DRC2 control register, the requested change is not recognized. 2.3 Workaround Provide a 10-ms delay between I2C writes to the DRC1 control register (0x96) and DRC2 control register (0x97). 3 PSVC Control When Using Subwoofer as Lineout 3.1 Problem Description The problem occurs when the subwoofer is configured as lineout while PSVC is enabled. One of the PSVC modes is called subwoofer not part of PSVC calculation. Normally, this mode is used when the subwoofer is configured as lineout. However, an audible problem occurs during volume changes. In this case, the subwoofer is always used for PSVC calculation even though it is configued not to do so (e.g., as lineout). So, during the volume ramp, the transient values are not correct, thereby creating audible artifacts. 3.2 System Impact When the subwoofer is configured as lineout with PSVC enabled, audible artifacts can occur during volume changes. 3.3 Workaround The subwoofer cannot be used as lineout if PSVC is enabled. ———————————————————— 4 Use of 5-V CMOS I2C Drivers 4.1 Problem Description In systems using 5-V CMOS buffers for the I2C interface, special pullup resistors are required. The I2C specification requires that VIH is 0.7 × VDD = 3.5 V when VDD is 5 V. In some 5-V CMOS systems, the normal value for the I2C pullup resistor is 4.7 kΩ. This could cause the voltage not to rise above 3.47 V, which violates the specification. The root cause has been identified as a TAS5504A 5-V tolerant buffer issue. 4.2 System Impact 1. No impact for 3.3-V operation 2. No impact for TTL operation 3. Impact only for 5-V CMOS operation where VIH could be lower than the specification of 3.5 V. 2 TAS5504A Errata SLEZ009 – April 2006 Submit Documentation Feedback www.ti.com One-Sample Delay in Channels 3 and 4 4.3 Workaround It is recommended that the I2C pullup resistors, RP, be 3.3 kΩ (see Figure 1). If a series resistor is in the circuit (see Figure 2), then the series resistors, RS, should be less than or equal to 300 Ω. 5V TAS5504A External Microcontroller IP RP SDA SCL IP RP VI(SDA) VI(SCL) B0099-02 Figure 1. I2C Pullup Circuit (With No Series Resistor) 5V TAS5504A External Microcontroller RP (2) (2) SDA or SCL VI IP RS RS (1) VS B0100-02 (1) VS = 5 × RS/(RS + RP). When driven low, VS