TAS5602DCA

TAS5602DCA

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    TSSOP56

  • 描述:

    IC AMP AUDIO PWR 20W D 56TSSOP

  • 数据手册
  • 价格&库存
TAS5602DCA 数据手册
TAS5602 www.ti.com................................................................................................................................................... SLAS593B – JUNE 2008 – REVISED NOVEMBER 2008 20W STEREO DIGITAL AMPLIFIER POWER STAGE • FEATURES 1 • Supports Multiple Output Configurations – 2×20-W into a 8-Ω BTL Load at 18 V – 4×10-W into a 4-Ω SE Load at 18 V – 2×10W (SE) + 1×20W (BTL) at 18 V • Thermally Enhanced Package – DCA (56-pin HTTSOP) • Wide Voltage Range: 10V–26V – No Separate Supply Required for Gate Drive • Efficient Class-D Operation Eliminates Need for Heat Sinks • Closed Loop Power Stage Architecture – Improved PSRR Reduces Power Supply Performance Requirements – High Damping Factor Provides for Tighter, More Accurate Sound With Improved Bass Response – Constant Output Power Over Variation in Supply Voltage • Single Ended Inputs 23 Integrated Self-Protection Circuits Including Overvoltage, Undervoltage, Overtemperature, and Short Circuit With Error Reporting APPLICATIONS • • Flat-Panel, Rear-Projection, and CRT TV Consumer Audio Applications DESCRIPTION The TAS5602 is a 20-W (per channel) efficient, stereo digital amplifier power stage for driving 4 single-ended speakers, 2 bridge-tied speakers, or combination of single and bridge-tied loads. The TAS5602 can drive a speaker with an impedance as low as 4Ω. The high efficiency of the TAS5602 eliminates the need for an external heat sink. A simple interface to a digital audio PWM processor is shown below. The TAS5602 is fully protected against faults with short-circuit protection and thermal protection as well as overvoltage and undervoltage protection. Faults are reported back to the processor to prevent devices from being damaged during overload conditions. SIMPLIFIED APPLICATION CIRCUIT 3 - 4.2 V Digital PWM Processor DGND I2S TAS5602 10 - 26 V DVDD DVDD DGND OUTA_P PWM_AP OUTA_N PWM_BP PVCC AVCC BSA OUTA OUTB LC Filter BSB OUTB_P PWM_CP OUTB_N PWM_DP Control Inputs BSC OUTC OUTD LC Filter BSD HIZ VCLAMP_AB VALID ERROR GPIO RESET VCLAMP_CD FAULT BYPASS THERM_WARN AGND SE/BTL PGND 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPad is a trademark of Texas Instruments. System Two, Audio Precision are trademarks of Audio Precision, Inc. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008, Texas Instruments Incorporated TAS5602 SLAS593B – JUNE 2008 – REVISED NOVEMBER 2008................................................................................................................................................... www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. PINOUT DCA PACKAGE (TOP VIEW) PGNDA PGNDA PGNDA PVCCA PVCCA PVCCA NC DVDD DGND PWM_AP NC PWM_BP NC PWM_CP NC PWM_DP HIZ RESET FAULT SE/BTL THERM_WARN NC PVCCD PVCCD PVCCD PGNDD PGNDD PGNDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 OUTA OUTA PGNDB PGNDB PGNDB OUTB OUTB PVCCB PVCCB BSB VCLAMP_AB BSA NC AVCC AGND BYPASS BSD VCLAMP_CD BSC PVCCC PVCCC OUTC OUTC PGNDC PGNDC PGNDC OUTD OUTD TERMINAL FUNCTIONS TERMINAL 2 NO. NAME 40 BSD I/O I/O – DESCRIPTION Bootstrap I/O for channel D high-side FET Internally generated voltage supply for channel C and D bootstrap. Not to be used as a supply or connected to any component other than the decoupling capacitor. 39 VCLAMP_CD 38 BSC I/O 43 AVCC – 42 AGND 8 DVDD I Digital supply (3V–4.2V). Supply for PWM input signal conditioning, FAULT and RST I/O buffers Bootstrap I/O for channel C high-side FET Analog power supply Analog ground 9 DGND I Ground reference input for PWM and digital inputs 10 PWM_AP I Positive audio signal PWM input for channel A 12 PWM_BP I Positive audio signal PWM input for channel B 14 PWM_CP I Positive audio signal PWM input for channel C 16 PWM_DP I Positive audio signal PWM input for channel D Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TAS5602 TAS5602 www.ti.com................................................................................................................................................... SLAS593B – JUNE 2008 – REVISED NOVEMBER 2008 TERMINAL FUNCTIONS (continued) TERMINAL NO. I/O DESCRIPTION NAME 17 HIZ – Forces the output to high impedance state. Use this terminal to quickly ( 150°C ? Yes AVCC > 8.5 V ? Yes No Yes Disable Output . No AVCC > 27.5 V ? Disable Output . No AVCC < 27.0 V ? No Yes Yes Set THERM_WARN = H. Full Shutdown RESET = H ? Enable Output Enable Output Enable Output No Yes Set FAULT = H. Full Restart . Figure 20. Device Protection Flow Chart Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TAS5602 15 TAS5602 SLAS593B – JUNE 2008 – REVISED NOVEMBER 2008................................................................................................................................................... www.ti.com Protection Mechanisms in the TAS5602 • • • • SCP (short-circuit protection, OCP) protects against shorts across the load, to GND, and to PVCC. OTP turns off the device if Tdie (typical) > 150°C. UVP turns off the device if PVCC (typical) < 8.4 V OVP turns off the device if PVCC (typical) > 27.5 V Single-Ended Output Capacitor, CO In single-ended (SE) applications, the dc blocking capacitor forms a high-pass filter with the speaker impedance. The frequency response rolls of with decreasing frequency at a rate of 20 dB/decade. The cutoff frequency is determined by: fc = =πCOZL Table 1 shows some common component values and the associated cutoff frequencies: Table 1. Common Filter Responses CSE – DC Blocking Capacitor (µF) Speaker Impedance (Ω) fc = 60 Hz (–3 dB) fc = 40 Hz (–3 dB) fc = 20 Hz (–3 dB) 4 680 1000 2200 8 330 470 1000 Output Filter and Frequency Response For the best frequency response, a flat-passband output filter (second-order Butterworth) may be used. The output filter components consist of the series inductor and capacitor to ground at the output pins. There are several possible configurations, depending on the speaker impedance and whether the output configuration is single-ended (SE) or bridge-tied load (BTL). Table 2 lists the recommended values for the filter components. It is important to use a high-quality capacitor in this application. A rating of at least X7R is required. Table 2. Recommended Filter Output Components Output Configuration Speaker Impedance (Ω) Filter Inductor (µH) Filter Capacitor (nF) 4 22 680 8 47 390 4 10 1500 8 22 680 Single Ended (SE) Bridge Tied Load (BTL) Lfilter OUTA Lfilter OUTA Cfilter Cfilter OUTB Lfilter Cfilter Figure 21. BTL Filter Configuration 16 Submit Documentation Feedback Figure 22. SE Filter Configuration Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TAS5602 TAS5602 www.ti.com................................................................................................................................................... SLAS593B – JUNE 2008 – REVISED NOVEMBER 2008 Common Mode Resonance The BTL filter shown above is an excellent, low-cost way to attenuate the high frequency energy from the Class D output stage while passing the audio signal cleanly to the speakers. However, at the resonant frequency of the LC combination, ringing can occur as a common mode output from the amplifier. This ringing can result in resonant frequency energy appearing on the speaker leads and can also cause the power dissipation in the filter L and C to increase. To keep the common mode ringing to a reasonable level, some series resistance should be designed into the circuit. Testing and simulations have shown that 75 mΩ of series resistance in the path which includes the filter L and C is enough to control the common mode ringing. The series resistance of the filter coil and the ESR of the cap can be used to form the resistance. The copper traces in series with the filter capacitor are another good place to add some series resistance to the circuit. Another way to improve the common mode ringing is to add an RC network to ground on each output. Testing has shown that a series network consisting of 100Ω and 47 nF is enough to damp the ringing for most speaker systems. Power-Supply Decoupling, CS The TAS5602 is a high-performance CMOS audio amplifier that requires adequate power-supply decoupling to ensure that the output total harmonic distortion (THD) is as low as possible. Power-supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power-supply leads. For higher-frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF to 1 µF, placed as close as possible to the device VCC lead works best. For filtering lower frequency noise signals, a larger aluminum electrolytic capacitor of 220 µF or greater placed near the audio power amplifier is recommended. The 220-µF capacitor also serves as local storage capacitor for supplying current during large signal transients on the amplifier outputs. The PVCC terminals provide the power to the output transistors, so a 220-µF or larger capacitor should be placed on each PVCC terminal. A 10-µF capacitor on the AVCC terminal is adequate. These capacitors must be properly derated for voltage and ripple-current rating to ensure reliability. BSN and BSP Capacitors The half H-bridge output stages use only NMOS transistors. Therefore, they require bootstrap capacitors for the high side of each output to turn on correctly. A 220-nF ceramic capacitor, rated for at least 25 V, must be connected from each output to its corresponding bootstrap input. The bootstrap capacitors connected between the BSx pins and their corresponding outputs function as a floating power supply for the high-side N-channel power MOSFET gate-drive circuitry. During each high-side switching cycle, the bootstrap capacitors hold the gate-to-source voltage high enough to keep the high-side MOSFETs turned on. VCLAMP Capacitor To ensure that the maximum gate-to-source voltage for the NMOS output transistors is not exceeded, one internal regulator clamps the gate voltage. One 1-µF capacitor must be connected from each VCLAMP (terminal) to ground and must be rated for at least 16 V. The voltages at the VCLAMP terminal vary with VCC and may not be used for powering any other circuitry. VBYP Capacitor Selection The scaled supply reference (BYPASS) nominally provides an AVCC/8 internal bias for the preamplifier stages. The external capacitor for this reference (CBYP) is a critical component and serves several important functions. During start-up or recovery from shutdown mode, CBYP determines the rate at which the amplifier starts. The start up time is proportional to 0.5 s per microfarad in single-ended mode (SE/BTL = DVDD). Thus, the recommended 1-µF capacitor results in a start-up time of approximately 500 ms (SE/BTL = DVDD). The second function is to reduce noise produced by the power supply caused by coupling with the output drive signal. This noise could result in degraded power-supply rejection and THD+N. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TAS5602 17 TAS5602 SLAS593B – JUNE 2008 – REVISED NOVEMBER 2008................................................................................................................................................... www.ti.com The circuit is designed for a CBYP value of 1 µF for best pop performance. The input capacitors should have the same value. A ceramic or tantalum low-ESR capacitor is recommended. SE/BTL CONTROL PIN If the SE/BTL CONTROL pin is pulled low (tied to ground), the start-up time is typically 420 msec which is optimized for the bridge tied load (BTL) output configuration. If the SE/BTL pin is pulled high, the start-up time is controlled by the VBYP Capacitor as described in the previous section. For a value of CBYP = 1µF, the start-up time is typically 800 msec. This gives a smooth, pop-free startup for single-ended (SE) output stages. HIZ PIN The HIZ pin can be used to immediately take the Class D output H Bridges to a Hi-Z state in the case of an unexpected power down situation. This allows the user to control the amplifier turn-off quickly if needed. Use a power supply which drops relatively quickly to pull the HIZ pin low before the PVCC reaches the UVLO voltage of 8.4 V (typ.) to avoid popping at power down. RESET OPERATION The TAS5602 employs a RESET mode of operation designed to reduce supply current (ICC) to the absolute minimum level during periods of nonuse for power conservation. The RESET input terminal should be held high (see specification table for trip point) during normal operation when the amplifier is in use. Pulling RESET low causes the outputs to ramp to GND and the amplifier to enter a low-current state. Never leave RESET unconnected, because amplifier operation would be unpredictable. For the best power-up pop performance, place the amplifier in the RESET mode prior to applying the power-supply voltage. USING LOW-ESR CAPACITORS Low-ESR capacitors are recommended throughout this application section. A real (as opposed to ideal) capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance, the more the real capacitor behaves like an ideal capacitor. SHORT-CIRCUIT PROTECTION The TAS5602 has short-circuit protection circuitry on the outputs that prevents damage to the device during output-to-output shorts and output-to-GND shorts after the filter and output capacitor (at the speaker terminal.) Directly at the device terminals, the protection circuitry prevents damage to device during output-to-output, output-to-ground, and output-to-supply. When a short circuit is detected on the outputs, the part immediately disables the output drive. Normal operation is restored once the fault is cleared by cycling the RESET pin. The FAULT will transition low when a short is detected. The FAULT pin will be cleared on the rising edge of RESET after RESET is cycled low to high. THERMAL PROTECTION Thermal protection on the TAS5602 prevents damage to the device when the internal die temperature exceeds 150°C. There is a ±15°C tolerance on this trip point from device to device. Once the die temperature exceeds the thermal set point, the device enters into the shutdown state and the outputs are disabled. This is not a latched fault. The thermal fault is cleared once the temperature of the die is reduced by 20°C. The device begins normal operation at this point with no external system interaction. Thermal protection fault is NOT reported on the FAULT terminal. A THERM_WARN terminal can be used to monitor when the internal device temperature reaches 125°C. The terminal will transition low at this point and transition back high after the device cools approximately 20°C. It is not necessary to cycle RESET to clear this warning flag. 18 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TAS5602 TAS5602 www.ti.com................................................................................................................................................... SLAS593B – JUNE 2008 – REVISED NOVEMBER 2008 THERMAL AND PACKAGE INFORMATION The TAS5602DCA package is the DCA 56-pin TSSOP package. To estimate the junction temperature using measurable parameters, a thermal metric θJT is modeled, which relates the temperature at the top of the package to the junction temperature, TJ. For TAS5602DCA, θJT = 0.212 °C/W. If the temperature of the top of the case, TC , and the Power in and out of the device are known, the junction temperature can be calculated by: TJ = TC + (θJT × (PIN - PO ) ) See the Texas Instruments application report PowerPad™ Thermally Enhanced Package (literature number SLMA002B) for more information regarding the proper use of the PowerPAD package. Also, see the Texas Instruments application report IC Package Thermal Metrics (literature number SPRA953A) for information regarding thermal metrics such as θJT. PRINTED-CIRCUIT BOARD (PCB) LAYOUT Because the TAS5602 is a class-D amplifier that switches at a high frequency, the layout of the printed-circuit board (PCB) should be optimized according to the following guidelines for the best possible performance. • Decoupling capacitors—The high-frequency 0.1-µF decoupling capacitors should be placed as close to the PVCC and AVCC terminals as possible. The BYPASS capacitor and VCLAMP_XX capacitors should also be placed as close to the device as possible. Large (220-µF or greater) bulk power-supply decoupling capacitors should be placed near the TAS5602 on the PVCCx terminals. For single-ended operation, a 220 µF capacitor should be placed on each PVCC pin. For Bridge-tied operation, a single 220 µF, capacitor can be shared between A and B or C and D. • Grounding—The AVCC decoupling capacitor and BYPASS capacitor should each be grounded to analog ground (AGND). The PVCCx decoupling capacitors and VCLAMP_xx capacitors should each be grounded to power ground (PGND). Analog ground and power ground should be connected at the thermal pad, which should be used as a central ground connection or star ground for the TAS5602. • Output filter—The reconstruction LC filter should be placed as close to the output terminals as possible for the best EMI performance. The capacitors should be grounded to power ground. • Thermal pad—The thermal pad must be soldered to the PCB for proper thermal performance and optimal reliability. The dimensions of the thermal pad and thermal land are described in the mechanical section at the back of the data sheet. See TI Technical Briefs SLMA002 and SLOA120 for more information about using the thermal pad. For recommended PCB footprints, see figures at the end of this data sheet. For an example layout, see the TAS5602 Evaluation Module (TAS5602EVM) User Manual, (SLOU189). Both the EVM user manual and the thermal pad application note are available on the TI Web site at http://www.ti.com. BASIC MEASUREMENT SYSTEM This section focuses on methods that use the basic equipment listed below: • Audio analyzer or spectrum analyzer • Digital multimeter (DMM) • Oscilloscope • Twisted-pair wires • Signal generator • Power resistor(s) • Linear regulated power supply • Filter components • EVM or other complete audio circuit Figure 23 shows the block diagrams of basic measurement systems for class-AB and class-D amplifiers. A sine wave is normally used as the input signal because it consists of the fundamental frequency only (no other harmonics are present). An analyzer is then connected to the audio power amplifier (APA) output to measure the voltage output. The analyzer must be capable of measuring the entire audio bandwidth. A regulated dc power supply is used to reduce the noise and distortion injected into the APA through the power pins. A System Two™ audio measurement system (AP-II) by Audio Precision™ includes the signal generator and analyzer in one package. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TAS5602 19 TAS5602 SLAS593B – JUNE 2008 – REVISED NOVEMBER 2008................................................................................................................................................... www.ti.com The generator output and amplifier input must be ac-coupled. However, the EVMs already have the ac-coupling capacitors, (CIN), so no additional coupling is required. The generator output impedance should be low to avoid attenuating the test signal, and is important because the input resistance of APAs is not high. Conversely, the analyzer input impedance should be high. The output resistance, ROUT, of the APA is normally in the hundreds of milliohms and can be ignored for all but the power-related calculations. Figure 23(a) shows a class-AB amplifier system. It takes an analog signal input and produces an analog signal output. This amplifier circuit can be directly connected to the AP-II or other analyzer input. This is not true of the class-D amplifier system shown in Figure 23(b), which requires low-pass filters in most cases in order to measure the audio output waveforms. This is because it takes an analog input signal and converts it into a pulse-width modulated (PWM) output signal that is not accurately processed by some analyzers. Power Supply Signal Generator APA Analyzer 20 Hz - 20 kHz RL (a) Basic Class-AB Power Supply Lfilt Signal Generator Class-D APA Cfilt Analyzer 20 Hz - 20 kHz RL (b) Traditional Class-D Figure 23. Audio Measurement Systems 20 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TAS5602 TAS5602 www.ti.com................................................................................................................................................... SLAS593B – JUNE 2008 – REVISED NOVEMBER 2008 SE Input and SE Output (TAS5602 SE Configuration) The SE input and output configuration is used with class-AB amplifiers. A block diagram of a fully SE measurement circuit is shown in Figure 24. SE inputs normally have one input pin per channel. In some cases, two pins are present; one is the signal and the other is ground. SE outputs have one pin driving a load through an output ac-coupling capacitor and the other end of the load is tied to ground. SE inputs and outputs are considered to be unbalanced, meaning one end is tied to ground and the other to an amplifier input/output. The generator should have unbalanced outputs, and the signal should be referenced to the generator ground for best results. Unbalanced or balanced outputs can be used when floating, but they may create a ground loop that affects the measurement accuracy. The analyzer should have balanced inputs to cancel out any common-mode noise in the measurement. Evaluation Module Audio Power Amplifier Generator Analyzer CIN VGEN RIN RGEN Lfilt CL Cfilt Twisted-Pair Wire RL RANA CANA RANA CANA Twisted-Pair Wire Figure 24. SE Input—SE Output Measurement Circuit The following general rules should be followed when connecting to APAs with SE inputs and outputs: • Use an unbalanced source to supply the input signal. • Use an analyzer with balanced inputs. • Use twisted-pair wire for all connections. • Use shielding when the system environment is noisy. • Ensure the cables from the power supply to the APA, and from the APA to the load, can handle the large currents (see Table 3). Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TAS5602 21 TAS5602 SLAS593B – JUNE 2008 – REVISED NOVEMBER 2008................................................................................................................................................... www.ti.com DIFFERENTIAL INPUT AND BTL OUTPUT (TAS5602 BTL Configuration) Many of the class-D APAs and many class-AB APAs have differential inputs and bridge-tied-load (BTL) outputs. Differential inputs have two input pins per channel and amplify the difference in voltage between the pins. Differential inputs reduce the common-mode noise and distortion of the input circuit. BTL is a term commonly used in audio to describe differential outputs. BTL outputs have two output pins providing voltages that are 180° out of phase. The load is connected between these pins. This has the added benefits of quadrupling the output power to the load and eliminating a dc-blocking capacitor. A block diagram of the measurement circuit is shown in Figure 25. The differential input is a balanced input, meaning the positive (+) and negative (–) pins have the same impedance to ground. Similarly, the BTL output equates to a balanced output. Evaluation Module Audio Power Amplifier Generator Analyzer CIN RGEN VGEN Lfilt RIN Cfilt CIN RGEN RL Lfilt RIN Cfilt Twisted-Pair Wire RANA CANA RANA CANA Twisted-Pair Wire Figure 25. Differential Input, BTL Output Measurement Circuit The generator should have balanced outputs, and the signal should be balanced for best results. An unbalanced output can be used, but it may create a ground loop that affects the measurement accuracy. The analyzer must also have balanced inputs for the system to be fully balanced, thereby cancelling out any common-mode noise in the circuit and providing the most accurate measurement. The following general rules should be followed when connecting to APAs with differential inputs and BTL outputs: • Use a balanced source to supply the input signal. • Use an analyzer with balanced inputs. • Use twisted-pair wire for all connections. • Use shielding when the system environment is noisy. • The cables from the power supply to the APA, and from the APA to the load, must be able to handle the large currents (see Table 3). Table 3 shows the recommended wire size for the power supply and load cables of the APA system. The real concern is the dc or ac power loss that occurs as the current flows through the cable. These recommendations are based on 12-inch (30.5-cm)-long wire with a 20-kHz sine-wave signal at 25°C. Table 3. Recommended Minimum Wire Size for Power Cables 22 DC POWER LOSS (mW) AWG Size AC POWER LOSS (mW) POUT (W) RL(Ω) 10 4 18 22 16 40 18 42 2 4 18 22 3.2 8 3.7 8.5 1 8 22 28 2 8 2.1 8.1 < 0.75 8 22 28 1.5 6.1 1.6 6.2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TAS5602 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TAS5602DCA ACTIVE HTSSOP DCA 56 35 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 TAS5602 TAS5602DCAR ACTIVE HTSSOP DCA 56 2000 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 TAS5602 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
TAS5602DCA 价格&库存

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TAS5602DCA

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TAS5602DCA
  •  国内价格
  • 1+101.37470
  • 200+84.47900
  • 500+67.58320
  • 1000+56.31930

库存:0