User's Guide
SLOU440 – March 2016
TAS5751M Evaluation Module
This user’s guide describes the operation of the TAS5751M evaluation module (EVM). The EVM is
connected to the PurePath™ Console Motherboard (PPCMB) and is configured using PurePath Console 3
(PPC3) software. Visit the e2e Audio Amplifiers forum for questions and other support issues.
The main contents of this document are:
• Details for properly connecting a TAS5751M evaluation module (EVM) and the details of the EVM
• Start-up procedure using PurePath Console 3 (PPC3) software with the correct plugin for the EVM
• Quick-start guide for the common modes in which the TAS5751MEVM is used
Throughout this document, the abbreviation EVM and the term evaluation module are synonymous with
the TAS5751MEVM evaluation module, unless otherwise noted.
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Contents
Overview ...................................................................................................................... 2
EVM Setup.................................................................................................................... 3
Using the TAS5751MEVM with PurePath Console 3 ................................................................... 4
Board Layout, Bill of Materials, and Schematic ........................................................................ 14
List of Figures
.............................................................................................. 2
................................................ 3
TAS5751M Application in PurePath Console 3 .......................................................................... 4
TAS5751M Application Home Window ................................................................................... 5
TAS5751MEVM Audio Processing Windows ............................................................................ 7
Equalizer Window ............................................................................................................ 8
Multiband AGL – Three-Band Crossover ................................................................................. 9
Full-Band AGL .............................................................................................................. 11
TAS5751MEVM ............................................................................................................ 14
TAS5751M Layout ......................................................................................................... 14
Bottom Layer Thermal Flow .............................................................................................. 15
TAS5751MEVM Optional Features ...................................................................................... 15
TAS5751MEVM Top Composite ......................................................................................... 16
TAS5751MEVM Top Layer ............................................................................................... 16
TAS5751MEVM Ground Layer ........................................................................................... 17
TAS5751MEVM Power Layer ............................................................................................ 17
TAS5751MEVM Bottom Layer............................................................................................ 18
TAS5751MEVM Bottom Composite ..................................................................................... 18
TAS5751MEVM Stereo Device ........................................................................................... 21
TAS5751MEVM Mono Device ............................................................................................ 22
TAS5751MEVM PPCMB and Power Supply Connection ............................................................. 23
1
TAS5751M Evaluation Board
2
Evaluation Module and PurePath Console Motherboard Connection
3
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PurePath is a trademark of Texas Instruments.
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1
Overview
www.ti.com
List of Tables
1
2
3
1
.......................................................................... 6
Available Presets for Multiband AGL ...................................................................................... 9
TAS5751MEVM Bill of Materials ......................................................................................... 19
Available Sample Rates for Each Digital Input
Overview
The TAS5751M evaluation module showcases the latest TI digital input Class-D open-loop amplifiers. The
TAS5751M is an I²S input Class-D amplifier with audio processing features.
The EVM is configured in Two-Device 2.1 mode with one stereo device using bridge tied load for left and
right channels and one mono device configured for mono applications, such as higher power full-range
speakers or subwoofers. The EVM is used in conjunction with the PurePath Console Motherboard
(PPCMB). The PVDD supply is input on the EVM daughter card, which passes it to the PPCMB
motherboard through the J4 connector. Regulators on the PPCMB create the 3.3-V power supply, which is
sent back to the DUT through the J4 connector. The EVM is controlled by PPC3 software.
Figure 1. TAS5751M Evaluation Board
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Overview
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1.1
Features
This EVM supports the following features:
• Control via USB port using TI's PPC3
• Two-Device 2.1 mode, one stereo device and one mono device, both with I²S input from PPCMB
• Analog, optical, coaxial, and USB audio inputs available through PPCMB
2
EVM Setup
Figure 2 illustrates the EVM setup.
Figure 2. Evaluation Module and PurePath Console Motherboard Connection
2.1
Requirements
The following are required to operate and test this EVM:
• TAS5751MEVM board
• PurePath Console motherboard
• Banana cable, or bare wire lead pair for PVDD/GND connection via five-way binding posts.
• Speaker cable with JST VHR-2N connector
• 2 × 8-Ω speakers for stereo test
• 1 × 4-Ω speakers for mono test
• Power supply (8 V to 26.4 V)
• Audio Source (Analog, USB, Optical)
• Micro type-B USB cable
• PurePath Console 3.xx GUI running on a PC
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EVM Setup
2.2
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Software Setup
PurePath Console 3.xx is required to configure the EVM. Download the software from
www.ti.com/mysecuresoftware, and install it before connecting the device for the first time.
Prior authorization is required to download the software. Access http://www.ti.com/tool/purepathconsole
and click the Request button to start the approval process. TAS5751M application for PurePath Console
should be requested from the TAS5751MEVM tool folder.
For more information about PurePath Console 3, refer to the PPC3 User Manual and PPC3 Quick
Reference Guide found in www.ti.com/mysecuresoftware.
2.3
Hardware Setup
Use the following steps to setup the hardware:
• Connect the TAS5751MEVM to the PPCMB.
• Connect the power supply to the EVM board and turn on the power. The 5-V and 3.3-V LEDs will
become illuminated.
• Connect the micro-USB cable from the PC to the controller board; the USB lock LED will become
illuminated.
• Connect an audio source to the PPCMB, this is not necessary if the source is USB audio.
• Connect the speakers to the outputs of the EVM.
3
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3.1
TAS5751M Application Connection
The TAS5751M application is available in PPC3 after correct installation and approval. Sign into PPC3 to
gain access to the TAS5751M application installer. After installing, the TAS5751M application is available.
Figure 3. TAS5751M Application in PurePath Console 3
Verify that the EVM is properly connected to the application by looking in the lower left corner of the
TAS5751M application. A green status circle indicates that the TAS5751MEVM is properly connected to
the computer. The device programming is done automatically when opening the application. If the status
circle is not green, the EVM may be connected but it is likely not correctly programmed as the
TAS5751MEVM. In this case, connection to the EVM must be done manually by clicking on the Connect
button located on the lower left corner of the window after opening the TAS5751M application.
When opening the TAS5751M application, a file window appears offering the option to load a previously
saved configuration file, start a new configuration or continue the last session. After this, select TAS5751M
from the highlighted drop-down menu.
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3.2
TAS5751M Application Features
The Home window is displayed when the TAS5751M application is initialized. Several evaluation and
integration options are available. TI recommends using the application walkthrough by clicking on the
question mark icon available next to the page name in all pages. The application walkthrough feature
provides guidance through various sections in the selected page and displays comments explaining the
sections of the page. Close the application walkthrough at any time by clicking on the ‘x’ mark at the top
right corner of the pop up. Navigate through the previous and next sections in the page by clicking on the
left or right arrows.
Figure 4. TAS5751M Application Home Window
3.3
Hardware Checks
The following window verifies the correct connection of the evaluation module, checking if the hardware is
correctly configured to test the EVM.
Perform a system calibration before proceeding to the Tuning and Audio Processing window. If an attempt
to enter the Tuning and Audio Processing window is made before performing hardware checks, PPC3
prompts with a window requesting to perform the verification of the hardware. Only new sessions require a
hardware check, so this window will not appear when continuing from a previous session or loading a
previously saved one.
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Ensure that the PurePath Console motherboard and EVM are recognized as USB-AudioEVM, and that the
sampling frequency is set to 48 kHz. Otherwise, the hardware check fails and the EVM evaluation may not
be correct. This information is found under sound settings in the control panel of the host computer.
3.4
Audio I/O
This tool selects the desired audio input to test the board. USB, optical, coaxial, and line inputs are
supported by the motherboard. USB audio source is selected as default but there is an option to enable or
disable the audio source to the amplifier by clicking on Speaker out. The available sampling rates for each
digital input are shown in Table 1.
Table 1. Available Sample Rates for Each Digital Input
Input
USB in
Sampling rates available
48 kHz
Optical In
48 kHz / 44.1 kHz
Coax In
48 kHz / 44.1 kHz
Although PPCMB operating range is up to 192 kHz, the available sample rates are limited to
theTAS5751M.
3.5
Tuning and Audio Processing
The main features of the amplifier audio processing are configured through this window. After opening the
Tuning and Audio Processing window, the devices in the EVM are configured with default settings. USB
audio is selected as the audio source by default. Configuration options include which device on the board
(either stereo or mono) is being configured, the audio source for the amplifiers, as well as the audio
processing features available in the device. The option to save the changes made during the audio tuning
using the snapshot feature of PPC3 is also available.
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Snapshot
Feature
Audio Player
Controls
Master Volume
Shortcut
Block Diagram
Audio I/O Information
and Shortcut
Configuration
Stereo/Mono Mode
Selection
Input Mixing and DC
Block Filter Options
Volume and
Pre/Post Scaling
Controls
Audio Processing Features
Device Connection
Status
I2C Monitor Shortcut
Figure 5. TAS5751MEVM Audio Processing Windows
Stereo/Mono device selection
Configure each device of the EVM individually by selecting between Stereo and Mono
on the upper right section of the Audio Processing window. The configuration of each
device is made with the same controls; the only difference is that when configuring the
mono device, the channel (left or right) driving the power stage is selected. Detailed
information is found in the Configuration section.
Configuration
Access the configuration menu by clicking in the gear icon next to the Stereo/Mono
selection button. In Stereo mode, only the option to reset the tuning done in the GUI
is offered, in mono mode, the user can select also if the left or right channel from the
digital audio processor drives the power stage of the amplifier. When performing the
Reset tuning function, the devices are configured with the default settings. By default,
both devices are configured with a master volume gain of –10 dB, multiband AGLs are
set to 0 dB while full band AGL is set to –1 dB. Stereo device equalizers are turned off,
but mono device has a default-configured 120-Hz low-pass filter for use in subwoofer
applications. The left channel of the mono device is driving the power stage by default.
Audio I/O shortcut
This section shows the audio source and sampling frequency that is used to generate
the I²S input for the TAS5751M amplifiers. The user is redirected to the main Audio I/O
window after clicking this button.
Audio Player
The Audio Player is used to play audio tracks available in the PC and perform various
tuning operations. Clicking on the Audio Player launches a floating window, where
audio tracks are added or played.
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Tuning Snapshots
Tuning Snapshot stores all the values of the current setting. A maximum of 5
Snapshots can be stored. When clicking on Tuning Snapshots, the Tuning History
Navigator is opened. Tuning History Navigator saves the history of the tuning changes
with each node corresponding to a single tune setting changed from the previous
node. More information about Tuning History Navigator and Tuning Snapshots is found
in the PPC3 User Manual.
I²C Monitor
Use the I²C Monitor to execute direct read and write commands to the device and
view the I²C transactions happening as a result of device operation performed using
the PPC3 application. I²C Monitor has the same functionality of the Direct I²C tool
available in the Home window of the application. Access the I²C Monitor by clicking
the I²C Monitor icon in the bottom bar, in any of the pages.
Equalizer
The Equalizer window allows the configuration and setting of the different Biquads available in the audio
processing of the device. By default, all the equalizers are turned off in the stereo device, while for the
mono device, a 120-Hz low pass filter is implemented by default with EQ1.
Figure 6. Equalizer Window
Different equalizer types can be implemented and all the changes to them are reflected in the different
plots. Composite plot (red) reflects the sum response of all the equalizers configured. The details of
each equalizer setting (as filter type, frequency, gain, and phase) is found in the bottom of the chart
section. Each equalizer is turned on or off independently and offer the option of reading or writing the
BQ coefficients directly by clicking in the turn ( ) icon. The setting of the equalizers is ganged for left
and right channels by default, but can be configured independently by the user when de-selecting
“Ganged” box. Phase, Group Delay, Impulse Response, and pole/zero charts are available as well for
the analysis of the equalizer response.
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Multiband AGL and Full-Band AGL
The TAS5751M features three multiband AGLs, as well as a full-band AGL. The multiband AGL is used
as a three-band crossover, having an independent custom configuration for low, high, and mid
frequency bands.
The multiband AGL and full-band AGL also offer the option to use preset configurations based on
output power, available for the use of standard power supplies and loads. These presets offer a good
starting point towards the full configuration of the end system.
Table 2. Available Presets for Multiband AGL
TAS5751M Presets
15 W with 12-V PVDD, 4-Ω load
10 W with 12-V PVDD, 4-Ω load
20 W with 24-V PVDD, 8-Ω load
15 W with 24-V PVDD, 8-Ω load
15 W with 19.6-V PVDD, 6-Ω load
10 W with 19.6-V PVDD, 6-Ω load
The filters used for the multiband AGL crossover are configured according to the specific need. By
default, the three-band crossover frequencies are set to 300 Hz and 3 kHz, using second-order
Linkwitz-Riley filters. This filter type was chosen so the total sum of the three-band signals has a flat
response without having to calculate individual cross-over frequencies for unity summation. The
crossover frequencies were selected so they are separated far enough in the frequency range from
each other to avoid any dip caused by the filter sum response. For the mid-band mixer, the coefficients
range is different and features negative values. This is done because when using second order filters to
form a band-pass filter; the phase of the signal is inverted, causing an undesired frequency response
when summing all the signals. This phase inversion is corrected by using negative coefficients for the
mid-band mixer.
Figure 7. Multiband AGL – Three-Band Crossover
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The AGL crossover configuration has two operating modes that can
be selected on the top of the main plot:
In basic mode, the crossover frequencies are ganged for left and
right channels, and the filters are configured so cutoff frequencies for
lowpass, bandpass, and highpass filter are matched.
In advanced mode, the user can modify these parameters
individually as well as have a different configuration for left and right
channels for the stereo device.
An Input/Output chart is available to easily configure the threshold
levels for each band. Drag and select each threshold and fine tune
the desired threshold level by controlling the levels in the lower part
of the window. Modify the Softening parameter to configure the
sharpness of the compression knee of the AGL.
Attack and release parameters are available for AGL tuning:
Attack Rate: This parameter sets the rate of the attack over the
output signal when it is greater than the desired threshold level. This
parameter acts fast enough to avoid apparent clipping before
engaging.
Release Rate: When the threshold is raised, this parameter reflects
the release rate of the compressed signal.
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All the multiband AGL functions are also featured in the full-band AGL window. By default, –1 dB is
configured for full-band AGL and the attack and release rates are set to 10 V/ms.
Figure 8. Full-Band AGL
3.6
Register Map
This window is used to monitor and change the main registers of the amplifier.
The readings appearing on the registers are related to the selected device, that is, stereo or mono.
Manual changes to the register values is accomplished by double-clicking in the desired bit to change.
Clicking on Read All Registers allows monitoring of the register status of the amplifier. The Fields section
shows the register name and a brief description of each bit that affects the selected register.
3.7
Direct I²C
This tool manually reads and writes the registers of the amplifier. The Direct I2C window is also used to
monitor the changes made to the device registers using a logging functionality. The stereo device I²C
address of the EVM is 0x56, the mono device I²C address is 0x54.
Direct I2C has two main tabs, I/O and Log, present in the top right corner of the window.
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The I/O tab in the I²C Monitor has two sub sections. The Input section has the provision to enter the read
or write commands scripts. Clicking the Execute button executes the commands written in the Input
section. The status of the execution is displayed in the Output section.
The Log tab in the I²C Monitor displays the I²C command history, if the record option is enabled. The log
tab has different options:
sp
Search:
Save to a file:
Delete Output:
Copy to a Clipboard:
Start Recording:
Stop Recording:
3.8
search for a particular command
saves the log as a .config file to the PC
clears the log history
copies the log text to the clipboard
starts recording the I²C transactions and displays them in the log
window
stops recording I²C transactions
End System Integration
The End System Integration feature offers a powerful tool to generate a configuration file for use with
general processors and a method to debug the device in the end system.
The End System Integration window has three main options for the customer (1) Dump Current State into
a Header file, (2) In-System Debugging, and (3) In-System Tuning.
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Dump Current State into a Header File
This feature allows generation of a configuration file for the evaluated device according to the features
evaluated and configured with PPC3. Different options are available for file generation, including the
format (.h, .cfg, .mtk), sample rate, device address, and so forth. The generated file is saved in the PC or
can be sent to the output window that appears in the window. Take into account that the register
configuration is generated from the device that is selected (Mono or Stereo).
Use the tuning snapshots feature to save several different operation modes for the device in the endsystem. In order to achieve this, first select the desired snapshot, then go to the End System Integration
window and generate the configuration file.
In-System Debugging
This tool helps debug the device when integrated in the end-system. This is possible by connecting the I²C
signals of the end-system device to the SCL, SDA, and GND test points of PPCMB. Limited features of
the TAS5751M application are available in this mode. Disconnect from System Debug Mode by clicking on
the Disconnect button on the lower left corner of the window.
In-System Tuning
Once the device is integrated in the end application, make fine tuning adjustments to the audio processing
with In-System Tuning. As with In-System Debugging, this is done by connecting I²C signals from PPCMB
to the end-system amplifier. Audio processing features are available in this mode, allowing the option to
fine tune the AGL, equalizers, and mixing block in the end system.
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Board Layout, Bill of Materials, and Schematic
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Board Layout, Bill of Materials, and Schematic
This section includes recommendations, the EVM board layouts, bill of materials, and schematics.
The evaluation module has the stereo device populated in the upper section of the board, while the mono
device is located on the lower part of the board. The connector for the power supply is located between
both amplifiers. The connector that interconnects the evaluation module with the PPCMB is located in the
left side of the board on the bottom face. The EVM features three connectors at the right side of the board
used for the connection of the speakers and loads that are used together with the EVM. These connectors
correspond to left and right channel of the stereo device and the single output of the mono device. The
board has two standoffs located on each corner of the right side, allowing structural stability when
connected to the controller board.
Figure 9. TAS5751MEVM
All the basic components required by the amplifier are located in the top of the board. The output filters
are located on the right side of each amplifier, keeping the distance between the inductor and capacitor as
short as possible. Each amplifier has a 0.1-µF decoupling capacitor populated close to the device as well
as bulk capacitors close to each PVDD pin connection. The design has wide open areas at the top and
bottom part of the amplifier to increase the thermal dissipation of the amplifier.
Figure 10. TAS5751M Layout
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Board Layout, Bill of Materials, and Schematic
The bottom layer of the board is designed to have a clear path that is used as a heat escape from the
device. RC-snubber circuits are not generally required in properly-designed 2-layer or 4-layer designs.
However, in systems where capacitors for PVDD or LC filter placement is compromised, the snubber
circuit is used to slow down the output square waves coming from the IC speaker outputs. A snubber
circuit for each output is featured in the evaluation module to showcase their recommended position, if
required for an end-system. The circuits are positioned so the thermal flow of the device has a radial clear
path out of the board.
Figure 11. Bottom Layer Thermal Flow
By default, the output filter of the stereo device is configured in BD mode. The user is able to evaluate the
devices in AD mode by populating the optional AD capacitors (C24, C27, and C51) in the evaluation
module. The I²C address of the devices can be changed as well, if required. By default, the stereo device
has an address of 0x56 and the mono device address is 0x54. Resistors R13, R14, R15, and R16
determine the address of each amplifier. Refer to the schematic of the evaluation module for more
information.
Figure 12. TAS5751MEVM Optional Features
The evaluation module is a four-layer board designed to enhance the thermal performance and
robustness of the design. The second layer is used as ground plane, while the third layer contains the
power planes that distribute the supply voltages through the board.
TI recommends following the layout of this EVM as close as possible to get the same performance
obtained during the evaluation of the device. Any design variation can be supported by TI through
schematic and layout review, as in the case of a different layer number, filter option, and component
location, or if performance issues are present in the end-design. Join the audio amplifier discussion forum
at e2e.ti.com for additional design assistance.
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Board Layout, Bill of Materials, and Schematic
4.1
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TAS5751MEVM Board Layout
Figure 13 through Figure 18 show the PCB layouts.
Figure 13. TAS5751MEVM Top Composite
Figure 14. TAS5751MEVM Top Layer
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Board Layout, Bill of Materials, and Schematic
Figure 15. TAS5751MEVM Ground Layer
Figure 16. TAS5751MEVM Power Layer
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Figure 17. TAS5751MEVM Bottom Layer
Figure 18. TAS5751MEVM Bottom Composite
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4.2
Bill of Material
Table 3 lists the TAS5751MEVM BOM.
Table 3. TAS5751MEVM Bill of Materials
Item # Designator
Qty
1
!PCB1
1
2
C1, C2
2
3
C3, C4, C30, C31
4
4
C5, C7, C9, C32, C34,
C36
5
Value
Part Number
Manufacturer
Description
AAP066
Any
Printed Circuit Board
220uF
EEE-FK1V221P
Panasonic
CAP, AL, 220 µF, 35 V, +/- 20%, 0.16 ohm, SMD
SMT Radial F
0.1uF
GCM188R71H104KA57D
Murata
CAP, CERM, 0.1 µF, 50 V, +/- 10%, X7R, 0603
0603
6
4.7uF
CGB3B1X5R1A475K055AC
TDK
CAP, CERM, 4.7 µF, 10 V, +/- 10%, X5R, 0603
0603
C6, C8, C10, C11, C33,
C35, C37, C38
8
0.1uF
C1005X7R1H104M
TDK
CAP, CERM, 0.1 µF, 50 V, +/- 20%, X7R, 0402
0402
6
C12, C39
2
1uF
GRM188R71E105KA12D
Murata
CAP, CERM, 1 µF, 25 V, +/- 10%, X7R, 0603
0603
7
C13, C15, C40, C42
4
4700pF
GRM155R61H472KA01D
Murata
CAP, CERM, 4700 pF, 50 V, +/- 10%, X5R, 0402
0402
8
C14, C16, C41, C43
4
0.047uF
GRM155R71C473KA01D
Murata
CAP, CERM, 0.047 µF, 16 V, +/- 10%, X7R, 0402
0402
9
C17, C44
2
2200pF
GRM155R71E222KA01D
Murata
CAP, CERM, 2200 pF, 25 V, +/- 10%, X7R, 0402
0402
10
C18, C21, C45, C48
4
0.01uF
CC1206KRX7R9BB103
Yageo America
CAP, CERM, 0.01 µF, 50 V, +/- 10%, X7R, 1206
1206
11
C19, C20, C46, C47
4
0.01uF
GRM188R71H103KA01D
Murata
CAP, CERM, 0.01 µF, 50 V, +/- 10%, X7R, 0603
0603
12
C22, C23, C25, C26,
C49, C50
6
0.68uF
GRM31MR71H684KA88L
Murata
CAP, CERM, 0.68 µF, 50 V, +/- 10%, X7R, 1206
1206
13
C28, C29
2
390uF
UCL1V391MNL1GS
Nichicon
CAP, AL, 390 µF, 35 V, +/- 20%, 0.08 ohm, SMD
10x10
14
C58
1
0.1uF
C1005X7R1H104K050BB
TDK
CAP, CERM, 0.1uF, 50V, +/-10%, X7R, 0402
0402
15
H1, H2
2
MPMS 003 0005 PH
B&F Fastener Supply
MACHINE SCREW PAN PHILLIPS M3 5mm
Screw M3 Phillips head
16
H3, H4
2
R30-1003002
Harwin
Standoff, HexBrass M3, 30 mm
Spacer M3, 30mm
17
J1, J2, J3
3
B2PS-VH(LF)(SN)
JST Manufacturing
Header (friction lock), 3.96mm, 2x1, Tin, R/A, TH
Header, 2x1, 3.96mm, R/A
18
J4
1
QTS-050-01-F-D-A
Samtec
Connector, 100 Pos. 0.635mm, SMT
Connector, 1575x235x280 mil
19
J5
1
6883
Pomona Electronics
Dual Binding Posts with Base, 2x1, TH
Dual Binding Posts with Base,
2x1, TH
20
L1, L2, L3, L4
4
15uH
1255AY-150M=P3
Murata
Inductor, Shielded, 15 µH, 3 A, 0.063 ohm, SMD
6.3x4.5x6.3mm
21
L5, L6
2
15uH
7447709150
Wurth Elektronik
Inductor, Shielded Drum Core, Ferrite, 15 µH, 6.5 A,
0.02075 ohm, SMD
WE-PD-XXL
22
R1, R2, R4, R5
4
470
ERJ-2RKF4700X
Panasonic
RES, 470, 1%, 0.1 W, 0402
0402
23
R3, R7
2
18.0k
CRCW040218K0FKED
Vishay-Dale
RES, 18.0 k, 1%, 0.063 W, 0402
0402
24
R6, R13, R16, R17
4
47k
CRCW040247K0JNED
Vishay-Dale
RES, 47 k, 5%, 0.063 W, 0402
0402
25
R8, R10
2
10.0k
CRCW040210K0FKED
Vishay-Dale
RES, 10.0 k, 1%, 0.063 W, 0402
0402
26
R24, R25
2
0
CRCW12060000Z0EA
Vishay-Dale
RES, 0, 5%, 0.25 W, 1206
1206
27
U1, U2
2
TAS5751MDCA
Texas Instruments
Digital Audio Power Amplifier with EQ and AGL,
DCA0048B
DCA0048B
28
U3
1
24LC512-I/ST
Microchip
EEPROM, 512KBIT, 400KHZ, 8TSSOP
TSSOP-8
29
C24, C27, C51
0
GRM319R71H334KA01D
Murata
CAP, CERM, 0.33 µF, 50 V, +/- 10%, X7R, 1206
1206
0.33uF
SLOU440 – March 2016
Submit Documentation Feedback
Package Reference
TAS5751M Evaluation Module
Copyright © 2016, Texas Instruments Incorporated
19
Board Layout, Bill of Materials, and Schematic
www.ti.com
Table 3. TAS5751MEVM Bill of Materials (continued)
Item # Designator
Qty
Value
Part Number
Manufacturer
Description
Package Reference
30
C52, C53, C54, C55,
C56, C57
0
330pF
GRM1885C1H331JA01D
Murata
CAP, CERM, 330 pF, 50 V, +/- 5%, C0G/NP0, 0603
0603
31
FID1, FID2, FID3, FID4,
FID5, FID6
0
N/A
N/A
Fiducial mark. There is nothing to buy or mount.
Fiducial
32
R9
0
10.0k
CRCW040210K0FKED
Vishay-Dale
RES, 10.0 k, 1%, 0.063 W, 0402
0402
33
R11, R12
0
2.00k
CRCW04022K00FKED
Vishay-Dale
RES, 2.00 k, 1%, 0.063 W, 0402
0402
34
R14, R15
0
47k
CRCW040247K0JNED
Vishay-Dale
RES, 47 k, 5%, 0.063 W, 0402
0402
35
R18, R19, R20, R21,
R22, R23
0
18
CRCW060318R0JNEA
Vishay-Dale
RES, 18, 5%, 0.1 W, 0603
0603
20
TAS5751M Evaluation Module
SLOU440 – March 2016
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Board Layout, Bill of Materials, and Schematic
www.ti.com
4.3
Schematic
Figure 19 through Figure 21 show the TAS5751MEVM schematics.
1
2
3
4
5
6
PVDD
C3
0.1µF
GND
+3.3V
8
9
10
PVDD
C1
220µF
A
7
GND
C4
0.1µF
GND
C2
220µF
A
GND
+3.3V
C5
4.7µF
C6
0.1µF
C7
4.7µF
C8
0.1µF
U1
B
B
GND
C9
4.7µF
C10
0.1µF
GND
GND
GND
42
41
8
7
33
C11
0.1µF
18
C12
1µF
23
C13
C15
3
2
AVDD
BSTRP_B
1
48 BSTC1
43
OUTD1
NC
NC
NC
NC
NC
PLL_FLTM
MCLK
SCLK
LRCLK
SDIN
20
26
25
27
SCL
SDA
29
28
SCL
SDA
10
SSTIMER
11
SCL
SDA
ADR1/FAULT
ADR1/FAULT
PDN
RST
0.01µF
AMP_OUT_D
15
MCLK
SCLK
LRCLK
SDIN
C20
GVDD_REG
BSTRP_D
19
PDN
24
RST
31
MCLK
SCLK
LRCLK
SDIN
TEST
21
OSC_GND
PLL_GND
22
14
PGND
PGND
PGND
PGND
PBTL
ADR/FAULT
PDN
AGND
DGND
PowerPAD
RST
OUTC1
GND
L2
C21
15µH
0.01µF
C23
0.68µF
OUTD1
37
36
30
13
12
OSC_RES
OUT
DNPC24
DNP
OUTB1
BTL_L-
40 BSTD1
32
J1
15µH
0.01µF
39
PLL_FLTP
L1
BTL_L+
C19
OUTC1
AVDD_REF
OUTA1
C22
0.68µF
BSTB1
47
46
C16
0.047µF
OUTB1
AMP_OUT_B
AMP_OUT_B
BSTRP_C
16
470
0.01µF
AMP_OUT_C
AMP_OUT_C
17
4700pF
C18
OUTA1
DVDD
0.047µF
R2
BSTA1
AVDD_REG
GND
D
AMP_OUT_A
9
6
DVDD_REG
C14
470
FROM
PurePath
Console Mother Board
BSTRP_A
38
4700pF
R1
C
PVDD
PVDD
PVDD
PVDD
C
GND
L3
J2
BTL_R+
15µH
C25
0.68µF
R3
GND
L4
GND
45
44
5
4
OUT
DNPC27
DNP
18.0k
BTL_R-
D
15µH
C26
0.68µF
35
34
49
GND
C17
2200pF
TAS5751MDCA
GND
GND
GND
E
Texas Instruments and/or its licensors do not warra
nt the accuracy or completeness of this specificati
on or any information contained
therein. Texas Instruments and/or its licensors do warrant
not
that this design will meet the specificatio
ns, will be suitable for your
application or fit for any particular purpose, ill
or operate
w
in an implementation. Texas Instruments
and/or its licensors do not warrant
that the design is production worthy. You should
mpletely
co
validate and test your design implementati
on to confirm the system
functionality for your application.
1
2
3
4
5
Number: AAP066
SVN Rev: Version control disabled
Drawn By:DML
Engineer: Diego Melendez
Sheet: 1 of 4
Designed for:Public Release
Project Title: TAS5751M-33LEVM
Sheet Title: Stereo Amplifier
Assembly Variant:002
File: AAP066A_Amplifier-BTL_Schematic.SchDoc
Contact: http://www.ti.com/support
6
7
8
E
Mod. Date: 3/9/2016
Size: AB
Rev: A
9
http://www.ti.com
© Texas Instruments 2016
10
Figure 19. TAS5751MEVM Stereo Device
SLOU440 – March 2016
Submit Documentation Feedback
TAS5751M Evaluation Module
Copyright © 2016, Texas Instruments Incorporated
21
Board Layout, Bill of Materials, and Schematic
1
2
www.ti.com
3
4
5
6
PVDD
C30
0.1µF
GND
+3.3V
8
9
10
PVDD
C28
390µF
35V
A
7
C31
0.1µF
GND
GND
C29
390µF
35V
A
GND
+3.3V
C32
4.7µF
C33
0.1µF
C34
4.7µF
C35
0.1µF
U2
B
B
GND
C36
4.7µF
C37
0.1µF
GND
GND
GND
42
41
8
7
33
C38
0.1µF
18
C39
1µF
23
38
C40
4700pF
39
C41
R4
C
17
C42
16
4700pF
AMP_OUT_A
15
R5
0.047µF
470
MCLK
SCLK
LRCLK
SDIN
AVDD
BSTRP_B
1
DVDD_REG
BSTRP_C
48 BSTC2
AVDD_REG
AMP_OUT_C
AMP_OUT_C
GVDD_REG
AMP_OUT_D
AVDD_REF
BSTRP_D
PLL_FLTP
NC
NC
NC
NC
NC
PLL_FLTM
SCL
SDA
29
28
SCL
SDA
10
SSTIMER
SCL
SDA
ADR2/FAULT
PDN
RST
47k
11
ADR2/FAULT
19
PDN
24
RST
31
MCLK
SCLK
LRCLK
SDIN
ADR/FAULT
PDN
L5
PBTL+
C49
0.68µF
BSTB2
C46
0.01µF
C47
0.01µF
OUTAB
OUTCD
C48
PBTLC
0.01µF
C50
0.68µF
37
36
30
13
12
21
OSC_GND
PLL_GND
22
14
OUT
GND
OUTCD
43
TEST
J3
DNPC51
DNP
L6
40 BSTD2
OSC_RES
AGND
DGND
PowerPAD
RST
0.01µF
47
46
32
PGND
PGND
PGND
PGND
PBTL
C45
OUTAB
6
DVDD
20
26
25
27
R6
BSTA2
3
2
MCLK
SCLK
LRCLK
SDIN
+3.3V
9
AMP_OUT_B
AMP_OUT_B
C43
GND
D
BSTRP_A
0.047µF
470
FROM
PurePath
Console Mother Board
PVDD
PVDD
PVDD
PVDD
GND
R7
18.0k
GND
45
44
5
4
D
35
34
49
TAS5751MDCA
C44
2200pF
GND
GND
E
Texas Instruments and/or its licensors do not warra
nt the accuracy or completeness of this specificati
on or any information contained
therein. Texas Instruments and/or its licensors do warrant
not
that this design will meet the specificatio
ns, will be suitable for your
application or fit for any particular purpose, ill
or operate
w
in an implementation. Texas Instruments
and/or its licensors do not warrant
that the design is production worthy. You should
mpletely
co
validate and test your design implementati
on to confirm the system
functionality for your application.
1
2
3
4
5
Number: AAP066
SVN Rev: Version control disabled
Drawn By:DML
Engineer: Diego Melendez
Sheet: 2 of 4
Designed for:Public Release
Project Title: TAS5751M-33LEVM
Sheet Title: Mono Amplifier
Assembly Variant:002
File: AAP066A_Amplifier-PBTL_Schematic.SchDoc
Contact: http://www.ti.com/support
6
7
8
E
Mod. Date: 3/9/2016
Size: AB
Rev: A
9
http://www.ti.com
© Texas Instruments 2016
10
Figure 20. TAS5751MEVM Mono Device
22
TAS5751M Evaluation Module
SLOU440 – March 2016
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Board Layout, Bill of Materials, and Schematic
www.ti.com
1
2
3
4
5
6
7
8
9
10
MAIN POWER IN
A
J4A
PVDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
B
C
D
GND
GND
GND
GND
PVDD-PPCMB
J4B
PVDD
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
R24
0
(PPCMB-GPIO0)
(PPCMB-GPIO1)
(PPCMB-GPIO2)
(PPCMB-GPIO3)
(PPCMB-GPIO4)
(PPCMB-GPIO5)
MCLK
TO DUTS
SCLK
LRCLK
SDIN
101
102
103
104
GND
GND
GND
GND
J5
SCL
SDA
Dual Banana
+3.3V
+3.3V
C58
GND
R25
0.1µF
+3.3V
0
GND
U3
1
R8
10.0k
2
RST
A0
VCC
+3.3V
8
R9
DNP
10.0k
DNP
7
A1
WP
3
A2
SCL
6
4
VSS
SDA
5
+3.3V
R10
B
R11
R12
DNP
2.00k DNP
2.00k
DNP
DNP
24LC512-I/ST
GND
GND
+3.3V
(PPCMB-GPIO6)
PDN
(PPCMB-GPIO7)
ADR1/FAULT
+3.3V
10.0k
+3.3V
+3.3V
TO DUTS
R13
47k
R15
DNP
47k
DNP
R17
47k
SCL
SDA
C
RST
PDN
(PPCMB-GPIO8)
BTL
0X56
ADR1/FAULT
(PPCMB-GPIO9)
PBTL 0X54
ADR2/FAULT
ADR2/FAULT
R14
DNP
47k
DNP
VOUT2
(PPCMB-GPIO10)
VOUT1
GND
R16
47k
R18
18 C52
330pF
DNP
DNP
DNP
18 C53
330pF
DNP
DNP
DNP
DNP
R20
18 C54
330pF
DNP
DNP
DNP
DNP
R21
18 C55
330pF
DNP
DNP
DNP
DNP
OUTA1
GND
OUTB1
105
106
107
108
OUTC1
OUTD1
GND
DNP
R19
R22
OUTAB
GND
R23
OUTCD
DNP
DNP
E
Texas Instruments and/or its licensors do not warra
nt the accuracy or completeness of this specificati
on or any information contained
therein. Texas Instruments and/or its licensors do warrant
not
that this design will meet the specificatio
ns, will be suitable for your
application or fit for any particular purpose, ill
or operate
w
in an implementation. Texas Instruments
and/or its licensors do not warrant
that the design is production worthy. You should
mpletely
co
validate and test your design implementati
on to confirm the system
functionality for your application.
2
3
4
5
Number: AAP066
SVN Rev: Version control disabled
Drawn By:DML
Engineer: Diego Melendez
Sheet: 3 of 4
Designed for:Public Release
Project Title: TAS5751M-33LEVM
Sheet Title: PurePath Console MotherBoard
Assembly Variant:002
File: AAP066A_PPCMB-IO.SchDoc
Contact: http://www.ti.com/support
6
7
D
18 C56
330pF
DNP
DNP
DNP
18 C57
330pF
DNP
DNP
DNP
SNUBBER OPTION
1
A
2
1
GND
E
IO
Mod. Date: 1/28/2016
Rev: A
Size: AB
8
9
http://www.ti.com
© Texas Instruments 2016
10
Figure 21. TAS5751MEVM PPCMB and Power Supply Connection
SLOU440 – March 2016
Submit Documentation Feedback
TAS5751M Evaluation Module
Copyright © 2016, Texas Instruments Incorporated
23
STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1.
Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or
documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.
Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2
Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3
Regulatory Notices:
3.1 United States
3.1.1
Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•
•
•
•
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1
For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1
Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2
Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of
Japan to follow the instructions below with respect to EVMs:
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿6丁目24番1号
西新宿三井ビル
3.3.3
Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
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4
EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1
User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2
EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5.
Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6.
Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7.
USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8.
Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9.
Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2015, Texas Instruments Incorporated
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IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
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Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
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No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
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