User's Guide
SLOU371A – May 2013 – Revised December 2013
TAS5760xxEVM
This User’s Guide describes the operation of the TAS5760xxEVM, rev D. The TAS5760xxEVM is
connected to the PurePath™ Console Motherboard (PPCMB). For questions and support go to the E2E
forums (e2e.ti.com). The main contents of this document are:
• Hardware descriptions and implementation
• Start up procedure using PurePath Console (PPC) software with TAS5760 plug-in
Related documents:
TAS5760 Data Sheet (SLOS741)
PurePath™ Console Motherboard User’s Guide (SLOU366)
PurePath™ Graphic Development Suite (PurePath Console)
1
2
3
4
Contents
Hardware Overview ......................................................................................................... 2
1.1
TAS5760xxEVM Features ........................................................................................ 2
1.2
TAS5760xxEVM Functions ....................................................................................... 3
1.3
TAS5760xxEVM Detailed Operations ........................................................................... 3
TAS5760xxEVM Setup ..................................................................................................... 4
2.1
TAS5760xxEVM Setup ............................................................................................ 4
2.2
Software Installation ............................................................................................... 5
Using the PurePath™ Console with the TAS5760xxEVM Board ..................................................... 6
3.1
TAS5760 Main Tab ................................................................................................ 6
3.2
TAS5760 Block Diagram Tab .................................................................................... 7
3.3
Pop-up Windows ................................................................................................... 7
3.4
Direct I2C Access Tab ............................................................................................. 8
3.5
Device Registers Tab .............................................................................................. 9
Board Layouts, Bill of Materials, and Schematic ...................................................................... 10
4.1
TAS5760xxEVM Board Layouts ................................................................................ 10
4.2
Bill of Materials .................................................................................................... 11
4.3
TAS5760xxEVM Rev D Schematic ............................................................................ 12
List of Figures
1
PPCMB and TAS5760xxEVM .............................................................................................
2
2
Device Manager .............................................................................................................
3
3
PPCMB and TAS5760xxEVM Connection
..............................................................................
4
4
Target Selection List ........................................................................................................
5
5
Add Target List ..............................................................................................................
5
6
PPCMB and TAS5760xxEVM .............................................................................................
6
7
TAS5760 Block Diagram ...................................................................................................
7
8
Digital Gain Pop-up .........................................................................................................
7
9
Analog Gain Pop-up ........................................................................................................
8
10
Direct I2C Access............................................................................................................
8
11
Device Registers Tab.......................................................................................................
9
12
TAS5760xxEVM Rev D Top Composite Assembly ...................................................................
10
PurePath is a trademark of Texas Instruments.
Windows is a registered trademark of Microsoft Corporation.
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TAS5760xxEVM
1
Hardware Overview
www.ti.com
15
.........................................................................
TAS5760xxEVM Rev D Schematic (Page 1 of 2) .....................................................................
TAS5760xxEVM Rev D Schematic (Page 2 of 2) .....................................................................
1
Bill of Materials.............................................................................................................
13
14
PPCMB Rev D Bottom Composite Assembly
10
12
13
List of Tables
1
11
Hardware Overview
The TAS5760xxEVM showcases the latest TI digital input class D closed loop amplifier. The TAS5760 is a
single-die I2S-input class D stereo amplifier with integrated headphone amplifier. The EVM is used in
conjunction with the PurePath Console Motherboard (PPCMB). The PVDD supply is provided via the
TAS5760xxEVM and is regulated to 5 VDC and 3.3 VDC on the PPCMB. The PPCMB provides the I2S,
I2C and 3.3 VDC to the TAS5760xxEVM.
Figure 1. PPCMB and TAS5760xxEVM
1.1
TAS5760xxEVM Features
•
•
•
•
•
2
GUI control via USB port
Operation in hardware or software mode
Stereo channels with I2S input
Operate in BTL or PBTL
Headphones input and output
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1.2
TAS5760xxEVM Functions
The TAS5760xxEVM is controlled by the PPCMB. The PPCMB sends I2C commands from PPC to the
TAS5760. Upon PPC execution and connection, the TAS5760 is put in software mode.
The digital audio data input to the TAS5760xxEVM is sent from PPCMB and is selectable from USB audio,
optical SPDIF, coaxial SPDIF, and analog ADC sources. When a digital audio data input is selected, the
PPC will automatically send appropriate scripts to the device in use.
1.3
TAS5760xxEVM Detailed Operations
Upon power-on, the PPCMB uses USB audio input (default). The I2S signals, LRCLK, SCLK, SDIN, and
MCLK, come from the TAS1020B. Windows® Media Player can be used to stream audio. The TAS1020B
enumerates as the following device on Windows OS: USB audio (USB-miniEVM), Human Interface
Devices and USB Composite Device, see Figure 2.
Figure 2. Device Manager
The PPC controls the TAS5760xxEVM and can put the device in two modes: software and hardware.
In hardware mode, GAIN0 and GAIN1 pins are set to the following combinations (00, 01 and 10). The
mute, frequency, and PBTL pins are controlled by asserting them to logic high or low. All these settings
are controlled via the PPC.
In software mode, the gain pins are set to 1 and the dual function pins (mute, frequency, PBTL) become
address, SDA, and SCL.
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3
TAS5760xxEVM Setup
2
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TAS5760xxEVM Setup
This section describes the TAS5760xxEVM setup and software installation. Since PPCMB connects to
one of the device under test (DUT) EVMs, it is necessary to show the connection in this section.
TAS5760xxEVM is used for this purpose.
2.1
TAS5760xxEVM Setup
Figure 3. PPCMB and TAS5760xxEVM Connection
Hardware requirements:
• Desktop or laptop PC running either Windows XP or Windows 7
• Power supply 4.5–26.4 VDC
• Speakers and cable
• A USB micro type B cable
• Audio source: This can be a DVD player with appropriate SPDIF cable or Windows Media Player from
Windows XP or Windows 7
Hardware setup:
• Plug in USB cable from the PC to the PPCMB; the USB Lock LED (blue) is illuminated.
• Connect the PPCMB to the TAS5760xxEVM.
• Connect PSU to TAS5760xxEVM and turn on the power. 5-V and 3.3-V LEDs are illuminated.
• If optical SPDIF source is used, the blue SPDIF clock-locked LED is illuminated.
• Disregard the orange LED indicating Energy Threshold (ET) level is exceeded. Clearing the ET value
turns the orange LED off.
4
TAS5760xxEVM
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TAS5760xxEVM Setup
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2.2
Software Installation
Download the PurePath Console (PPC) GUI from the PurePath Console folder
(www.ti.com/tool/PurePathConsole). The TI Web site has the latest release of the GUI.
Execute the GUI installation program, Setup_PurePathConsole_Main_vxx_revxx.exe. Once the program
is installed, the program group and shortcut icon is created in Start → Program → Texas Instruments Inc
→ PurePath Console → Choose Target. The Target Selection window is displayed; select TAS5760 as
shown in Figure 4.
Figure 4. Target Selection List
If the device is not listed in the Target Selection List, click on Add Target and Windows Explorer displays.
Navigate to the folder containing the target zip files (plugins) and choose the DUT. Make sure that the
plugin has the same version and revision number as the PPC you are using.
Figure 5. Add Target List
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Figure 6. PPCMB and TAS5760xxEVM
The green LED on the bottom left corner of the PPC Window indicates the initialization of TAS5760 is
valid.
The PPCMB is initialized with the USB audio (USB-miniEVM) selected. Streaming audio from USB host is
routed to the TAS5760.
If an optical input is used, simply click on the OPT IN symbol on the PPC software, the I2S is then routed
with this signal. Likewise with a COAX/SPDIF input using the COAX IN symbol. If an analog input is used,
click on the LINE IN symbol on the PPC software, the ADC (PCM3168A) will be the source of I2S data.
3
Using the PurePath™ Console with the TAS5760xxEVM Board
The TAS5760xxEVM is initialized upon PurePath Console startup. Audio is streaming to the speakers if
Windows Media (or similar program) is playing and mini-USB EVM is selected in the sound playback
properties. The following indicators show both PPC GUI and TAS5760xxEVM are operating correctly:
• On the PPCMB, the USB blue LED is on, the green LEDs for 3.3 V and 5 V are on
• On the PPC, the green LED on the bottom left corner is on
3.1
TAS5760 Main Tab
The DUT tab is displayed when the PPC GUI starts up. Here, you can click on TAS5760 icon and it
directs you to the device block diagram. See Figure 6.
6
TAS5760xxEVM
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3.2
TAS5760 Block Diagram Tab
This tab, illustrated in Figure 7, shows the device major blocks. The boxes with black background are
selectable. When one is selected, it shows pop-up settings for the particular setting.
Figure 7. TAS5760 Block Diagram
3.3
Pop-up Windows
For TAS5760 there are several settings that are done via I2C. The GUI facilitates these settings
seamlessly using the pop-up windows below. See Figure 8 and Figure 9.
Figure 8. Digital Gain Pop-up
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Figure 9. Analog Gain Pop-up
3.4
Direct I2C Access Tab
I2C registers read and write can be performed on this tab (see Figure 10). Type in the device I2C address
and click Set. On the Direct I2C Read/Write box, enter a valid I2C register for read and type in both valid
register and data for write.
Figure 10. Direct I2C Access
8
TAS5760xxEVM
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3.5
Device Registers Tab
This tab shows the current I2C registers values (hexadecimal and decimal) in the TAS5760.
Figure 11. Device Registers Tab
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Board Layouts, Bill of Materials, and Schematic
4
Board Layouts, Bill of Materials, and Schematic
4.1
TAS5760xxEVM Board Layouts
www.ti.com
Figure 12 and Figure 13 illustrate the board layouts for the EVM.
Figure 12. TAS5760xxEVM Rev D Top Composite Assembly
Figure 13. PPCMB Rev D Bottom Composite Assembly
10
TAS5760xxEVM
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Board Layouts, Bill of Materials, and Schematic
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4.2
Bill of Materials
Table 1 displays the BOM for this EVM.
Table 1. Bill of Materials
ITEM
MANU PART NUM
MANU
QTY
REF DESIGNATORS
DESCRIPTION
1
TAS5760xxDCA
TEXAS INSTRUMENTS
1
U1
I2S INPUT AMP W/POWER LIMITER AND
HEADPHONE,HTSSOP48-DCA,ROHS
2
TS3A24157DGSR
TEXAS INSTRUMENTS
1
MUX
DUAL SPDT ANALOG SWITCH 0.65 OHMS MSOP10DGS ROHS
3
24LC256-I/MS
MICROCHIP
1
EEPROM
SERIAL EEPROM I2C 256K 400kHz MSOP8-MS ROHS
4
C1608X7R1C105K
TDK CORP
8
C1, C2, C3, C4, C5, C6,
C7, C17
CAP SMD0603 CERM 1.0UFD 16V 10% X7R ROHS
5
C1005X5R1A105K
TDK CORP
3
C30, C31, C32
CAP SMD0402 CERM 1.0UFD 10V 10% X5R ROHS
6
EEU-FC1H471
PANASONIC
2
C9
CAP THRU ALUM-ELECT FC SERIES 470ufd 50V 20%
12.5x5x25mm ROHS
7
GRM188R71H104KA93D
MURATA
2
C10, C16
CAP SMD0603 CERM 0.1UFD 50V 10% X7R ROHS
8
06033D224KAT2A
AVX
4
C11, C12, C13, C14
CAP SMD0603 CERM 0.22UFD 25V 10% X5R ROHS
9
GRM1885C1H471JA01D
MURATA
1
C18
CAP SMD0603 CERM 470PFD 50V 5% COG ROHS
10
GRM1555C1H221JA01D
MURATA
2
C19, C20
CAP SMD0402 CERM 220PFD 5% 50V COG ROHS
11
C2012X7R1H684K
TDK
4
C25, C26, C27, C28
CAP SMD0805 CERM 0.68ufd 50V 10% X7R ROHS
12
GRM188R60J106ME47D
MURATA
2
C34, C35
CAP SMD0603 CERM 10UFD 6.3V 20% X5R ROHS
13
3303W-3-104E
BOURNS
1
R1
POT SMD CERMET 100K OHMS 25% SINGLE TURN
TOP ADJ ROHS
14
CRCW040210K0FKED
VISHAY
9
R2, R12, R16, R17, R21,
R23, R25, R27, R28
RESISTOR SMD0402 10.0K OHMS 1% 1/16W ROHS
15
RC0402FR-0722KL
YAGEO
1
R4
RESISTOR SMD0402 THICK FILM 22.0K OHMS 1%
1/16W ROHS
16
RC0402FR-073K9L
YAGEO
1
R5
RESISTOR SMD0402 THICK FILM 3.90K OHM 1%
1/16W ROHS
17
RMCF0402ZT0R00
STACKPOLE ELECTRONICS
0
R10
ZERO OHM JUMPER SMT 0402 0 OHM 1/16W 5%
ROHS
18
ERJ-2RKF5601X
PANASONIC
2
R13, R18
RESISTOR SMD0402 5.60K 1/16W 1% ROHS
19
CRCW040210K0FKED
VISHAY
3
R21, R23, R25
RESISTOR SMD0402 10.0K OHMS 1% 1/16W ROHS
20
A7503AY-100M
TOKO JAPAN
4
L1, L2, L3, L4
INDUCTOR SERIES 11RHBP/A7503AY 10uH/4.3A
ROHS
21
QTS-050-01-F-D-A
SAMTEC
1
J1
CONNECTOR SMT/THU 100 POS+GND MATE HEIGHT
5mm ROHS
22
B2PS-VH(LF)(SN)
JST
2
OUTA, OUTB
JACK JST-VH RA 2-PIN 3.96mmLS ROHS
23
35RASMT4BHNTRX
SWITCHCRAFT
1
DR-OUT
JACK MINI STEREO 3.5mm SMT W/SHUNTS ROHS
24
7006
KEYSTONE ELECTRONICS
1
VIN
BINDING POST, RED, 15A ECONO ROHS
25
7007
KEYSTONE ELECTRONICS
1
GND
BINDING POST, BLACK, 15A ECONO ROHS
26
95947A060
MCMASTER-CARR
2
STANDOFFS
STANDOFF M3x30mm 6mm DIA HEX ALUMINUM F-F
ROHS
27
92000A118
MCMASTER-CARR
4
STANDOFF SCREWS
SCREW M3x8 PHILIPS PANHEAD STAINLESS STEEL
ROHS
28
92148A150
MCMASTER-CARR
2
STANDOFF WASHERS
WASHER SPLIT-LOCK M3 6.2mm OD 0.7mm THICK
STAINLESS STEEL ROHS
TOTAL
66
X1
DO NOT POPULATE
1
R10
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11
Board Layouts, Bill of Materials, and Schematic
4.3
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TAS5760xxEVM Rev D Schematic
The schematics for TAS5760xxEVM rev. D are illustrated in Figure 14 and Figure 15.
TAS5760xxDCA EVALUATION BOARD (RevD)
CW
Low
1
100K
R1
OPTIONAL
High (SEE USER'S GUIDE)
3
3303W
2
GND
FROM
INPUT
CONNECTOR
C1
C7
1.0ufd/16V
0603 X7R
1.0ufd/16V
0603 X7R
GND
C2
U1
1.0ufd/16V
0603 X7R
+3.3V
10.0K
0402
FREQ/SDA
PBTL/SCL
48
2
47
3
46
4
45
5
44
6
43
FREQ/SDA
7
42
PBTL/SCL
8
41
9
40
1.0ufd/16V
0603 X7R
+3.3V
GND
0603 X7R
SPK_GAIN0
SPK_GAIN1
SPK_SLEEP/ADR
MCLK
SCLK
SDIN
LRCK
SPK_GAIN0
10
39
SPK_GAIN1
11
38
SPK_SLEEP/ADR
12
37
MCLK
13
36
SCLK
14
35
SDIN
15
34
LRCK
16
33
17
32
18
31
19
30
20
29
GND
DR_INAGND
DR_OUTA
DR_INA
DR_INB
PVDD
L1
+
C10
GND
1
C9
0.1ufd/50V
0603 X7R
GND
GND
C5
21
28
22
27
23
26
24
25
TAS5760xxDCA
1.0ufd/16V
0603 X7R
HTSSOP48-DCA
C6
GND
2
10uH/4.3A
11RHBP
470ufd/50V
FC
C25
0.68ufd/50V
0805 X7R
GND
GND
C11
0.22ufd/25V
0603 X5R
L2
SPK_OUTA+
1
C4
1.0ufd/16V
PVDD
1
C3
R2
SPK_OUTAC12
0.22ufd/25V
C13
0.22ufd/25V
2
10uH/4.3A
11RHBP
GND
OUTAC26
0.68ufd/50V
0805 X7R
0603 X5R
GND
0603 X5R
SPK_OUTB-
L3
GND
1
SPK_OUTB+
C14
0.22ufd/25V
OUTA+
2
10uH/4.3A
11RHBP
OUTBC27
0603 X5R
0.68ufd/50V
0805 X7R
PVDD
DR_INB-
L4
C16
GND
DR_OUTB
1
10uH/4.3A
11RHBP
0.1ufd/50V
0603 X7R
DR_UVE
OUTB+
GND
2
C28
0.68ufd/50V
0805 X7R
GND
GND
GND
R4
+3.3V
C17
TO
OUTPUT
CONNECTORS
+3.3V
22.0K
0402
C18
1.0ufd/16V
0603 X7R
R5
470pfd/50V
0603 COG
GND
GND
3.90K
0402
GND
1.0ufd/16V
0603 X7R
C34
10ufd/6.3V
0603 X5R
C35
10ufd/6.3V
0603 X5R
10.0K
0402
R12
R13
10.0K
0402
5.60K
0402
R17
U1
R14
TAS5760xxDCA
HTSSOP48-DCA
PowerPAD
C19
220pfd/50V
0402 COG
220pfd/50V
0402 COG
GND
R18
5.60K
0402
DR_OUTB
R16
DR_OUTA
10.0K
0402
MODE GAIN1 GAIN0 GAIN PIN 7 PIN 8
SW
HW
HW
HW
TI
10.0K
0402
C20
1
1
0
0
1
0
1
0
NA
12dB
6dB
0dB
SDA
FREQ
FREQ
FREQ
SCL
PBTL
PBTL
PBTL
Hard Ware MODE TABLE
FREQ=0
FREQ=1
PBTL=0
PBTL=1
PWM=384KHz
PWM=768KHz
OUTPUT=BTL
OUTPUT=PBTL
PAGE INFO:
TAS5760xxDCA MAIN COMPONENTS
DESIGN LEAD TUAN LUU
DATE
NOVEMBER 7, 2013
FILENAME TAS5760xxEVM_RevD.sbk
SCH REV
D
PCB REV
D
SHEET 1 OF 4
DRAWN BY
LDN
Figure 14. TAS5760xxEVM Rev D Schematic (Page 1 of 2)
12
TAS5760xxEVM
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TAS5760xxDCA EVALUATION BOARD (RevD)
51
SCL
52
53
SDA
54
MUX
SDA
1
FREQ
2
MUX-CTRL
8
SCL
3
PBTL
4
9
HARDWARE
SDA/FREQ
55
1
56
GND
57
+3.3V
2
6
GND
GND
M3x30
M3x30
M3
M3
M3
STANDOFFS WASHERS
SCL/PBTL
M3
M3
M3
SCREWS
3
58
7
4
+3.3V
59
5
60
GND
5
GND
6
C31
10
TS3A24157DGS
61
GND
1.0ufd/10V
0402 X5R
MSOP10-DGS
7
62
8
63
PVDD
9
64
C30
10
GND
65
CONTROL
CONSOLE
BOARD
66
67
68
69
70
GND
71
11
R23
1.0ufd/10V
0402 X5R
8
1
7
2
13
SCL
6
3
14
SDA
5
4
12
GND
15
24LC256-I/MS
MSOP8-MS
16
17
72
R21
GND
10.0K
0402
PBTL/SCL
+3.3V
GND
+3.3V
20
1
OUTBOUTB+
2
OUTB
JST-VH2
GND
GND
OUTA
GND
19
75
2
JST-VH2
73
74
1
OUTA+
OUTA-
R25
10.0K
0402
10.0K
0402
18
ANALOG
OUTPUTS
FREQ/SDA
+3.3V
EEPROM
GND
21
76
TAS5760xx
(GPIO-EXP00)
22
77
78
(GPIO-EXP06)
SPK_GAIN0
23
GND
DNP
24
79
25
R10
0.0
0603
80
26
81
27
28
MUX-CTRL
(GPIO-EXP02)
GND
FREQ
(GPIO-EXP03)
PBTL
(GPIO-EXP04)
83
29
84
30
+3.3V
85
86
SPK_SLEEP/ADR
(GPIO-EXP08)
R27
31
32
DR-OUT
10.0K
0402
2
DR_OUTB
87
33
34
5
89
90
DR-PRESENT
(GPIO-EXP09)
35
GND
GND
3
DR_OUTA
36
91
R
4
88
Shield
82
(GPIO-EXP07)
SPK_GAIN1
R28
37
10.0K
0402
92
38
L
DRIVER
OUT
1
GND
3.5mm
93
39
94
GND
C32
40
95
41
MCLK
1.0ufd/10V
0402 X5R
96
97
DR_INB
98
99
DR_INA
(VOUT2)
42
(GPIO-EXP10)
43
(VOUT1)
44
45
GND
GND
SCLK
100
MCLK
SCLK
LRCK
SDIN
46
R-GND
J1
47
GND
LRCK
48
49
SDIN
MAIN POWER IN
PVDD
50
SPK_GAIN0
SPK_GAIN1
SPK_SLEEP/ADR
L-GND
J1
GND
VIN
Red
GND
Black
GND
DR_INB
DR_INA
TI
PAGE INFO:
OUTPUT AND INPUT CONNECTIONS
DESIGN LEAD TUAN LUU
DATE
NOVEMBER 7, 2013
FILENAME TAS5760xxEVM_RevD.sbk
SCH REV
D
PCB REV
D
SHEET 2 OF 4
DRAWN BY
LDN
Figure 15. TAS5760xxEVM Rev D Schematic (Page 2 of 2)
SLOU371A – May 2013 – Revised December 2013
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TAS5760xxEVM
Copyright © 2013, Texas Instruments Incorporated
13
Revision History
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Revision History
Changes from Original (July, 2013) to A Revision .......................................................................................................... Page
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Added link to PPCMB web page. ....................................................................................................... 1
Added link to E2E forums. ............................................................................................................... 1
Changed PPCMB and TAS5760xxEVM board, Figure 1. ........................................................................... 2
Changed Device Manager, Figure 2. .................................................................................................. 3
Deleted BTL from second sentence of second paragraph below Figure 2 ....................................................... 3
Changed first sentence of third paragraph after Figure 2 ........................................................................... 3
Changed PPCMB and TAS5760xxEVM Connection, Figure 3. .................................................................... 4
Changed power supply voltage from 24 to 4.5-26.4 VDC .......................................................................... 4
Added sentence before Figure 5. ...................................................................................................... 5
Changed Add Target List, Figure 5. .................................................................................................... 5
PPCMB and TAS5760xxEVM, Figure 6. .............................................................................................. 6
Changed last sentence of Section 2. .................................................................................................. 6
Digital Gain Pop-up, Figure 8. .......................................................................................................... 7
Deleted last four rows of BOM. ....................................................................................................... 11
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
14
Revision History
SLOU371A – May 2013 – Revised December 2013
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EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS
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FCC Interference Statement for Class A EVM devices
This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules.
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instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to
cause harmful interference in which case the user will be required to correct the interference at his own expense.
FCC Interference Statement for Class B EVM devices
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules.
These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment
generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause
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this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and
on, the user is encouraged to try to correct the interference by one or more of the following measures:
• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and receiver.
• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
• Consult the dealer or an experienced radio/TV technician for help.
For EVMs annotated as IC – INDUSTRY CANADA Compliant
This Class A or B digital apparatus complies with Canadian ICES-003.
Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the
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Concerning EVMs including radio transmitters
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This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum
permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain
greater than the maximum gain indicated for that type, are strictly prohibited for use with this device.
Cet appareil numérique de la classe A ou B est conforme à la norme NMB-003 du Canada.
Les changements ou les modifications pas expressément approuvés par la partie responsable de la conformité ont pu vider l’autorité de
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If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product:
1.
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