TCAN1463DYYRQ1

TCAN1463-Q1 SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 TCAN1463-Q1 Automotive Signal Improvement Capable CAN FD Transceiver With Sleep Mode 1 Features 2 Applications • • • • • • • • • • • • • • • • • • • • • • AEC-Q100 (grade 1) qualified for automotive applications Functional Safety-Capable – Documentation available to aid in functional safety system design Meets the requirements of ISO 11898-2:2016 Implements Signal Improvement Capability (SIC) as defined in CiA 601-4 – Actively improves bus signal by eliminating ringing and enhancing bit symmetry Supports classic CAN and CAN FD up to 8 Mbps Wide input operational voltage range VIO level shifting supports: 1.7 V to 5.5 V Operating modes: – Normal mode – Silent mode – Standby mode – Low-power sleep mode High-voltage INH output for system power control INH_MASK pin to keep INH disabled during spurious wake-up events Local wake-up support via the WAKE pin Sleep Wake Error (SWE) timer enables safe transition from standby mode to sleep mode in the event of a system power failure or software fault – Allows for extended power-up time Defined behavior when unpowered – Bus and IO terminals are high impedance (no load to operating bus or application) Protection features: – ±58-V CAN bus fault tolerant – Load dump support on VSUP – IEC ESD protection – Undervoltage protection – Thermal shutdown protection – TXD dominant state timeout (TXD DTO) Available in a 14-pin leaded (SOT and SOIC) packages, and leadless (VSON) package with wettable flanks for improved automated optical inspection (AOI) capability Body electronics and lighting Automotive gateway Advanced driver assistance systems (ADAS) Infotainment and cluster Hybrid, electric & powertrain systems Personal transport vehicles - Electric bike Industrial transportation 3 Description The TCAN1463-Q1 is a high-speed Controller Area Network (CAN) transceiver that meets the physical layer requirements of the ISO 11898-2:2016 highspeed CAN specification and the CiA 601-4 SIC specification. The device supports both classical CAN and CAN FD (flexible data rate) data rates up to 8 Megabits per second (Mbps). The TCAN1463-Q1 reduces signal ringing at the dominant-to-recessive edge and enables higher throughput in complex network topologies. SIC allows the applications to extract the real benefit of CAN FD by operating at 2 Mbps, 5 Mbps, or beyond in large networks with multiple unterminated stubs. The device is pin compatible with classical CAN FD transceivers, such as TCAN1043A-Q1 or TCAN1043Q1 when INH_MASK feature is not used (INH_MASK pin is left floating or connected to GND). Package Information PART NUMBER PACKAGE1 TCAN1463-Q1 BODY SIZE (NOM) SOT (DYY) 4.20 mm x 2.00 mm SOIC (D) 8.65 mm x 3.90 mm VSON (DMT) 4.50 mm x 3.00 mm 1. For all available packages, see the orderable addendum at the end of the data sheet. VBAT 3 k
EN VIN 100 k VREG 100 nF VSUP INH 5 V VOUT VCC 7 22 nF 33 k WAKE 10 9 3 VIO 100 nF VIO CANH 5 13 100 nF VDD GPIO GPIO MCU EN 6 nSTB TCAN1463 14 nFAULT GPIO 8 CANL CAN FD Controller 12 1 TXD RXD Optional: Terminating Node 4 2 11 Optional: Filtering, Transient and ESD INH_MASK (leave floating or connect to GND) Simplified Schematic An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Description (continued).................................................. 2 6 Pin Configuration and Functions...................................3 7 Specifications.................................................................. 4 7.1 Absolute Maximum Ratings........................................ 4 7.2 ESD Ratings............................................................... 4 7.3 ESD Ratings - IEC Specifications............................... 4 7.4 Recommended Operating Conditions.........................5 7.5 Thermal Information....................................................5 7.6 Power Dissipation Ratings.......................................... 5 7.7 Power Supply Characteristics..................................... 6 7.8 Electrical Characteristics.............................................7 7.9 Timing Requirements.................................................. 9 7.10 Switching Characteristics........................................10 7.11 Typical Characteristics.............................................11 8 Parameter Measurement Information.......................... 12 9 Detailed Description......................................................17 9.1 Overview................................................................... 17 9.2 Functional Block Diagram......................................... 19 9.3 Feature Description...................................................20 9.4 Device Functional Modes..........................................27 10 Application Information Disclaimer........................... 37 10.1 Application Information........................................... 37 11 Device and Documentation Support..........................42 11.1 Documentation Support.......................................... 42 11.2 Receiving Notification of Documentation Updates.. 42 11.3 Support Resources................................................. 42 11.4 Trademarks............................................................. 42 11.5 Electrostatic Discharge Caution.............................. 42 11.6 Glossary.................................................................. 42 12 Mechanical, Packaging, and Orderable Information.................................................................... 42 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (November 2022) to Revision C (December 2022) Page • Deleted the Product Preview note from the D package in Package Information table....................................... 1 • Changed text From: "The CAN Transceiver blocks its transmitter and receiver" To: "The CAN transceiver blocks its transmitter" in the CAN Active section.............................................................................................. 35 Changes from Revision A (July 2022) to Revision B (November 2022) Page • Deleted the Product Preview note from the DYY package in Package Information table.................................. 1 Changes from Revision * (March 2021) to Revision A (July 2022) Page • Changed the document from Advanced Information to Production data............................................................ 1 5 Description (continued) The TCAN1463-Q1 allows for system-level reductions in battery current consumption by selectively enabling the various power supplies that may be present on a system via the INH output pin. This allows a low-current sleep state in which power is gated to all system components except for the TCAN1463-Q1, while monitoring the CAN bus. When a wake-up event is detected, the TCAN1463-Q1 initiates system start-up by driving INH high. The TCAN1463-Q1 features an SWE timer that enables a safe transition to Sleep mode after 4 minutes (tINACTIVE) of inactivity in Standby mode. This makes sure the device is transitioned to low-power Sleep mode if the MCU fails to transition the device to Normal mode. 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 6 Pin Configuration and Functions TXD 1 14 nSTB GND 2 13 CANH 3 12 CANL 4 11 INH_MASK VIO   5 10 VSUP   EN 6 9 WAKE INH 7 8 nFAULT VCC   RXD Not to scale TXD 1 14 nSTB GND 2 13 CANH VCC 3 12 CANL RXD 4 11 INH_MASK VIO 5 10 VSUP EN 6 9 WAKE INH 7 8 nFAULT Thermal Pad Figure 6-1. D and DYY Packages, 14 Pin (SOIC) and (SOT) (Top View) Not to scale Figure 6-2. DMT Package, 14 Pin (VSON) (Top View) PINS NAME NO. TYPE (1) DESCRIPTION TXD 1 I GND 2 GND VCC 3 P 5 V transceiver supply RXD 4 O CAN receive data output, tri-state when VIO < UVIO VIO 5 P I/O supply voltage EN 6 I Enable input for mode control, integrated pull-down INH 7 O Inhibit pin to control system voltage regulators and supplies, high-voltage nFAULT 8 O Fault output, inverted logic WAKE 9 I Local WAKE input terminal, high voltage VSUP 10 P High-voltage supply from battery INH_MASK 11 I INH_MASK pin used to activate/deactivate INH functionality. Internal pull-down to GND. Can be left floating or connected to GND if INH_MASK functionality is not needed. Do not connect to power supply. CANL 12 I/O Low-level CAN bus input/output line CANH 13 I/O High-level CAN bus input/output line nSTB 14 I Thermal Pad (1) — CAN transmit data input, integrated pull-up Ground connection Standby mode control input, integrated pull-down Connect the thermal pad to the printed circuit board (PCB) ground plane for thermal relief I = input, O = output, P = power, GND = ground Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 3 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) MIN MAX VSUP Supply voltage(2) –0.3 45 UNIT V VCC Supply voltage –0.3 6 V VIO Supply voltage I/O level shifter –0.3 6 V VBUS CAN bus I/O voltage (CANH, CANL) –58 58 V VDIFF CAN bus differential voltage (VDIFF = VCANH - VCANL) -58 58 V V V VWAKE WAKE input voltage –45 45 and VI ≤ VSUP+0.3 VINH INH pin voltage -0.3 45 and VO ≤ VSUP+0.3 VLOGIC Logic pin voltage –0.3 6 V IO(LOGIC) Logic pin output current 8 mA IO(INH) Inhibit pin output current 6 mA IO(WAKE) WAKE pin output current 3 mA TJ Junction temperature –40 165 °C TSTG Storage temperature –65 150 °C (1) (2) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute maximum ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If briefly operating outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not sustain damage, but it may not be fully functional. Operating the device in this manner may affect device reliability, functionality, performance, and shorten the device lifetime. Able to support load dumps of up to 45 V for 300ms 7.2 ESD Ratings VESD Electrostatic discharge Human body model (HBM), per AEC Q100-002(1) Charged device model (CDM), per AEC Q100-011 (1) VALUE UNIT VSUP, CANH, CANL, and WAKE with respect to ground. HBM ESD classification level 3B ± 8000 V All pins except VSUP, CANH, CANL, and WAKE. HBM ESD classification level 3A ± 4000 V All pins. CDM ESD classification level C5 ± 750 V AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 7.3 ESD Ratings - IEC Specifications 4 Unpowered Contact Discharge per ISO 10605 (1) VALUE UNIT ± 8000 V VESD Electrostatic discharge CANH, CANL, VSUP, and WAKE terminal to GND VESD Electrostatic discharge CANH and CANL terminal to GND SAE J2962-2 per ISO 10605 Powered Contact Discharge (2) ± 8000 V VESD Electrostatic discharge CANH and CANL terminal to GND SAE J2962-2 per ISO 10605 Powered Air discharge (2) ± 15000 V Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 Transient voltage per ISO-7637-2 (1) CAN, VSUP, WAKE terminal to GND VTRAN Transient voltage per ISO-7637-3 (2) (1) (2) CAN terminal to GND VALUE UNIT Pulse 1 - 100 V Pulse 2 75 V Pulse 3a - 150 V Pulse 3b 100 V Direct coupling capacitor "slow transient pulse" with 100 nF coupling capacitor powered ± 30 V Results given here are specific to the IEC 62228-3 Integrated circuits – EMC evaluation of transceivers – Part 3: CAN transceivers. Testing performed by IBEE Zwickau, EMC report available upon request. Results given here are specific to the SAE J2962-2 Communication Transceivers Qualification Requirements - CAN. Testing performed by OEM-approved independent 3rd party, EMC report available upon request. 7.4 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VSUP Supply voltage 4.5 40 V VIO I/O supply voltage 1.7 5.5 V VCC CAN transceiver supply voltage 4.5 5.5 V IOH(DO) Digital output high-level current –2 IOL(DO) Digital output low-level current 2 mA IO(INH) Inhibit output current 4 mA TJ Operating junction temperature -40 150 °C TSDR Thermal shutdown 175 TSDF Thermal shutdown release 160 TSD(HYS) Thermal shutdown hysteresis mA °C °C 10 °C 7.5 Thermal Information TCAN1463-Q1 THERMAL METRIC (1) D (SOIC) UNIT DMT (VSON) DYY (SOT) RΘJA Junction-to-ambient thermal resistance 87.1 39.7 91.0 °C/W RΘJC(top) Junction-to-case (top) thermal resistance 41.8 41.1 41.7 °C/W RΘJB Junction-to-board thermal resistance 43.7 15.9 25.6 °C/W ΨJT Junction-to-top characterization parameter 8.5 0.9 25.4 °C/W ΨJB Junction-to-board characterization parameter 43.3 15.9 1.1 °C/W RΘJC(bot) Junction-to-case (bottom) thermal resistance N/A 6.6 N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 7.6 Power Dissipation Ratings PARAMETER PD Average power dissipation TEST CONDITIONS POWER DISSIPATION UNIT VSUP = 14 V, VCC = 5 V, VIO = 5 V, TJ = 27°C, RL = 60 Ω, nSTB = 5 V, EN = 5 V, CL_RXD = 15 pF. Typical CAN operating conditions at 500 kbps with 25% transmission (dominant) rate. 62 mW VSUP = 14 V, VCC = 5.5 V, VIO = 5.5 V, TJ = 150°C, RL = 50 Ω, nSTB = 5.5 V, EN = 5.5 V, CL_RXD = 15 pF. Typical high load CAN operating conditions at 1 Mbps with 50% transmission (dominant) rate and loaded network. 135 mW Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 5 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 7.7 Power Supply Characteristics Over recommended operating conditions with TJ = -40°C to 150°C, unless otherwise noted. All typical values are taken at 25°C, VSUP = 12 V, VIO = 3.3 V, VCC = 5 V and RL = 60 Ω PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 140 µA 60 µA 30 µA 50 µA 3.85 4.4 V 3.5 4.25 V Supply Voltage and Current Characteristics ISUP_NORMAL Supply current CAN active Normal mode, silent mode, and go-to-sleep mode ISUP_STBY Supply current, Standby mode CAN autonomous: inactive Standby mode (2) ISUP_SLEEP Supply current CAN autonomous: inactive Sleep mode ISUP_BIAS Supply current 5.5 V < VSUP ≤ 28 V Additional current when in CAN autonomous: active See Figure 8-3 UVSUP(R) Undervoltage VSUP threshold rising Ramp up UVSUP(F) Undervoltage VSUP threshold falling Ramp down Supply current CAN active: dominant Normal mode TXD = 0 V, RL = 60 Ω, CL = open See Figure 8-3 60 mA Supply current CAN active: dominant Normal mode TXD = 0 V, RL = 50 Ω, CL = open See Figure 8-3 70 mA VCC supply current normal mode Dominant with bus fault Normal mode TXD = 0 V, RL = open, CL = open, CANH = -25 V See Figure 8-3 110 mA ICC_NORMAL Supply current CAN active: recessive Normal mode TXD = 0 V, RL = 50 Ω, CL = open See Figure 8-3 5 mA ICC_STBY Supply current CAN autonomous: inactive Standby mode, TJ = -40 °C to 85 °C EN = nSTB = 0 V See Figure 8-3 2 µA ICC_STBY Supply current CAN autonomous: inactive Standby mode EN = nSTB = 0 V See Figure 8-3 5 µA 2.5 mA ICC_NORMAL ICC_SILENT Supply current Silent and go-to-sleep mode TXD = nSTB = VIO, RL = 50 Ω, CL = open See Figure 8-3 Supply current CAN autonomous: inactive Sleep mode, TJ = -40 °C to 85 °C EN = 0 V or VIO, nSTB = 0 V See Figure 8-3 2 µA Supply current CAN autonomous: inactive Sleep mode EN = 0 V or VIO, nSTB = 0 V See Figure 8-3 5 µA UVCC(R) Undervoltage VCC threshold rising Ramp up 4.4 V UVCC(F) Undervoltage VCC threshold falling Ramp down VHYS(UVCC) Hysteresis voltage on UVCC 320 mV 350 µA 5 µA 2.5 µA 5 µA 1.65 V 160 mV ICC_SLEEP I/O supply current Normal mode RXD floating, TXD = 0 V I/O supply current Normal mode, standby mode, or go-to-sleep mode RXD floating, TXD = VIO I/O supply current Sleep mode, TJ = -40 °C to 85 °C nSTB = 0 V I/O supply current Sleep mode nSTB = 0 V UVIO(R) Under voltage VIO threshold rising Ramp up UVIO(F) Under voltage VIO threshold falling Ramp down VHYS(UVIO) Hysteresis voltage on UVIO IIO_NORMAL IIO_SLEEP (1) (2) 6 18 (1) 4.1 3.5 3.9 50 250 1.4 1 1.25 30 60 V V ISUP(BIAS) is calculated by subtracting the supply current in CAN autonomous inactive mode from the total supply current in CAN autonomous active mode After a valid wake-up, the CAN transceiver switches to CAN autonomous active mode and the ISUP(BIAS) current needs to be added to the specified ISUP current in CAN autonomous inactive mode. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 7.8 Electrical Characteristics Over recommended operating conditions with TJ = –40°C to 150°C, unless otherwise noted. All typical values are taken at 25°C, VSUP = 12 V, VIO = 3.3 V, VCC = 5 V and RL = 60 Ω PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CAN Driver Characteristics 2.75 4.5 V 0.5 2.25 V TXD = VIO, RL = open (no load), RCM = open See Figure 8-1 and Figure 8-4 2 3 V VSYM Driver symmetry Bus biasing active (VO(CANH) + VO(CANL) ) / VCC nSTB= VIO, RL = 60 Ω, CSPLIT = 4.7 nF, CL = Open, RCM = Open, TXD = 250 kHz, 1 MHz, 2.5 MHz See Figure 8-1 and Figure 8-4 0.9 1.1 V/V VSYM_DC DC Driver symmetry Bus biasing active VCC – VO(CANH) – VO(CANL) nSTB= VIO, RL = 60 Ω, CL = open See Figure 8-1 and Figure 8-4 –400 400 mV VO(D) Dominant output voltage Bus biasing active VO(R) Recessive output voltage Bus biasing active VOD(DOM) VOD(REC) Differential output voltage Bus biasing active Dominant Differential output voltage Bus biasing active Recessive CANH TXD = 0 V, 50 ≤ RL ≤ 65 Ω, CL = open, RCM = open See Figure 8-1 and Figure 8-4 CANL CANH - CANL nSTB =VIO, TXD = 0 V, 50 Ω ≤ RL ≤ 65 Ω, CL = open See Figure 8-1 and Figure 8-4 1.5 3 V CANH - CANL nSTB =VIO, TXD = 0 V, 45 Ω ≤ RL ≤ 70 Ω, CL = open See Figure 8-1 and Figure 8-4 1.4 3.3 V CANH - CANL nSTB =VIO, TXD = 0 V, RL = 2240 Ω, CL = open See Figure 8-1 and Figure 8-4 1.5 5 V CANH - CANL nSTB =VIO, TXD = VIO, RL = open Ω, CL = open See Figure 8-1 and Figure 8-4 –50 50 mV -0.1 0.1 V nSTB =0 V, TXD = VIO, RL = open (no load), CL = open See Figure 8-1 and Figure 8-4 CANH VOD(STB) IOS(DOM) Differential output voltage Bus biasing inactive Recessive CANL nSTB =0 V, TXD = VIO, RL = open (no load), CL = open See Figure 8-1 and Figure 8-4 -0.1 0.1 V CANH - CANL nSTB =0 V, TXD = VIO, RL = open (no load), CL = open See Figure 8-1 and Figure 8-4 -0.2 0.2 V nSTB = VIO, TXD = 0 V -15 V ≤ V(CANH) ≤ 40 V See Figure 8-1 and Figure 8-8 Short-circuit steady-state output current Bus biasing active Dominant –100 mA nSTB = VIO, TXD = 0 V -15 V ≤ V(CANL) ≤ 40 V See Figure 8-1 and Figure 8-8 nSTB = VIO, VBUS = CANH = CANL -27 V ≤ VBUS ≤ 42 V See Figure 8-1 and Figure 8-8 100 mA 3 mA IOS(REC) Short-circuit steady-state output current Bus biasing active Recessive RID(dom) Differential input resistance in dominant phase See Figure 9-2 40 ohm RID(active_rec) Differential input resistance in active recessive See Figure 9-2 drive phase 60 ohm –3 CAN Receiver Characteristics VIT(DOM) Receiver dominant state input voltage range Bus biasing active VIT(REC) Receiver recessive state input voltage range Bus biasing active VHYS Hysteresis voltage for input threshold Bus biasing active VDIFF(DOM) Receiver dominant state input voltage range Bus biasing inactive VDIFF(REC) Receiver recessive state input voltage range Bus biasing inactive nSTB = VIO, -12 V ≤ VCM ≤ 12 V See Figure 8-5 and Table 9-6 0.9 8 V -3 0.5 V nSTB = VIO See Figure 8-5 and Table 9-6 nSTB = 0 V, -12 V ≤ VCM ≤ 12 V See Figure 8-5 and Table 9-6 135 mV 1.150 8 V -3 0.4 V Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 7 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 7.8 Electrical Characteristics (continued) Over recommended operating conditions with TJ = –40°C to 150°C, unless otherwise noted. All typical values are taken at 25°C, VSUP = 12 V, VIO = 3.3 V, VCC = 5 V and RL = 60 Ω PARAMETER TEST CONDITIONS VCM Common mode range nSTB = VIO See Figure 8-5 and Table 9-6 IOFF(LKG) Power-off (unpowered) bus input leakage current MIN TYP UNIT 12 V VSUP = 0 V, CANH = CANL = 5 V 2.5 µA (1) TXD = VCC = VIO 40 pF CID Differential input capacitance (1) TXD = VCC = VIO 20 pF RID Differential input resistance 100 kΩ Input resistance (CANH or CANL) TXD = VCC = VIO = 5 V, nSTB = 5 V -12 V ≤ VCM ≤ 12 V 30 RIN 15 50 kΩ RIN(M) Input resistance matching: [1 – RIN(CANH) / RIN(CANL)] × 100% V(CANH) = V(CANL) = 5 V –3 3 % RCBF Valid differential load impedance range for bus RCM = RL, CL = open fault circuitry 45 70 Ω Input capacitance to ground (CANH or CANL) CI –12 MAX TXD Characteristics VIH High-level input voltage VIL Low-level input voltage 0.7 IIH High-level input leakage current TXD = VIO = 5.5 V IIL Low-level input leakage current TXD = 0 V, VIO = 5.5 V ILKG(OFF) Unpowered leakage current TXD = 5.5 V, VSUP = VIO = 0 V RPU Pull-up resistance to VIO CI Input Capacitance VIO 0.3 VIO –2.5 1 µA –115 –2.5 µA –1 40 VIN = 0.4 x sin(2 × π × 2 × 106 × t) + 2.5 V 60 1 µA 80 kΩ 5 pF RXD Characteristics VOH High-level output voltage IO = –2 mA See Figure 8-5 VOL Low-level output voltage IO = 2 mA See Figure 8-5 ILKG(OFF) Unpowered leakage current RXD = 5.5 V, VSUP = VIO = 0 V 0.8 VIO -1 0.2 VIO 1 µA nSTB Characteristics VIH High-level input voltage VIL Low-level input voltage 0.7 IIH High-level input leakage current nSTB = VIO = 5.5 V IIL Low-level input leakage current nSTB = 0 V, VIO = 5.5 V ILKG(OFF) Unpowered leakage current nSTB = 5.5 V, VIO = 0 V RPD Pull-down resistance to GND VIO 0.3 VIO 0.5 115 µA –1 1 µA –1 1 µA 80 kΩ 40 60 nFAULT Characteristics VOH High-level output voltage IO = -2 mA VOL Low-level output voltage IO = 2 mA ILKG(OFF) Unpowered leakage current nFAULT = 5.5 V, VIO = 0 V 0.8 VIO –1 0.2 VIO 1 µA INH_MASK Characteristics VIH High-level input voltage 0.7 VIL Low-level input voltage IIH High-level input leakage current INH_MASK = VCC = VIO = 5.5 V IIL Low-level input leakage current ILKG(OFF) Unpowered leakage current RPD Pull-down resistance to GND (1) VIO 0.3 VIO 0.5 115 µA INH_MASK = 0 V, VCC = VIO = 5.5 V -1 1 µA INH_MASK = 5.5 V, VCC = VIO = 0 V -1 1 µA 80 kΩ 40 60 EN Characteristics 8 VIH High-level input voltage VIL Low-level input voltage IIH High-level input leakage current 0.7 EN = VCC = VIO = 5.5 V Submit Document Feedback 0.5 VIO 0.3 VIO 115 µA Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 7.8 Electrical Characteristics (continued) Over recommended operating conditions with TJ = –40°C to 150°C, unless otherwise noted. All typical values are taken at 25°C, VSUP = 12 V, VIO = 3.3 V, VCC = 5 V and RL = 60 Ω PARAMETER TEST CONDITIONS MIN TYP MAX UNIT IIL Low-level input leakage current EN = 0 V, VCC = VIO = 5.5 V -1 1 ILKG(OFF) Unpowered leakage current EN = 5.5 V, VCC = VIO = 0 V -1 1 µA RPD Pull-down resistance to GND 80 kΩ 40 60 µA WAKE Characteristics VIH High-level input voltage VIL Low-level input voltage IIH High-level input leakage current WAKE = VSUP – 1 V IIL Low-level input leakage current WAKE = 1 V VSUP - 2 Sleep mode V VSUP - 3.5 -3 V µA 3 µA 1 V INH Characteristics ΔVH High-level voltage drop from VSUP to INH (VSUP - VINH) IINH = –6 mA ILKG(INH) Sleep mode leakage current INH = 0 V RPD Pull-down resistance Sleep mode (1) 0.5 –0.5 2.5 4 0.5 µA 5.6 MΩ Specified by design and verified via bench characterization 7.9 Timing Requirements Over recommended operating conditions with TJ = -40°C to 150°C, unless otherwise noted. All typical values are taken at 25°C, VSUP = 12 V, VIO = 3.3 V, VCC = 5 V and RL = 60 Ω PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 350 ms 200 µs Supply Characteristics tPWRUP Time required for INH active after VSUP ≥ UVSUP(R) See Figure 8-12 tUV Undervoltage filter time VCC and VIO tUV(RE-ENABLE) Re-enable time after undervoltage event (1) (1) VCC ≤ UVCC or VIO ≤ UVIO 340 100 Time for device to return to normal operation from a UVCC or UVIO undervoltage event µs Device Characteristics tPROP(LOOP1) Total loop delay, driver input (TXD) to receiver output (RXD) Recessive to dominant RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF See Figure 8-6 100 190 ns tPROP(LOOP2) Total loop delay, driver input (TXD) to receiver output (RXD) Dominant to recessive RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF See Figure 8-6 110 190 ns 0.8 2 ms 0.5 1.8 µs 0.6 1.2 s (1) tWK(TIMEOUT) Bus wake-up timeout value tWK(FILTER) Bus time to meet filtered bus requirements for wake-up request (1) tSILENCE Timeout for bus inactivity (1) tINACTIVE Standby mode hardware timer for power-up inactivity Timer is reset and restarted, when bus changes from dominant to recessive or vice versa 3 Measured from the start of a dominant-recessive-dominant nSTB = EN = 0 V, RL = 60 Ω, CSPLIT = 4.7 nF sequence (each phase 6 μs) until See Figure 8-9 and Figure 10-3 VSYM ≥ 0.1 tBIAS Bus bias reaction time (1) tCBF Bus fault-detection time tWAKE_HT Hold time for which WAKE pin voltage should be stable after the rising or falling edge on WAKE pin to recognize LWU 45 ≤ RCM ≤ 70 Ω CL = open 4 5 min 200 µs 2.5 5 µs 50 µs 100 µs Mode Change Characteristics tINH_SLP_STB Time after WUP or LWU event until INH asserted (1) tINH_MASK Hold time for which INH_MASK should be stable after the rising or falling edge to enable/disable INH_MASK function See Figure 8-10 and Figure 8-11 tMODE1 Mode change time from leaving the Sleep mode to Time measured from VCC and VIO crossing UV entering Normal or Silent mode (1) thresholds to entering normal or silent mode. 20 µs tMODE2 Mode change time between normal, silent and standby mode and from sleep to standby mode (1) 10 µs Mode change time between normal, silent and standby mode and from sleep to standby mode 50 µs Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 9 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 7.9 Timing Requirements (continued) Over recommended operating conditions with TJ = -40°C to 150°C, unless otherwise noted. All typical values are taken at 25°C, VSUP = 12 V, VIO = 3.3 V, VCC = 5 V and RL = 60 Ω PARAMETER tGOTOSLEEP (1) TEST CONDITIONS Minimum hold time for transition to sleep mode (1) MIN EN = H and nSTB = L TYP 20 MAX 50 UNIT µs Specified by design and verified via bench characterization 7.10 Switching Characteristics Over recommended operating conditions with TJ = -40°C to 150°C, unless otherwise noted. All typical values are taken at 25°C, VSUP = 12 V, VIO = 3.3 V, VCC = 5 V and RL = 60 Ω PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Driver Characteristics tprop(TxDbusdom) tprop(TxD- Propagation delay time, high-to-low TXD edge to bus dominant (recessive to dominant) busrec) Propagation delay time, low-to-high TXD edge to bus recessive (dominant to recessive) tsk(p) Pulse skew (|tprop(TxD-busdom) - tprop(TxD-busrec)|) tR Differential output signal rise time tF Differential output signal fall time tTXDDTO Dominant timeout RL = 60 Ω, CL = 100 pF, RCM = open See Figure 8-4 RL = 60 Ω, CL = 100 pF, RCM = open See Figure 8-4 TXD = 0 V, RL = 60 Ω, CL = open See Figure 8-7 80 ns 80 ns 3 ns 25 ns 25 ns 1.2 3.8 ms 110 ns 110 ns Receiver Characteristics tprop(busdomRxD) tprop(busrec- Propagation delay time, bus dominant input to RxD low output RxD) Propagation delay time, bus to recessive input to RXD high output tR Output signal rise time (RXD) tF Output signal fall time (RXD) tBUSDOM CL(RXD) = 15 pF See Figure 8-5 CL(RXD) = 15 pF See Figure 8-5 RL = 60 Ω, CL = open See Figure 8-5 Dominant time out 3 ns 3 ns 1.4 3.8 ms Bit time on CAN bus output pins with tBIT(TXD) = 500 ns 490 510 ns Bit time on CAN bus output pins with tBIT(TXD) = 200 ns 190 210 ns Bit time on CAN bus output pins with tBIT(TXD) = 125 ns(2) 115 135 ns 470 520 ns 170 210 ns 95 135 ns Receiver timing symmetry with tBIT(TXD) = 500 ns –20 15 ns Receiver timing symmetry with tBIT(TXD) = 200 ns –20 15 ns Receiver timing symmetry with tBIT(TXD) = 125 ns(2) –20 15 ns 530 ns CAN FD Characteristics tBIT(BUS) (1) Bit time on RXD output pins with tBIT(TXD) = 500 ns tBIT(RXD) (1) Bit time on RXD output pins with tBIT(TXD) = 200 ns Bit time on RXD output pins with tBIT(TXD) = 125 ns(2) ΔtREC (1) RL = 60 Ω, CL1 = open, CL2 = 100 pF, CL(RXD) = 15 ΔtREC = tBIT(RXD) - tBIT(BUS) See Figure 8-6 Signal Improvement Characteristics tSIC_TX_base Signal improvement time TX-based Time from rising edge of the TxD signal to the end of the signal improvement phase ΔtBit(Bus) Transmitted bit width variation Bus recessive bit length variation relative to TxD bit length, see Figure 8-6 ΔtBit(Bus) = tBit(Bus) - tBit(TxD) –10 10 ns ΔtBIT(RxD) Received bit width variation RxD recessive bit length variation relative to TXD bit length, see Figure 8-6 ΔtBit(RxD) = tBit(RxD) - tBit(TxD) –30 20 ns ΔtREC Receiver timing symmetry RXD recessive bit length variation relative to bus bit length, see Figure 8-6 ΔtREC = tBit(RxD) - tBit(Bus) –20 15 ns (1) (2) 10 The input signal on TXD shall have rise times and fall times (10% to 90%) of less than 10 ns Specified by design and verified via bench characterization Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 7.11 Typical Characteristics 3.5 2.5 VCC = 4.5 V VCC = 5 V VCC = 5.5 V 3 ICC Recessive (mA) VOD(D) (V) 2.5 2.25 2 1.5 1 2 1.75 1.5 1.25 0.5 0 -40 -20 0 20 40 60 80 100 Junction Temperature (C) RL = 60 Ω VIO = 3.3 V 120 CL = Open 140 1 -40 160 20 40 60 80 100 Junction Temperature (C) 120 CL = Open VIO = 3.3 V 140 160 RCM = Open Figure 7-2. ICC Recessive vs Temperature 35 25 20 15 Total Loop Delay, tPROP(LOOP1) (ns) 150 VSUP = 4.5 V VSUP = 7 V VSUP = 12 V VSUP = 18 V VSUP = 28 V VSUP = 40 V 30 ISUP_SLEEP (A) 0 RL = 60 Ω VCC = 5 V RCM = Open Figure 7-1. VOD(DOM) vs Temperature and VCC 10 -40 -20 140 135 130 125 120 115 110 105 100 95 90 -40 -20 0 20 40 60 80 100 Junction Temperature (C) RL = 60 Ω VCC = 5 V CL = Open VIO = 3.3 V 120 140 160 RCM = Open VIO = 1.7 V VIO = 3.3 V VIO = 5.5 V 145 -20 0 20 40 60 80 100 Junction Temperature (C) RL = 60 Ω VCC = 5 V CL = 100 pF VSUP = 12 V 120 140 160 CL(RXD) = 15 pF Figure 7-4. Loop Propagation Delay vs VIO and Temperature Figure 7-3. ISUP in Sleep Mode vs VSUP and Temperature Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 11 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 8 Parameter Measurement Information CANH 2.5 V RXD Bias Unit GND CANL Figure 8-1. Common-Mode Bias Unit and Receiver CANH RL/2 TXD CL1 CL2 RL/2 CANL nSTB RXD CL(RXD) Figure 8-2. Test Circuit CANH TXD RL CL CANL Figure 8-3. Supply Test Circuit 12 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 RCM CANH VIO 70% TXD 30% TXD RL CL VOD VCM Tprop(TXD-busdom) Tprop(TXD-busrec) VO(CANH) CANL 0V 90% RCM 0.9V VO(CANL) VOD 0.5V 10% tR tF Figure 8-4. Driver Test Circuit and Measurement CANH 0.9V VID IO 0.5V RXD 0V VID tprop(busdom-RXD) tprop(busrec-RXD) VOH VO CL_RXD CANL 90% 70% VO(RXD) 30% 10% VOL tF tR Figure 8-5. Receiver Test Circuit and Measurement TXD VI 70% tPROP(LOOP1) 30% 30% CANH 0V VI TXD RL 5 x tBIT(TXD) CL tBIT(TXD) CANL tBIT(BUS) 900mV 500mV RXD VDIFF VO CL_RXD RXD VOH 70% 30% tBIT(RXD) VOL tPROP(LOOP2) Figure 8-6. Transmitter and Receiver Timing Behavior Test Circuit and Measurement Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 13 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 VIH CANH TXD TXD CL RL 0V VOD VOD(D) CANL 0.9V VOD 0.5V 0V tTXDDTO Figure 8-7. TXD Dominant Time Out Test Circuit and Measurement CANH 200
s IOS TXD VBUS IOS CANL VBUS VCANH, VCANL 0V or 0V VCANH, VCANL VBUS Figure 8-8. Driver Short-Circuit Current Test and Measurement VDIFF 2.0 V 1.15 V 0.4 V t > tWK_FILTER(MAX) t > tWK_FILTER(MAX) t > tWK_FILTER(MAX) VSYM 0.1 tBIAS Figure 8-9. Bias Reaction Time Measurement 14 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 Device in Silent Mode VIH 0.7 VIO INH_MASK 0V t > tINH_MASK nFAULT1 1 INH tINH_SLP_STB INH Enabled INH Disabled 1. nFAULT clears upon exiting silent mode Figure 8-10. INH Disable Timing Diagram Device in Silent Mode VIH INH_MASK 0.3 VIO 0V t > tINH_MASK nFAULT1 1 INH tINH_SLP_STB INH Disabled INH Enabled 1. nFAULT clears upon exiting silent mode Figure 8-11. INH Enable Timing Diagram Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 15 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 VSUP UVSUP(R) VSUP INH VSUP 0V VO CVSUP tPWRUP TCAN1463 INH = H VSUP -1V INH Figure 8-12. Power-Up Timing 16 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 9 Detailed Description 9.1 Overview The TCAN1463-Q1 is a high-speed Controller Area Network (CAN) transceiver that meets the physical layer requirements of the ISO 11898-2:2016 and CiA 601-4 high speed CAN specifications. The TCAN1463-Q1 is data rate agnostic making it backward compatible for supporting classical CAN applications while also supporting CAN FD networks up to 8 megabits per second (Mbps). The transceiver has three separate supply inputs, VSUP, VCC, and VIO. By using VIO, the TCAN1463-Q1 can interface directly to a 1.8 V, 2.5 V, 3.3 V, or 5 V controller without the need for a level shifter. The TCAN1463-Q1 allows for system-level reductions in battery current consumption by selectively enabling the various power supplies that may be present in the system via the INH output pin. This enables a low-current sleep state in which power is gated to all system components except for the TCAN1463-Q1, which remains in a low-power state while monitoring the CAN bus. When a wake-up pattern is detected on the bus or when a local wake up is requested via the WAKE input, the device initiates node start-up by driving INH high. The TCAN1463-Q1 includes many protection and diagnostic features including undervoltage detection, CAN bus fault detection, SWE timer, battery connection detection, thermal shutdown (TSD), driver dominant timeout (TXD DTO), and bus fault protection up to ±58 V. 9.1.1 Signal Improvement The TCAN1463-Q1 includes the Signal Improvement Capability (SIC) that enhances the maximum data rate achievable in complex star topologies by minimizing signal ringing. Signal ringing is the result of reflections caused by impedance mismatch at various points in a complex CAN network. An example of a star network is shown Figure 9-1. ECU 1 (terminated) ECU 5 ECU 4 ECU 6 ECU 2 ECU 3 ECU 8 (terminated) ECU 7 Figure 9-1. CAN network: Star Topology Recessive-to-dominant signal edge is usually clean as it’s strongly driven by the transmitter. Transmitter output impedance of CAN transceiver is RID(dom) and matches to the network characteristic impedance. For a regular CAN FD transceiver, dominant-to-recessive edge is when the driver output impedance goes to ~60 kΩ and signal reflected back experiences impedance mismatch which causes ringing. The TCAN1463-Q1 resolves this issue by TX-based Signal improvement capability (SIC). The TCAN1463-Q1 continues to drive the bus recessive strongly till tSIC_TX_base to minimize the reflections and the recessive bit is clean at the sampling point. In the active recessive phase, transmitter output impedance is low (RID(active_rec)). After this phase, the device enters into a passive recessive phase where the driver goes into high impedance state. This phenomenon is explained Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 17 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 using Figure 9-2. For further information, please refer to the white paper on how SIC unlocks the real potential of CAN-FD transceivers. TXD VI 70% 30% 0V tprop(TXD-busrec) tprop(TXD-busdom) 900 mV 500 mV VDIFF ~ 60 k
RID RID ~ 60 k Recessive tSIC_TX_base Recessive RID(active_rec) RID(dom) Dominant Active Recessive Figure 9-2. TX based Signal Improvement Capability 18 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 9.2 Functional Block Diagram VCC VIO 5 3 VIO TXD VSUP 10 VCC VLDO 1 DOMINANT TIME OUT VSUP 13 7 INH CANH *1 VSUP WAKE nSTB 9 SIC Driver WAKE 12 CANL 14 EN CONTROL and MODE LOGIC 6 nFAULT INH_MASK 8 11 High Speed Receiver UNDER VOLTAGE VIO RXD OVER TEMP 4 Logic Output MUX Low Power Receiver WUP Detect 2 GND 1. A pull-down resistor of 4 MΩ (typical) is activated on INH pin when the device is in Sleep mode. Figure 9-3. TCAN1463-Q1 Functional Block Diagram Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 19 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 9.3 Feature Description 9.3.1 Supply Pins The TCAN1463-Q1 implements three independent supply inputs for regulating different portions of the device. 9.3.1.1 VSUP Pin This pin is connected to the battery supply. It provides the supply to the internal regulators that support the digital core and the low power CAN receiver. 9.3.1.2 VCC Pin This pin provides the 5 V supply voltage for the CAN transceiver. 9.3.1.3 VIO Pin This pin provides the digital I/O voltage to match the CAN FD controller's I/O voltage. It supports I/O voltages from 1.7 V to 5.5 V providing a wide range of controller support. 9.3.2 Digital Inputs and Outputs 9.3.2.1 TXD Pin TXD is a logic-level input signal, referenced to VIO, from a CAN FD controller to the TCAN1463-Q1. TXD is biased to the VIO level to force a recessive input in case the pin floats. 9.3.2.2 RXD Pin RXD is a logic-level signal output, referenced to VIO, from the TCAN1463-Q1 to a CAN FD controller. The RXD pin is driven to the VIO level as logic-high outputs once a valid VIO is present. When a power-on or wake-up event takes place, the RXD pin is pulled low. 9.3.2.3 nFAULT Pin nFAULT is a logic-level output signal, referenced to VIO, from the TCAN1463-Q1 to a CAN FD controller. The nFAULT output is driven to the VIO level as logic-high output. The nFAULT output is used to transmit the TCAN1463-Q1 status indicator flags to the CAN FD controller. Please see Table 9-1 for the specific fault scenarios that are indicated externally via the nFAULT pin. The TCAN1463-Q1 puts the nFAULT pin in the high-impedance state in the Sleep mode to conserve power because there are no fault scenarios that are indicated externally in the Sleep mode. 9.3.2.4 EN Pin EN is a logic-level input signal, referenced to VIO, from a CAN FD controller to the TCAN1463-Q1. The EN input pin is for mode selection in conjunction with the nSTB pin. EN is internally pulled low to prevent excessive system power and false wake-up events. 9.3.2.5 nSTB Pin nSTB is a logic-level input signal, referenced to VIO, from a CAN FD controller to the TCAN1463-Q1. The nSTB input pin is for mode selection in conjunction with the EN pin. nSTB is internally pulled low to prevent excessive system power and false wake-up events. 9.3.2.6 INH_MASK Pin INH_MASK is a logic-level input signal, referenced to VIO, from a CAN FD controller to the TCAN1463-Q1. The INH_MASK input pin can be used to disable and enable the INH function when in Silent mode. This feature can be used to control the power supply to any power-intensive system blocks to avoid powering up the system blocks from low-power mode due to spurious wake-up events. INH_MASK function should not be used if the INH is used to control the power supply to the transceiver or the controller behind the transceiver - using INH_MASK in such a scenario would prevent the device from entering silent mode and enabling the INH function. See Figure 10-2 for an example application schematic for using INH_MASK function. 20 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 INH_MASK has a pull-down resistor that forces the INH feature to the enable state upon a cold start. To activate INH_MASK, the transceiver must be in silent mode. Once in silent mode, the INH_MASK pin is pulled high for t > tINH_MASK, disabling INH. The TCAN1463-Q1 latches this value and retains it through VCC and VIO power cycles and state transitions. The latched value is lost if the TCAN1463-Q1 enters an undervoltage fault on VSUP. To enable INH function again, the transceiver must be in Silent mode, and the INH_MASK pin must be pulled low for t > tINH_MASK. See Figure 8-10 and Figure 8-11 for the procedure to use the INH_MASK feature. The TCAN1463-Q1 reports a change in state of INH_MASK to the system controller by the driving nFAULT low while in silent mode. To use nFAULT=low as an acknowledgment for the change in state of INH_MASK , nFAULT must be high (that is, no pre-existing faults) before initiating the change in state of INH_MASK. A mode transition into normal, standby, go-to-sleep, or sleep mode clears the nFAULT pin. 9.3.3 GND GND is the ground pin of the transceiver, it must be connected to the PCB ground. 9.3.4 INH Pin The INH pin is a high-voltage output. It can be used to control external regulators. These regulators are usually used to support the microprocessor and VIO pin. The INH function is on in all modes except for sleep mode. In sleep mode, the INH pin is turned off, going into a high-impedance state. This allows the node to be placed into the lowest power state while in sleep mode. A 100 kΩ load can be added to the INH output for a fast transition time from the driven high state to the low state and to force the pin low when left floating. This terminal should be considered a high-voltage logic terminal, not a power output. The INH pin should be used to drive the EN terminal of the system’s power management device and should not be used as a switch for the power management supply itself. This terminal is not reverse-battery protected and thus should not be connected outside the system module. The INH function can be disabled/enabled using the INH_MASK pin in Silent mode. Refer to INH_MASK Pin for details. 9.3.5 WAKE Pin The WAKE pin is a high-voltage reverse-blocked input used for the local wake-up (LWU) function. The WAKE pin is bi-directional edge-triggered and recognizes a local wake-up (LWU) on either a rising or falling edge of WAKE pin transition. The LWU function is explained further in the Local Wake-Up (LWU) via WAKE Input Terminal section. 9.3.6 CAN Bus Pins These are the CAN high and CAN low, CANH and CANL, differential bus pins. These pins are internally connected to the CAN transceiver and the low-voltage wake receiver. 9.3.7 Faults 9.3.7.1 Internal and External Fault Indicators The following device status indicator flags are implemented to allow for the MCU to determine the status of the device and the system. In addition to faults, the nFAULT terminal also signals wake-up requests and a “cold” power-up sequence on the VSUP battery terminal so the system can do any diagnostics or cold booting sequence necessary. The RXD terminal indicates wake-up request and the faults are multiplexed (ORed) to the nFAULT output. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 21 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 Table 9-1. TCAN1463-Q1 Transceiver Status Indicator EVENT FLAG NAME CAUSE nFAULT = RXD = low after wake-up upon entering standby mode After a transition to normal mode or VCC < UVCC(F) or VIO < UVIO(F) for t ≥ tUV Wake-up request may only be set from standby, go-to-sleep, or sleep mode. Resets timers for UVVCC or UVVIO. WAKESR Available upon entering normal mode(4) nFAULT = low indicates a local wake-up event from the WAKE pin nFAULT = high indicates a remote wake-up event from the CAN bus After four recessive-todominant edges on TXD in normal mode, leaving normal mode, or VCC < UVCC(F) or VIO < UVIO(F) for t ≥ tUV A cold start condition generates a local wake-up WAKERQ, WAKESR and a PWRON flag. INHMASK INH_MASK value changed nFAULT = low after entering silent mode A mode transition into normal, standby, go-to-sleep, or sleep modes To use nFAULT as the flag indicator, nFAULT must be high before initiating change in state of INH_MASK (e.g. there should be no pre-existing faults) UVCC VCC < UVCC(F) Not externally indicated VCC > UVCC(R), or a wake-up request occurs UVIO VIO < UVIO(F) Not externally indicated VIO > UVIO(R), or a wake-up request occurs VSUP < UVSUP(F) Not externally indicated VSUP > UVSUP(R) See CAN Bus Fault Upon leaving normal mode, or if no CAN bus nFAULT = low in normal mode fault is detected for (5) only four consecutive dominant-torecessive transitions of the TXD pin while in normal mode Wake-up Request WAKERQ (2) Power up on VSUP and any return of VSUP after it has been below UVSUP Wake-up event on CAN bus, state transition on WAKE pin, or initial power up Undervoltage UVSUP CAN Bus Fault CBF TXDCLP TXDDTO Local Faults (4) (5) A VSUP undervoltage event generates a cold start condition once VSUP > UVSUP(R) CAN bus fault must persist for four consecutive dominantto-recessive transitions CAN driver remains disabled until the TXDCLP is cleared. CAN receiver remains active during the TXDCLP fault TXD low when CAN active mode is entered RXD = low & TXD = high, TXD = high & a mode transition into normal, standby, go-to-sleep, or sleep modes TXD dominant time out, dominant (low) signal for t ≥ tTXDDTO CAN driver remains disabled until the TXDDTO is cleared. CAN receiver remains active during the TXDDTO fault CAN driver remains disabled until the TXDRXD is cleared. CAN receiver remains active during the TXDRXD fault nFAULT = low upon entering silent mode from normal mode TXDRXD TXD and RXD pins are shorted together for t ≥ tTXDDTO CANDOM CAN bus dominant fault, when dominant bus signal received for t ≥ tBUSDOM RXD = high, or a transition into normal, standby, go-to-sleep, or sleep modes CAN driver remains enabled during CANDOM fault Thermal shutdown, TJ ≥ TSDR TJ < TSDF and RXD = low & TXD = high, or transition into normal, standby, go-to-sleep, or sleep modes CAN driver remains disabled until the TSD event is cleared TSD (1) (2) (3) COMMENT After a transition to normal mode PWRON INH_MASK Change FLAG IS CLEARED A cold start condition generates a local wake-up WAKERQ, WAKESR and a PWRON flag. Power-up Wake-up Source Recognition(3) INDICATORS(1) nFAULT = low upon entering silent mode from standby or sleep mode VIO and VSUP are present Transitions to go-to-sleep mode is blocked until WAKERQ flag is cleared Wake-up source recognition reflects the first wake up source. If additional wake-up events occur the source still indicates the original wake-up source Indicator is only available in normal mode until the flag is cleared CAN Bus failure flag is indicated after four dominant-to-recessive edges on TXD 9.3.7.1.1 Power-Up (PWRON Flag) This is an internal and external flag that can be used to control the power-up sequence of the system. When a new battery connection to the transceiver is made the PWRON flag is set signifying a cold start condition. The TCAN1463-Q1 treats any undervoltage conditions on the VSUP, VSUP < UVSUP(F), as a cold start. Therefore, when the VSUP > UVSUP(R) condition is met the TCAN1463-Q1 sets the PWRON flag which can be used by the system to enter a routine that is only called upon in cold start situations. The PWRON flag is indicated by nFAULT driven low after entering silent mode from either standby mode or sleep mode. This flag is cleared after a transition to normal mode. 22 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 System preconditioning routine Go to normal mode: nSTB = high EN = high Yes Standby mode:1 INH = high in STB mode Silent mode2 nSTB = high EN = low Read nFAULT low = cold start high = wake-up request 1 On entering Standby mode from power-up or Sleep mode 2 VCC and VIO are present 3 Optional nFAULT = low? No Go to normal mode: nSTB = high EN = high Read nFAULT 3 WAKESR flag low = local wake-up high = remote wake-up Normal mode Figure 9-4. Distinguishing between PWRON and Wake Request by Entering Silent Mode 9.3.7.1.2 Wake-Up Request (WAKERQ Flag) This is an internal and external flag that can be set in standby, go-to-sleep, or sleep mode. This flag is set when either a valid local wake-up (LWU) request occurs, or a valid remote wake request occurs, or on power up on VSUP. The setting of this flag clears the tUV timer for the UVCC or UVIO fault detection. This flag is cleared upon entering normal mode or during an undervoltage event on VCC or VIO. 9.3.7.1.3 Undervoltage Faults The TCAN1463-Q1 device implements undervoltage detection circuits on all supply terminals: VSUP, VCC, and VIO. The undervoltage flags are internal indicator flags and are not indicated on the nFAULT output pin. 9.3.7.1.3.1 Undervoltage on VSUP UVSUP is set when the voltage on VSUP drops below the undervoltage detection voltage threshold, UVSUP. The PWRON and WAKERQ flags are set once VSUP > UVSUP(R). 9.3.7.1.3.2 Undervoltage on VCC UVCC is set when the voltage on VCC drops below the undervoltage detection voltage threshold, UVCC, for longer than the tUV undervoltage filter time. 9.3.7.1.3.3 Undervoltage on VIO UVIO is set when the voltage on VIO drops below the undervoltage detection voltage threshold, UVIO, for longer than the tUV undervoltage filter time. 9.3.7.1.4 CAN Bus Fault (CBF Flag) The TCAN1463-Q1 device can detect the following six fault conditions and set the nFAULT pin low as an interrupt so that the controller can be notified and act if a CAN bus fault exists. These failures are detected while transmitting a dominant signal on the CAN bus. If one of these fault conditions persists for four consecutive dominant-to-recessive bit transitions, the nFAULT indicates a CAN bus failure flag in Normal mode by driving the nFAULT pin low. The CAN bus driver remains active. Table 9-2 shows what fault conditions can be detected by the TCAN1463-Q1. Table 9-2. Bus Fault Pin State and Detection Table FAULT Condition 1 CANH Shorted to VBAT 2 CANH Shorted to VCC 3 CANH Shorted to GND 4 CANL Shorted to VBAT 5 CANL Shorted to VCC 6 CANL Shorted to GND Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 23 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 Bus fault detection is a system level situation. If the fault is occurring at the ECU the general communication of the bus may be compromised. Until a diagnostic determination can be made the transceiver remains in CAN active mode during a CAN bus fault enabling the ECU to transmit data to the CAN bus and receive data from the CAN bus. For complete coverage of a node, a system level diagnostic step should be performed for each node and the information should be communicated back to a central point. While in normal mode, if no CAN bus fault is detected for four consecutive dominant-to-recessive transitions on the TXD pin then the CBF flag is cleared and nFAULT is driven high. The bus fault failure circuitry is able to detect bus faults for a range of differential resistance loads (RCBF) and for any time greater than tCBF. 9.3.7.1.5 TXD Clamped Low (TXDCLP Flag) TXDCLP is an external flag that is set if the transceiver detects that the TXD is clamped low before entering CAN active mode. If a TXDCLP condition exists the nFAULT pin is driven low upon entering silent mode from normal mode and the CAN bus driver is disabled until the fault is cleared. The TXDCLP flag is cleared at power-up, when entering CAN active mode with TXD recessive, or when TXD is recessive while RXD is dominant, if no other local failures exist. 9.3.7.1.6 TXD Dominant State Timeout (TXDDTO Flag) TXDDTO is an external flag that is set if the TXD pin is held dominant for t > tTXDDTO. If a TXD DTO condition exists, the nFAULT pin is driven low upon entering silent mode from normal mode. The TXDDTO flag is cleared on the next dominant-to-recessive transition on TXD or upon a transition into normal, standby, go-to-sleep, or sleep modes. 9.3.7.1.7 TXD Shorted to RXD Fault (TXDRXD Flag) TXDRXD is an external flag that is set if the transceiver detects that the TXD and RXD lines have been shorted together for t ≥ tTXDDTO. If a TXDRXD condition exists the nFAULT pin is driven low upon entering silent mode from normal mode and the CAN bus driver is disabled until the TXDRXD fault is cleared. The TXDRXD flag is cleared on the next dominant-to-recessive transition with TXD high and RXD low or upon a transition into normal, standby, go-to-sleep, or sleep modes. 9.3.7.1.8 CAN Bus Dominant Fault (CANDOM Flag) CANDOM is an external flag that is set if the CAN bus is stuck dominant state for t > tBUSDOM. If a CANDOM condition exists the nFAULT pin is driven low upon entering silent mode from normal mode. The CANDOM flag is cleared on the next dominant-to-recessive transition on RXD or upon a transition into normal, standby, go-to-sleep, or sleep modes. 9.3.8 Local Faults Local faults are detected in both normal mode and silent mode, but are only indicated via the nFAULT pin when the TCAN1463-Q1 transitions from normal mode to silent mode. All other mode transitions clear the local fault flag indicators. 9.3.8.1 TXD Clamped Low (TXDCLP) If the TXD pin is clamped low prior to entering CAN active mode the CAN driver is disabled releasing the bus line to the recessive level. The CAN driver will be activated again when entering normal mode with TXD recessive, when TXD is recessive while RXD is dominant, if no other local failures exist, or on power-up. During a TXDCLP fault the high-speed receiver remains active and the RXD output pin will mirror the CAN bus. 9.3.8.2 TXD Dominant Timeout (TXD DTO) While the CAN driver is in active mode a TXD dominant state timeout circuit prevents the local node from blocking network communication in event of a hardware or software failure where TXD is held dominant longer than the timeout period, t > tTXDDTO. The TXD dominant state timeout circuit is triggered by a falling edge on the TXD pin. If no rising edge is seen before on TXD before t > tTXDDTO than the CAN driver is disabled releasing the bus lines to the recessive level. This keeps the bus free for communication between other nodes on the network. The CAN driver will be activated again on the next dominant-to-recessive transition on the TXD pin. During a TXDDTO fault the high-speed receiver remains active and the RXD output pin will mirror the CAN bus. 24 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 TXD fault stuck dominant: example PCB failure or bad software tTXDDTO TXD (driver) Normal CAN communication Fault is repaired & transmission capability restored Driver disabled freeing bus for other nodes %XV ZRXOG EH ³VWXFN GRPLQDQW´ EORFNLQJ FRPPXQLFDWLRQ IRU WKH ZKROH QHWZRUN EXW 7;' '72 prevents this and frees the bus for communication after the time tTXDDTO. CAN Bus Signal tTXDDTO Communication from other bus node(s) Communication from repaired node RXD (receiver) Communication from local node Communication from other bus node(s) Communication from repaired local node Figure 9-5. Timing Diagram for TXD DTO The minimum dominant TXD time allowed by the dominant state timeout circuit limits the minimum possible transmitted data rate of the transceiver. The CAN protocol allows a maximum of eleven successive dominant bits to be transmitted in the worst case, where five successive dominant bits are followed immediately by an error frame. The minimum transmitted data rate may be calculated using the minimum tTXDDTO time in Equation 1. Minimum Data Rate = 11 bits / tTXDDTO = 11 bits / 1.2 ms = 9.2 kbps (1) 9.3.8.3 Thermal Shutdown (TSD) If the junction temperature of the TCAN1463-Q1 exceeds the thermal shutdown threshold the device turns off the CAN driver circuits thus blocking the TXD to bus transmission path. The CAN bus terminals are biased to recessive level during a TSD fault and the receiver to RXD path remains operational. The TSD fault condition is cleared when the junction temperature, TJ, of the device drops below the thermal shutdown release temperature, TSDF, of the device. If the fault condition that caused the TSD fault is still present, the temperature may rise again and the device will enter thermal shutdown again. Prolonged operation with TSD fault conditions may affect device reliability. The TSD circuit includes hysteresis to avoid any oscillation of the driver output. During the fault the TSD fault condition is indicated to the CAN FD controller via the nFAULT terminal. 9.3.8.4 Undervoltage Lockout (UVLO) The supply terminals, VSUP, VIO and VCC, are monitored for undervoltage events. If an undervoltage event occurs the TCAN1463-Q1 enters a protected state where the bus pins present no load to the CAN bus. This protects the CAN bus and system from unwanted glitches and excessive current draw that could impact communication between other CAN nodes on the CAN bus. If an undervoltage event occurs on VSUP in any mode, the TCAN1463-Q1 CAN transceiver enters the CAN off state. If an undervoltage event occurs on VCC, the TCAN1463-Q1 remains in normal or silent mode but the CAN transceiver changes to the CAN autonomous active state. During a UVCC event, RXD remains high as long as VIO is present and the wake-up circuitry is inactive. See Figure 9-12. If the undervoltage event persists longer than tUV, the TCAN1463-Q1 transitions to sleep mode. If an undervoltage event occurs on the VIO, the TCAN1463-Q1 transitions to standby mode. If the undervoltage event persists longer than tUV, the TCAN1463-Q1 transitions to sleep mode. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 25 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 Once an undervoltage condition is cleared and the supplies have returned to valid levels, the device typically needs 200 µs to transition to normal operation. 9.3.8.5 Unpowered Devices The device is designed to be a passive or no load to the CAN bus if it is unpowered. The CANH and CANL pins have low leakage currents when the device is unpowered, so they present no load to the bus. This is critical if some nodes of the network are unpowered while the rest of the of network remains in operation. The logic terminals also have low leakage currents when the device is unpowered so they do not load down other circuits which may remain powered. 9.3.8.6 Floating Terminals The TCAN1463-Q1 has internal pull-ups and pull-downs on critical pins to make sure a known operating behavior if the pins are left floating. See Table 9-3 for the pin fail-safe biasing protection description. Table 9-3. Pin Fail-safe Biasing PIN FAIL-SAFE PROTECTION TXD Recessive level Weak pull-up to VIO Weak pull-down to GND EN Low-power mode nSTB Low-power mode INH_MASK INH_MASK pin pulled to GND to disable INH_MASK function at powerup and when the feature is not needed. VALUE 60 kΩ COMMENT Weak pull-down to GND Weak pull-down to GND This internal bias should not be relied upon by design but rather a fail-safe option. Special care needs to be taken when the transceiver is used with a CAN FD controller that has open-drain outputs. The TCAN1463-Q1 implements a weak internal pull-up resistor on the TXD pin. The bit timing requirements for CAN FD data rates require special consideration and the pull-up strength should be considered carefully when using open-drain outputs. An adequate external pull-up resistor must be used to make sure the TXD output of the CAN FD controller maintains proper bit timing input to the CAN device. 9.3.8.7 CAN Bus Short-Circuit Current Limiting The TCAN1463-Q1 has several protection features that limit the short-circuit current when a CAN bus line is shorted. These include CAN driver current limiting in the dominant and recessive states and TXD dominant state timeout which prevents permanently having the higher short-circuit current of a dominant state in case of a system fault. During CAN communication the bus switches between the dominant and recessive states, thus the short-circuit current may be viewed either as the current during each bus state or as an average current. The average shortcircuit current should be used when considering system power for the termination resistors and common-mode choke. The percentage of time that the driver can be dominant is limited by the TXD dominant state timeout and the CAN protocol which has forced state changes and recessive bits such as bit stuffing, control fields, and interframe spacing. These makes sure there is a minimum recessive time on the bus even if the data field contains a high percentage of dominant bits. The short-circuit current of the bus depends on the ratio of recessive to dominant bits and their respective short-circuit currents. The average short-circuit current may be calculated using Equation 2. IOS(AVG) = %Transmit × [(%REC_Bits × IOS(SS)_REC) + (%DOM_Bits × IOS(SS)_DOM)] + [%Receive × IOS(SS)_REC] (2) Where: • IOS(AVG) is the average short-circuit current • %Transmit is the percentage the node is transmitting CAN messages • %Receive is the percentage the node is receiving CAN messages • %REC_Bits is the percentage of recessive bits in the transmitted CAN messages • %DOM_Bits is the percentage of dominant bits in the transmitted CAN messages 26 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com • • SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 IOS(SS)_REC is the recessive steady state short-circuit current IOS(SS)_DOM is the dominant steady state short-circuit current The short-circuit current and possible fault cases of the network should be taken into consideration when sizing the power ratings of the termination resistance and other network components. 9.4 Device Functional Modes The TCAN1463-Q1 has six operating modes: normal, standby, silent, go-to-sleep, sleep, and off mode. Operating mode selection is controlled using the nSTB pin and EN pin in conjunction with supply conditions, temperature conditions, and wake events. VSUP < UVVSUP(F) Power Off CAN: High impedance INH: High impedance RXD: High impedance Power On Start Up Normal Mode CAN: Bus bias active INH: VSUP level SWE timer inactive3 INH_MASK Input: Ignored EN = high and nSTB = low EN = high and nSTB = high (EN = low and nSTB = low) or VIO < UVIO EN = high and nSTB = high and VIO > UVIO EN = low and EN = low and nSTB = high nSTB = high and VIO > UVIO EN = high and nSTB = high Silent Mode CAN: Bus bias active INH: VSUP level SWE timer inactive/active3 INH_MASK Input: Disable/Enables INH6 SWE timer expires: t > tINACTIVE5 (EN = low or WAKERQ set) and nSTB = low EN = high and nSTB = low and WAKERQ Cleared EN = high and nSTB = low and WAKERQ Cleared 3,5 EN = low and nSTB = high Go-To-Sleep Mode CAN: Bus bias autonomous WAKE sources: WUP & LWU INH: VSUP level SWE timer inactive INH_MASK Input: Ignored Standby Mode CAN: Bus bias autonomous WAKE sources: WUP & LWU INH: VSUP level SWE timer active3 INH_MASK Input: Ignored 4 or 5 (EN = low and t < tGOTOSLEEP) or WUP or LWU EN = high and t > tGOTOSLEEP4 4 or 5 Wake-Up Event: WUP or LWU Sleep Mode CAN: Bus bias autonomous EN: x1 WAKE sources: WUP & LWU INH: High impedance nFAULT: High impedance SWE timer inactive INH_MASK Input: Ignored VCC falls below UVCC or Vio falls below UVIO for t > tUV2,4 From any other mode Figure 9-6. TCAN1463-Q1 State Machine 1. The enable pin can be in a logical high or low state while in sleep mode but since it has an internal pull-down, the lowest possible power consumption occurs when the pin is left either floating or pulled low externally. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 27 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 2. At power-up, the undervoltage timers for VCC and VIO are disabled, allowing for longer period for VCC and VIO supplies to power up (up to tINACTIVE). VCC or VIO need to be above UVCC(R) and UVIO(R) respectively to enable their respective tUV timers. The VCC undervoltage timer starts when VCC falls below UVCC(F), while VIO undervoltage timer starts when VIO falls below UVIO(F). When either of these timers exceed tUV, the device enters sleep mode. 3. The Sleep Wake Error (SWE) timer starts as soon as the device enters Standby mode. The timer halts and resets as soon as the device enters Normal mode. If the device enters Silent mode from Standby mode, the SWE timer does not halt and the device needs to be transitioned to Normal mode before the SWE timer expires. If the device enters Silent mode from Normal mode, the SWE timer will not be active in Silent mode. 4. When the Sleep mode is entered from Go-To-Sleep Mode or from a UVCC or UVIO event, a low-to-high transition on nSTB is required to move the device into Normal or Silent mode. If EN is high during the rising edge on nSTB, the device moves to Normal mode. If EN is low during the rising edge on nSTB, the device moves to Silent mode. VIO must be above UVIO(R) in order to leave Sleep mode using the EN and nSTB signals. 5. When Sleep mode is entered due to an SWE timer timeout (>tINACTIVE), there is an extra requirement to exit Sleep mode and transition into Normal or Silent mode directly using the EN and nSTB signals. To move to Normal mode, the nSTB pin must be high and a low-to-high transition must occur on EN. To move to Silent mode, the nSTB pin must be high and a high-to-low transition must occur on EN. If the device entered Sleep mode while the nSTB was already high, there must be a transition on the EN pin while nSTB is low prior to the sequence described above. See Figure 9-7 for more information. VIO must be above UVIO(R) to leave Sleep mode by using the EN and nSTB signals. 6. The device recognizes the change in state of INH_MASK pin only in Silent mode to enable/disable INH functionality. Device latches the changed value of INH_MASK in Silent mode and retains this value through mode transitions. The latched value is lost only due to an UVSUP event. The INH_MASK input is ignored in all other modes. Sleep to Normal Sleep to Silent >tMODE1(max)1 >tMODE1(max)1 nSTB nSTB EN EN Sleep Normal Sleep Silent 1. nSTB must remain low for a minimum of tMODE1 after the edge on EN. Once this tMODE1 has elapsed, nSTB may be driven high. The following edge on EN will cause the device to exit Sleep mode. The final edge on EN does not have any minimum delay from the rising edge of nSTB. The enable pin can be in a logical high or low state while in sleep mode, but since it has an internal pull-down, the lowest possible power consumption occurs when the pin is left either floating or pulled low externally. Figure 9-7. TCAN1463-Q1 Transitioning from Sleep Mode to Normal or Silent Mode if Sleep Mode is Entered Due to SWE Timer Timeout Table 9-4. TCAN1463-Q1 Mode Overview MODE VCC and VIO VSUP EN nSTB WAKERQ FLAG DRIVER RECEIVER RXD INH Normal > UVCC and > UVIO > UVSUP High High X Enabled Enabled Mirrors bus state On Silent > UVCC and > UVIO > UVSUP Low High X Disabled Enabled Mirrors bus state On > UVCC and > UVIO > UVSUP High Low Set Disabled Low power bus monitor enabled Low signals wake-up On > UVCC and > UVIO > UVSUP Low Low X Disabled Low power bus monitor enabled Low signals wake-up On > UVCC and < UVIO > UVSUP Low Low X Disabled Low power bus monitor enabled High impedance On > UVCC and > UVIO > UVSUP High Low Cleared Disabled Low power bus monitor enabled High or high impedance (no VIO) On(2) Standby Go-to-sleep(1) 28 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 Table 9-4. TCAN1463-Q1 Mode Overview (continued) MODE VCC and VIO > UVCC and > UVIO VSUP > UVSUP EN High nSTB Low WAKERQ FLAG Cleared DRIVER (1) (2) (3) RXD INH High Disabled Low power bus monitor enabled High or high impedance (no VIO) Impedance High or high impedance (no VIO) High impedance High impedance High impedance Sleep(3) Protected RECEIVER < UVCC or UVSUP X X X Disabled Low power bus monitor enabled X < UVSUP X X X Disabled Disabled Go-to-sleep: Transitional mode for EN = H, nSTB = L until tGOTOSLEEP timer has expired. The INH pin transitions to high impedance after the tGOTOSLEEP timer has expired. Mode change from go-to-sleep mode to sleep mode once tGOTOSLEEP timer has expired. 9.4.1 Operating Mode Description 9.4.1.1 Normal Mode This is the normal operating mode of the device. The CAN driver and receiver are fully operational and CAN communication is bi-directional. The driver is translating a digital input on TXD to a differential output on CANH and CANL. The receiver is translating the differential signal from CANH and CANL to a digital output on RXD. Entering normal mode clears both the WAKERQ and the PWRON flags. The SWE timer halts and resets upon entering normal mode. 9.4.1.2 Silent Mode Silent mode is commonly referred to as listen only and receive only mode. In this mode, the CAN driver is disabled but the receiver is fully operational and CAN communication is unidirectional into the device. The receiver is translating the differential signal from CANH and CANL to a digital output on the RXD terminal. In silent mode, PWRON and Local Failure flags are indicated on the nFAULT pin. If the device enters silent mode from standby mode, the SWE timer does not halt and the device needs to be transitioned to normal mode before the SWE timer expires. If the SWE timer expires in silent mode, the device is transitioned to sleep mode. 9.4.1.3 Standby Mode Standby mode is a low-power mode where the driver and receiver are disabled, reducing current consumption. However, this is not the lowest power mode of the device since the INH terminal is on, allowing the rest of the system to resume normal operation. During standby mode, a wake-up request (WAKERQ) is indicated by the RXD terminal being low. The wake-up source is identified via the nFAULT pin after the device is returned to normal mode. In standby mode, a fail-safe timer called Sleep Wake Error (SWE) timer is enabled. The timer adds an additional layer of protection by requiring the system controller to configure the transceiver to normal mode before it expires. This feature forces the TCAN1463-Q1 to transition to its lowest power mode, sleep mode, after tINACTIVE if the processor does not come up properly and fails to transition the device to Normal mode. 9.4.1.4 Go-To-Sleep Mode Go-to-sleep mode is the transitional mode of the device from any state to sleep. In this state the driver and receiver are disabled, reducing the current consumption. The INH pin is active in order to supply an enable to the VIO controller which allows the rest of the system to operate normally. If the device is held in this state for t ≥ tGOTOSLEEP the device transitions to sleep mode and the INH turns off transitioning to the high impedance state. If any wake-up events persist, the TCAN1463-Q1 remains in standby mode until the device is switched into normal mode to clear the pending wake-up events. 9.4.1.5 Sleep Mode Sleep mode is the lowest power mode of the TCAN1463-Q1. In sleep mode, the CAN transmitter and the main receiver are switched off and the transceiver cannot send or receive data. The low power receiver is able to monitor the bus for any activity that validates the wake-up pattern (WUP) requirements, and the WAKE Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 29 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 monitoring circuit monitors for state changes on the WAKE terminal for a local wake-up (LWU) event. ISUP current is reduced to its minimum level when the CAN transceiver is in CAN autonomous inactive state. The INH pin is switched off in sleep mode causing any system power supplies controlled by INH to be switched off thus reducing system power consumption. Sleep mode is exited: • If a valid wake-up pattern (WUP) is received via the CAN bus pins • On a local WAKE (LWU) event • On a low-to-high transition of the nSTB pin When the Sleep mode is entered due to an SWE timer timeout (>tINACTIVE), there is an extra requirement to enter Normal or Silent mode directly (without entering Standby mode via LWU or WUP) using the EN and nSTB signals. In order to move to the Normal mode, the nSTB pin must be high and a low-to-high transition must occur on EN. In order to move to the Silent mode, the nSTB pin must be high and a high-to-low transition must occur on EN. If the device entered the Sleep mode while the nSTB was already high, there must be a transition on the EN pin while nSTB is low prior to the sequence described above. See Figure 9-7 for more information. VIO must be above UVIO(R) in order to leave the Sleep mode using the EN and nSTB signals. 9.4.1.5.1 Remote Wake Request via Wake-Up Pattern (WUP) The TCAN1463-Q1 implements a low-power wake receiver in the standby and sleep mode that uses the multiple filtered dominant wake-up pattern (WUP) defined in the ISO11898-2:2016 standard. The wake-up pattern (WUP) consists of a filtered dominant bus, then a filtered recessive bus time followed by a second filtered dominant bus time. The first filtered dominant initiates the WUP and the bus monitor is now waiting on a filtered recessive; other bus traffic will not reset the bus monitor. Once a filtered recessive is received the bus monitor is now waiting on a filtered dominant, and again, other bus traffic will not reset the bus monitor. Immediately upon receiving of the second filtered dominant the bus monitor will recognize the WUP and drive the RXD terminal low, if a valid VIO is present signaling to the controller the wake-up request. If a valid VIO is not present when the wake-up pattern is received the transceiver drives the RXD output pin low once VIO > UVIOR. The WUP consists of: • A filtered dominant bus of at least tWK(FILTER) followed by • A filtered recessive bus time of at least tWK(FILTER) followed by • A second filtered dominant bus time of at least tWK(FILTER) For a dominant or recessive to be considered “filtered,” the bus must be in that state for more than tWK(FILTER) time. Due to variability in the tWK(FILTER) the following scenarios are applicable. Bus state times less than the tWK(FILTER) minimum will never be detected as part of a WUP and thus no wake request will be generated. Bus state times between tWK(FILTER) minimum and tWK(FILTER) maximum may be detected as part of a WUP and a wake request may be generated. Bus state times more than tWK(FILTER) maximum will always be detected as part of a WUP and thus a wake request will always be generated. See Figure 9-8 for the timing diagram of the WUP. The pattern and tWK(FILTER) time used for the WUP and wake request prevents noise and bus stuck dominant faults from causing false wake requests while allowing any CAN or CAN FD message to initiate a wake request. ISO11898-2:2016 has two sets of times for a short and long wake-up filter times. The tWK(FILTER) timing for the TCAN1463-Q1 has been picked to be within the min and max values of both filter ranges. This timing has been chosen such that a single bit time at 500 kbps, or two back to back bit times at 1 Mbps will trigger the filter in either bus state. For an additional layer of robustness and to prevent false wake-ups, the transceiver implements the tWK(TIMEOUT) timer. For a remote wake-up event to successfully occur, the entire wake-up pattern must be received within the timeout value. If the full wake-up pattern is not received before the tWK(TIMEOUT) expires then the internal logic is reset and the transceiver remains in sleep mode without waking up. The full pattern must then be transmitted again within the tWK(TIMEOUT) window. See Figure 9-8. A recessive bus of at least tWK(FILTER) must separate the next WUP pattern if the CAN bus is dominant when the tWK(TIMEOUT) expires. 30 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 Wake-Up Pattern (WUP) received in t < tWK_TIMEOUT Filtered Dominant Filtered Recessive Waiting for Filtered Recessive Waiting for Filtered Dominant Wake Request Filtered Dominant Bus Bus VDiff • WWK_FILTER • WWK_FILTER • WWK_FILTER * WUP Detect Mode Sleep Mode tINH_SLP_STB Standby Mode *The RXD pin is only driven once VIO is present. Figure 9-8. Wake-Up Pattern (WUP) 9.4.1.5.2 Local Wake-Up (LWU) via WAKE Input Terminal The WAKE terminal is a bi-directional high-voltage reverse-battery protected input which can be used for local wake-up (LWU) requests via a voltage transition. A LWU event is triggered on either a low-to-high or high-to-low transition since it has bi-directional input thresholds. The WAKE pin could be used with a switch to VSUP or to ground. If the terminal is unused it should be pulled to VSUP or ground to avoid unwanted parasitic wake-up events. Figure 9-9. WAKE Circuit Example Figure 9-9 shows two possible configurations for the WAKE pin, a low-side and high-side switch configuration. The objective of the series resistor, RSERIES, is to protect the WAKE input of the device from over current conditions that may occur in the event of a ground shift or ground loss. The minimum value of RSERIES can be calculated using the maximum supply voltage, VSUPMAX, and the maximum allowable current of the WAKE pin, IIO(WAKE). RSERIES is calculated using: RSERIES = VSUPMAX / IIO(WAKE) (3) Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 31 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 With absolute maximum voltage, VSUPMAX, of 45 V and maximum allowable IIO(WAKE) of 3 mA, the minimum required RSERIES value is 15 kΩ. The RBIAS resistor is used to set the static voltage level of the WAKE input when the switch is released. When the switch is in use in a high-side switch configuration, the RBIAS resistor in combination with the RSERIES resistor sets the WAKE pin voltage above the VIH threshold. The maximum value of RBIAS can be calculated using the maximum supply voltage, VSUPMAX, the maximum WAKE threshold voltage VIH, the maximum WAKE input current IIH and the series resistor value RSERIES. RBIAS is calculated using: RBIAS < ((VSUPMAX - VIH) / IIH) - RSERIES (4) With VSUPMAX of 45 V, VIH of 44 V at IIH of 3 µA, the RBIAS resistor value must be less than 330 kΩ. It is recommended to use RSeries less than 50 kΩ to provide better margin for the WAKE pin voltage to rise above VIH when the switch is released. The LWU circuitry is active in sleep mode. The WAKE circuitry is switched off in normal mode. t
tWAKE_HT no wake-up WAKE threshold not crossed t > tWAKE_HT wake-up Wake LWU Request tINH_SLP_STB INH * RXD Mode Sleep Mode Standby Mode * RXD is driven with valid VIO Figure 9-10. LWU Request Rising Edge 32 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 t
tWAKE_HT no wake-up WAKE threshold not crossed t > tWAKE_HT wake-up Wake LWU Request tINH_SLP_STB INH * RXD Mode Sleep Mode Standby Mode * RXD is driven with valid VIO Figure 9-11. LWU Request Falling Edge 9.4.2 CAN Transceiver 9.4.2.1 CAN Transceiver Operation The TCAN1463-Q1 supports the ISO 11898-2:2016 CAN physical layer standard autonomous bus biasing scheme. Autonomous bus biasing enables the transceiver to switch between CAN active, CAN autonomous active, and CAN autonomous inactive which helps to reduce RF emissions. 9.4.2.1.1 CAN Transceiver Modes The TCAN1463-Q1 CAN transceiver has four modes of operation; CAN off, CAN autonomous active, CAN autonomous inactive and CAN active. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 33 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 CAN Active CAN Transmitter: on2 CAN Receiver: on RXD: Mirrors CAN bus CANH & CANL: VCC/2 (~2.5 V) (t < or a sile annd V nt) d IO an (s > d ta U V n sle db VIO CC > ep y o UV ) rs CC le ep or go -to E m al EN C or t> tS IL C (n (s C CC UV rV > )o C p) VC d O lee an UV I r s o t) en > p sil V IO lee or nd o-s V IO al a o-t < U m g or or V IO by or nd CC ta UV (n d an CAN Off CAN Transmitter: off CAN Receiver: off RXD: High impedance CANH and CANL: High impedance E VSUP < UVSUP(F) NC LE t SI From any mode < VSUP > UVSUP(R) CAN Autonomous: Inactive CAN Transmitter: off CAN Receiver: off RXD: wake-up/high CANH and CANL: bias to GND CAN wake-up or ((normal or silent) and (VCC < UVCC or VIO < UVIO)) t > tSILENCE and (standby or go-to-sleep or sleep) CAN Autonomous: Active CAN Transmitter: off CAN Receiver: off RXD: low signals wake-up1 CANH and CANL: bias to 2.5 V from VSUP 1. Wake-up is inactive in normal or silent mode. 2. CAN transmitter is off in silent mode. Figure 9-12. TCAN1463-Q1 CAN Transceiver State Machine 9.4.2.1.1.1 CAN Off Mode In CAN off mode, the CAN transceiver is switched off and the CAN bus lines are truly floating. In this mode, the device presents no load to the CAN bus while preventing reverse currents from flowing into the device if the battery or ground connection is lost. The CAN off state is entered if: • VSUP < UVSUPF The CAN transceiver switches between the CAN off state and CAN autonomous inactive mode if: • VSUP > UVSUPR 9.4.2.1.1.2 CAN Autonomous: Inactive and Active When the CAN transceiver is in standby, go-to-sleep or sleep mode, the bias circuit can be in either the CAN autonomous inactive or CAN autonomous active state. In the autonomous inactive state, the CAN pins are biased to GND. When a remote wake-up (WUP) event occurs, the CAN bus is biased to 2.5 V and the CAN transceiver enters the CAN autonomous active state. If the controller does not transition the transceiver into normal mode before the tSILENCE timer expires, the CAN transceiver enters the CAN autonomous inactive state. The CAN transceiver switches to the CAN autonomous mode if any of the following conditions are met: • The operating mode changes from CAN off mode to CAN autonomous inactive • The operating mode changes from normal or silent mode to standby, go-to-sleep, or sleep mode: – If the bus was inactive for t < tSILENCE before the mode change, the transceiver enters autonomous active state – If the bus was inactive for t > tSILENCE before the mode change, the transceiver enters autonomous inactive state • VCC < UVCC(F) • VIO < UVIO(F) The CAN transceiver switches from the CAN autonomous inactive mode to the CAN autonomous active mode if: • A remote wake-up event occurs • The transceiver transitions to normal or silent mode and VCC < UVCC(F) or VIO < UVIO(F) The CAN transceiver switches from the CAN autonomous active mode to the CAN autonomous inactive mode if: 34 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com • SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 The transceiver is in standby, go-to-sleep, or sleep mode and t > tSILENCE 9.4.2.1.1.3 CAN Active When the transceiver is in normal or silent mode, the CAN transceiver is in active mode. In normal mode, the CAN driver and receiver are fully operational and CAN communication is bi-directional. In silent mode, the CAN driver is off but the CAN receiver is fully operational. The CAN bias voltage in CAN active mode is derived from VCC and is held at VCC/2 The CAN transceiver switches from the CAN autonomous inactive or CAN autonomous active modes to the CAN active mode if: • The transceiver transitions to normal mode and VCC > UVCC(R), VIO > UVIO(R) The CAN transceiver blocks its transmitter after entering CAN active mode if the TXD pin is asserted low before leaving standby mode. This prevents disruptions to CAN bus in the event that the TXD pin is stuck Low (TXDCLP). The CAN transceiver switches from the CAN active mode to the CAN autonomous inactive mode if: • The transceiver switches to standby, go-to-sleep, or sleep modes and t > tSILENCE The CAN transceiver switches from the CAN active mode to the CAN autonomous active mode if: • The transceiver switches to standby, go-to-sleep, or sleep modes and t < tSILENCE • VCC < UVCC(F) • VIO < UVIO(F) 9.4.2.1.2 Driver and Receiver Function Tables Table 9-5. Driver Function Table BUS OUTPUTS DEVICE MODE TXD INPUTS(1) Normal (1) (2) CANH CANL High Low Low DRIVEN BUS STATE(2) Dominant High or Open High impedance High impedance VCC/2 Silent x High impedance High impedance VCC/2 Standby x High impedance High impedance Autonomous biasing Sleep x High impedance High impedance Autonomous biasing x = irrelevant For bus states and typical bus voltages see Figure 9-13 Table 9-6. Receiver Function Table DEVICE MODE CAN DIFFERENTIAL INPUTS VID = VCANH – VCANL BUS STATE RXD TERMINAL VID ≥ 0.9 V Dominant Low 0.5 V < VID < 0.9 V Indeterminate Indeterminate VID ≤ 0.5 V Recessive High Open (VID ≈ 0 V) Open High VID ≥ 1.15 V Dominant 0.4 V < VID < 1.15 V Indeterminate VID ≤ 0.4 Recessive Normal / Silent Standby Sleep / Go-tosleep(1) (1) Open (VID ≈ 0 V) Open VID ≥ 1.15 V Dominant 0.4 V < VID < 1.15 V Indeterminate VID ≤ 0.4 V Recessive Open (VID ≈ 0 V) Open High Low if wake-up event persists High Tri-state if VIO or VSUP are not present Low power wake-up receiver is active Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 35 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 9.4.2.1.3 CAN Bus States The CAN bus has two logical states during operation: recessive and dominant. See Figure 9-13. A dominant bus state occurs when the bus is driven differentially and corresponds to a logic low on the TXD and RXD pins. A recessive bus state occurs when the bus is biased to one half of the CAN transceiver supply voltage via the high resistance internal input resistors (RIN) of the receiver and corresponds to a logic high on the TXD and RXD pins. A dominant state overwrites the recessive state during arbitration. Multiple CAN nodes may be transmitting a dominant bit at the same time during arbitration, and in this case the differential voltage of the CAN bus is greater than the differential voltage of a single CAN driver. The TCAN1463-Q1 CAN transceiver implements low-power standby and sleep modes which enable a third bus state where, if the CAN bus is inactive for t > tSILENCE, the bus pins are biased to ground via the high-resistance internal resistors of the receiver. Normal or Silent or all other Modes with t < tSILENCE Standby, Go-to-sleep or Sleep Mode t > tSILENCE Typical Bus Voltage CANH VDIFF VDIFF CANL Recessive Dominant Recessive Time, t Figure 9-13. Bus States 36 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 10 Application Information Disclaimer Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 10.1 Application Information The TCAN1463-Q1 transceiver is typically used in applications with a host microprocessor or FPGA that includes the data link layer portion of the CAN protocol. These types of applications usually also include power management technology that allows for power to be gated to the application via an enable (EN) or inhibit (INH) pin. A single 5-V regulator can be used to drive both VCC and VIO, or independent 5-V and 3.3-V regulators can be used to drive VCC and VIO separately as shown in Figure 10-1. The bus termination is shown for illustrative purposes. The TCAN1463-Q1 features an INH_MASK feature. The INH_MASK input pin can be used to disable and enable the INH function as long as the INH is not controlling the power supply to the transceiver or the controller behind the transceiver. This feature can be used to control the power supply to any power-intensive system blocks to avoid powering up the system blocks from low-power mode due to spurious wake-up events which saves power. See Figure 10-2 for an example application schematic. 10.1.1 Typical Application VBAT 3 k
EN VIN 100 k VREG 100 nF VSUP INH 5 V VOUT VCC 7 22 nF 33 k WAKE 10 9 3 VIO 100 nF VIO CANH 5 13 100 nF VDD GPIO GPIO MCU EN 6 nSTB 14 nFAULT GPIO TCAN1463 8 CANL CAN FD Controller 12 1 TXD RXD Optional: Terminating Node 4 2 11 Optional: Filtering, Transient and ESD INH_MASK (leave floating or connect to GND) Figure 10-1. Typical Application (Not Using INH_MASK feature) Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 37 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 3 k
VBAT VIN EN VREG VSUP 5 V VOUT VCC 22 nF 33 k 100 nF WAKE 10 9 3 VIO 100 nF VIO CANH 5 13 100 nF VDD EN nSTB GPIO GPIO MCU 6 14 nFAULT GPIO INH_MASK CAN FD Controller TCAN1463 8 11 CANL 12 1 TXD RXD Optional: Terminating Node 4 2 7 Optional: Filtering, Transient and ESD INH 100 k VIN VIN VREG EN VDD VOUT Power-intensive system block Figure 10-2. Typical Application (Using INH_MASK feature) 10.1.2 Design Requirements 10.1.2.1 Bus Loading, Length and Number of Nodes A typical CAN application may have a maximum bus length of 40 meters and maximum stub length of 0.3 m. However, with careful design, users can have longer cables, longer stub lengths, and many more nodes to a bus. A high number of nodes requires a transceiver with high input impedance such as the TCAN1463-Q1. Many CAN organizations and standards have scaled the use of CAN for applications outside the original ISO11898-2:2016 standard. They made system level trade off decisions for data rate, cable length, and parasitic loading of the bus. Examples of these CAN systems level specifications are ARINC825, CANopen, DeviceNet, SAEJ2284, SAEJ1939, and NMEA200. A CAN network system design is a series of tradeoffs. In the ISO 11898-2:2016 specification the differential output driver is specified with a bus load that can range from 50 Ω to 65 Ω where the differential output must be greater than 1.5 V. The TCAN1463-Q1 is specified to meet the 1.5-V requirement down to 50 Ω and is specified to meet 1.4-V differential output at 45Ω bus load. The differential input resistance, RID, of the TCAN1463-Q1 is a minimum of 50 kΩ. If 100 TCAN1463-Q1 transceivers are in parallel on a bus, this is equivalent to a 500-Ω differential load in parallel with the nominal 60 Ω bus termination which gives a total bus load of approximately 54 Ω. Therefore, the TCAN1463-Q1 theoretically supports over 100 transceivers on a single bus segment. 38 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 However, for CAN network design margin must be given for signal loss across the system and cabling, parasitic loadings, timing, network imbalances, ground offsets and signal integrity thus a practical maximum number of nodes is often lower. Bus length may also be extended beyond 40 meters by careful system design and data rate tradeoffs. For example, CANopen network design guidelines allow the network to be up to 1 km with changes in the termination resistance, cabling, less than 64 nodes and significantly lowered data rate. This flexibility in CAN network design is one of its key strengths allowing for these system level network extensions and additional standards to build on the original ISO11898-2 CAN standard. However, when using this flexibility, the CAN network system designer must take the responsibility of good network design for a robust network operation. 10.1.3 Detailed Design Procedure 10.1.3.1 CAN Termination Termination may be a single 120-Ω resistor at each end of the bus, either on the cable or in a terminating node. If filtering and stabilization of the common-mode voltage of the bus is desired then split termination may be used, see Figure 10-3. Split termination improves the electromagnetic emissions behavior of the network by filtering higher-frequency common-mode noise that may be present on the differential signal lines. Standard Termination Split Termination CANH CANH RTERM/2 RTERM TCAN Transceiver TCAN Transceiver CSPLIT RTERM/2 CANL CANL Figure 10-3. CAN Bus Termination Concepts 10.1.4 Application Curves 50 ICC Dominant (mA) 40 30 20 10 0 4.5 4.6 4.7 4.8 4.9 5 5.1 VCC (V) 5.2 5.3 5.4 5.5 Figure 10-4. Current Consumption (ICC(D)) in Dominant Mode vs VCC Supply Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 39 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 10.1.5 Power Supply Recommendations The TCAN1463-Q1 is designed to operate off of three supply rails; VSUP, VCC, and VIO. VSUP is a high-voltage supply pin designed to connect to the VBAT rail, V CC is a low-voltage supply pin with an input voltage range from 4.5 V to 5.5 V that supports the CAN transceiver and VIO is a low-voltage supply pin with an input voltage range from 1.7 V to 5.5 V that provides the I/O voltage to match the system controller. For a reliable operation, a 100 nF decoupling capacitor should be placed as close to the supply pins as possible. This helps to reduce supply voltage ripple present on the output of switched-mode power supplies, and also helps to compensate for the resistance and inductance of the PCB power planes. 10.1.6 Layout Robust and reliable CAN node design may require special layout techniques depending on the application and automotive design requirements. Since transient disturbances have high frequency content and a wide bandwidth, high-frequency layout techniques should be applied during PCB design. 10.1.6.1 Layout Guidelines The layout example provides information on components around the device. Place the protection and filtering circuitry as close to the bus connector, J1, to prevent transients, ESD and noise from propagating onto the board. Transient voltage suppression (TVS) device can be added for extra protection, shown as D1. The production solution can be either a bi-directional TVS diode or varistor with ratings matching the application requirements. This example also shows optional bus filter capacitors C6 and C7. A series common-mode choke (CMC) is placed on the CANH and CANL lines between the device and connector J1. Design the bus protection components in the direction of the signal path. Do not force the transient current to divert from the signal path to reach the protection device. Use supply and ground planes to provide low inductance. Note that high-frequency currents follow the path of least impedance and not the path of least resistance. Use at least two vias for supply and ground connections of bypass capacitors and protection devices to minimize trace and via inductance. • • • • • 40 Bypass and bulk capacitors should be placed as close as possible to the supply terminals of transceiver, examples are C1 on VCC, C2 on VIO, and C3 and C4 on the VSUP supply. VIO pin of the transceiver is connected to the microcontroller IO supply voltage 'µC V'. Bus termination: this layout example shows split termination. This is where the termination is split into two resistors, R3 and R4, with the center or split tap of the termination connected to ground via capacitor C5. Split termination provides common-mode filtering for the bus. When bus termination is placed on the board instead of directly on the bus, additional care must be taken to make sure the terminating node is not removed from the bus thus also removing the termination. INH, pin 7, can have a 100 kΩ resistor (R1) to ground. WAKE, pin 9, can recognize either a rising or a falling edge of a wake signal and is usually connected to an external switch. It should be configured as shown with C8 which is a 22 nF capacitor to GND where R5 is 33 kΩ and R6 is 3 kΩ. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 10.1.6.2 Layout Example TXD C6 nSTB TXD nSTB GND CANH VCC CANL R3 GND C5 C1 GND Choke D1 VCC RXD R4 INH_MASK RXD GND VIO VSUP C7 C3 C4 VSUP µC V C2 EN WAKE GND EN R5 INH To Switch nFAULT INH WAKE C8 R1 R6 GND VSUP GND Figure 10-5. Example Layout Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 41 TCAN1463-Q1 www.ti.com SLLSFE5C – MARCH 2020 – REVISED DECEMBER 2022 11 Device and Documentation Support 11.1 Documentation Support 11.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 11.3 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 11.4 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 11.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 11.6 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 42 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TCAN1463-Q1 PACKAGE OPTION ADDENDUM www.ti.com 9-Jun-2023 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) PTCAN1463DRQ1 ACTIVE SOIC D 14 2500 TBD Call TI Call TI -40 to 150 TCAN1463DMTRQ1 ACTIVE VSON DMT 14 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 150 TCAN 1463 Samples TCAN1463DRQ1 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 150 TCAN1463 Samples TCAN1463DYYRQ1 ACTIVE SOT-23-THIN DYY 14 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 150 TCAN1463 Samples Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of