THS4520EVM

THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 WIDEBAND, LOW NOISE, LOW DISTORTION FULLY DIFFERENTIAL AMPLIFIER WITH RAIL-TO-RAIL OUTPUTS FEATURES • • • • • • • • • • • • DESCRIPTION Fully Differential Architecture With Rail-to-Rail Outputs Centered Input Common-mode Range Minimum Gain of 1 V/V (0 dB) Bandwidth: 620 MHz Slew Rate: 570 V/μs 0.1% Settling Time: 7 ns HD2: –115 dBc at 100 kHz, VOD = 8 VPP HD3: –123 dBc at 100 kHz, VOD = 8 VPP Input Voltage Noise: 2 nV/√Hz (f >10 kHz) Output Common-Mode Control Power Supply: – Voltage: 3.3 V (±1.65 V) to 5 V (±2.5 V) – Current: 14.2 mA Power-Down Capability: 15 μA APPLICATIONS • • • • • 5-V and 3.3-V Data Acquisition Systems High Linearity ADC Amplifier Wireless Communication Test and Measurement Voice Processing Systems The THS4520 is a wideband, fully differential operational amplifier designed for 5-V data acquisition systems. It has very low noise at 2 nV/√Hz, and low harmonic distortion of –115 dBc HD2 and –123 dBc HD3 at 100 kHz with 8 VPP, and 1-kΩ load. The slew rate is 570 V/μs, and with a settling time of 7 ns to 0.1% (2-V step), it is ideal for data acquisition applications. It is designed for unity gain stability. To allow for dc coupling to ADCs, its unique output common-mode control circuit maintains the output common-mode voltage within 0.25 mV offset (typical) from the set voltage. The common-mode set point defaults to mid-supply by internal circuitry, which may be over-driven from an external source. The input and output are optimized for best performance with their common-mode voltages set to mid-supply. Along with high performance at low power supply voltage, this makes for extremely high performance single supply 5-V and 3.3-V data acquisition systems. The THS4520 is offered in a Quad 16-pin leadless QFN package (RGT), and is characterized for operation over the full industrial temperature range from –40°C to 85°C. THS4520 HARMONIC DISTORTION vs FREQUENCY RELATED PRODUCTS BW (MHZ) Slew Rate (V/μsec) THD (dBc) VN (nV/Hz) -60 THS4509 2000 6600 -102 at 10 MHz 1.9 -70 THS4500 370 2800 -82 at 8 MHz 7 THS4130 150 52 -97 at 250 kHz 1.3 499 W 2.5 V 499 W + Differential Input - VID Differential 1 kW Output - V OD - Harmonic Distortion - dBc Device VOD = 8 VPP, G = -1, RL = 1 KW, VS = ±2.5 V -80 -90 -100 -110 HD3 -120 HD2 -130 + 499 W -140 -2.5 V VOCM = open 499 W 1 100 10 f - Frequency - kHz 1000 Measured HD2/HD3 for G = -1, VOD = 8 VPP, RL = 1 KΩ (circuit shown on the left) Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2007, Texas Instruments Incorporated THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) UNIT VS– to VS+ Supply voltage 6V VI Input voltage ±VS VID Differential input voltage IO Output current 4V (1) 200 mA Continuous power dissipation TJ See Dissipation Rating Table Maximum junction temperature 150°C Maximum junction temperature, continuous operation, long term reliability 125°C TA Operating free-air temperature range –40°C to 85°C Tstg Storage temperature range –65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ESD ratings (1) 300°C HBM 2000 CDM 1500 MM 100 The THS4520 incorporates a (QFN) exposed thermal pad on the underside of the chip. See TI technical brief SLMA002 and SLMA004 for more information about utilizing the QFN thermally enhanced package. DISSIPATION RATINGS TABLE PER PACKAGE (1) 2 PACKAGE (1) θJC θJA RGT (16) 2.4°C/W 39.5°C/W POWER RATING TA ≤ 25°C TA = 85°C 2.3 W 225 mW For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. Submit Documentation Feedback THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 DEVICE INFORMATION RGT Package (TOP VIEW) VS− 16 15 14 13 NC 1 12 PD VIN− 2 11 VIN+ VOUT+ 3 10 VOUT− CM 4 9 5 7 6 CM 8 VS+ TERMINAL FUNCTIONS TERMINAL (RGT PACKAGE) NO. DESCRIPTION NAME 1 NC No internal connection 2 VIN– Inverting amplifier input 3 VOUT+ Non-inverted amplifier output 4, 9 CM Common-mode voltage input 5, 6, 7, 8 VS+ Positive amplifier power supply input 10 VOUT– Inverted amplifier output 11 VIN+ Non-inverting amplifier input 12 PD Powerdown, PD = logic low puts part into low power mode, PD = logic high or open for normal operation. If the PD pin is open (unterminated) the device will default to the enabled state. 13, 14, 15, 16 VS– Negative amplifier power supply input Submit Documentation Feedback 3 THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 SPECIFICATIONS; VS+ – VS– = 5 V: Test conditions unless otherwise noted: VS+ = +2.5 V, VS– = –2.5 V, G = 0 dB, CM = open, VO = 2 VPP, RF = 499 Ω, RL = 200 Ω Differential, TA = 25°C Single-Ended Input, Differential Output, Input and Output Referenced to mid-supply PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TEST LEVEL (1) AC PERFORMANCE Small-Signal Bandwidth G = 0 dB, VO = 100 mVPP 620 MHz G = 6 dB, VO = 100 mVPP 450 MHz G = 10 dB, VO = 100 mVPP 330 MHz G = 20 dB, VO = 100 mVPP 120 MHz 1200 MHz Gain-Bandwidth Product G = 20 dB Bandwidth for 0.1 dB flatness G = 6 dB, VO = 2 VPP 30 MHz Large-Signal Bandwidth G = 6 dB, VO = 2 VPP 132 MHz 570 V/μs Slew Rate (Differential) Rise Time Fall Time 4 2-V Step 4 Settling Time to 1% 6.2 Settling Time to 0.1% ns C 7 f = 100 kHz (3) f = 1 MHz (4) RL = 1 kΩ VOD = 8 VPP –115 RL = 200 Ω VOD = 2 VPP –100 RL = 1 kΩ 2nd Order Harmonic Distortion (2) RL = 200 Ω f = 8 MHz (3) f = 100 kHz –93 VOD = 2 VPP –101 VOD = 4 VPP –101 VOD = 2 VPP –103 –97 VOD = 2 VPP –100 VOD = 4 VPP –95 RL = 1 kΩ VOD = 8 VPP –123 RL = 200 Ω VOD = 2 VPP –105 f = 1 MHz (4) RL = 1 kΩ 3rd Order Harmonic Distortion (2) VOD = 4 VPP VOD = 4 VPP (4) RL = 1 kΩ RL = 200 Ω f = 8 MHz (4) RL = 1 kΩ VOD = 4 VPP –93 VOD = 2 VPP –101 VOD = 4 VPP –96 VOD = 2 VPP –92 VOD = 4 VPP –88 VOD = 2 VPP –102 VOD = 4 VPP –91 fC = 100 kHz (3), 10-kHz Tone Spacing, RL = 1k Ω, VOD = 8 VPP envelope, G = 0dB 3rd Order Intermodulation Distortion C fC = 1 MHz (4), 100-kHz Tone Spacing, RL = 200 Ω, VOD = 4 VPP envelope, G = 10dB dBc C dBc C dBc C –135 -82 (4) fC = 10 MHz , 100-kHz Tone Spacing, RL = 200 Ω, VOD = 4 VPP envelope, G = 10dB Input Voltage Noise f > 10 kHz 2 nV/√Hz Input Current Noise f > 10 kHz 2 pA/√Hz (1) (2) (3) (4) 4 -82 Test levels: (A) 100% tested at 25°C. Overtemperature limits by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value only for information. For additional information, see the Typical Characteristics section and the Apllications section. Data collected with applied differential input signal and measured differential output signal. Data collected with applied single-ended input signal and measured differential output signal. See Figure 55 in the Applications/Test Circuits section for additional information. Submit Documentation Feedback THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 SPECIFICATIONS; VS+ – VS– = 5 V: (continued) Test conditions unless otherwise noted: VS+ = +2.5 V, VS– = –2.5 V, G = 0 dB, CM = open, VO = 2 VPP, RF = 499 Ω, RL = 200 Ω Differential, TA = 25°C Single-Ended Input, Differential Output, Input and Output Referenced to mid-supply PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TEST LEVEL (1) dB C DC PERFORMANCE Open-Loop Voltage Gain (AOL) Input Offset Voltage Average Offset Voltage Drift Input Bias Current Average Bias Current Drift Input Offset Current Average Offset Current Drift 112 TA = 25°C ±0.25 ±2.5 mV TA = –40°C to 85°C ±0.25 ±3 mV TA = –40°C to 85°C 1 TA = 25°C 6.5 10 TA = –40°C to 85°C 6.4 11 TA = –40°C to 85°C 1.9 TA = 25°C ±0.2 ±2.5 TA = –40°C to 85°C ±0.2 ±3 TA = –40°C to 85°C 1.6 A μV/°C B μA A nA/°C B μA A nA/°C B INPUT Common-Mode Input Range High 1.75 Common-Mode Input Range Low –1.3 Common-Mode Rejection Ratio V 84 B dB Differential Input Impedance 7.5||0.31 kΩ||pF C Common-Mode Input Impedance 2.67||0.7 7 MΩ||pF C OUTPUT TA = 25°C Maximum Output Voltage High Each output with 100 Ω to mid-supply Minimum Output Voltage Low TA = –40C to 85°C 1.95 2.16 1.9 2.16 TA = 25°C –2.16 TA = –40C to 85°C –2.16 7.8 V –1.95 –1.9 A V Differential Output Voltage Swing TA = –40C to 85°C 8.64 V Differential Output Current Drive RL = 10 Ω 105 mA Output Balance Error VO = 100 mV, f = 1 MHz –80 dB 230 MHz 1 V/V C OUTPUT COMMON-MODE VOLTAGE CONTROL Small-Signal Bandwidth Gain Output Common-Mode Offset from CM input 1.25 V < CM < 3.5 V ±0.25 mV CM Input Bias Current 1.25 V < CM < 3.5 V 0.6 μA CM Input Voltage CM Default Voltage –1.5 CM = 0.5 (VS+ + VS- ) 1.5 0 C V V POWER SUPPLY Specified Operating Voltage Maximum Quiescent Current Minimum Quiescent Current 5 5.25 TA = 25°C 3 14.2 15.3 TA = –40C to 85°C 14.2 15.5 TA = 25°C TA = –40C to 85°C Power Supply Rejection (±PSRR) POWERDOWN Referenced to Vs– Enable Voltage Threshold For additional information, see the Application Information section of this data sheet. Disable Voltage Threshold Powerdown Quiescent Current 13.1 14.2 12.75 14.2 94 dB >1.5 V 10 kHz 2 nV/√Hz Input Current Noise f > 10 kHz 2 pA/√Hz (2) (3) (4) C dBc Input Voltage Noise (1) 6 ns 7.1 f = 100 kHz (3) rd C Test levels: (A) 100% tested at 25°C. Overtemperature limits by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value only for information. For additional information, see the Typical Characteristics section and the Apllications section. Data collected with applied differential input signal and measured differential output signal. Data collected with applied single-ended input signal and measured differential output signal. See Figure 55 in the Applications/Test Circuits section for additional information. Submit Documentation Feedback THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 SPECIFICATIONS; VS+ – VS– = 3.3 V: (continued) Test conditions unless otherwise noted: VS+ = +1.65 V, VS– = –1.65 V, G = 0 dB, CM = open, VO = 1 VPP, RF = 499 Ω, RL = 200 Ω Differential, TA = 25°C Single-Ended Input, Differential Output, Input and Output Referenced to mid-supply PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TEST LEVEL (1) DC PERFORMANCE Open-Loop Voltage Gain (AOL) Input Offset Voltage Average Offset Voltage Drift Input Bias Current Average Bias Current Drift Input Offset Current Average Offset Current Drift 104 dB TA = 25°C ±0.25 mV TA = –40°C to 85°C ±0.25 mV TA = –40°C to 85°C 1 TA = 25°C 6.5 TA = –40°C to 85°C 6.4 TA = –40°C to 85°C 1.9 TA = 25°C ±0.2 TA = –40°C to 85°C ±0.2 TA = –40°C to 85°C 1.6 C μV/°C μA C nA/°C μA C nA/°C INPUT Common-Mode Input Range High 1.4 Common-Mode Input Range Low –0.45 Common-Mode Rejection Ratio 84 V C dB OUTPUT Maximum Output Voltage High Minimum Output Voltage Low Each output with 100 Ω to mid-supply TA = 25°C 1.4 TA = 25°C –1.4 Differential Output Voltage Swing Differential Output Current Drive RL = 10 Ω Output Balance Error VO = 100 mV, f = 1 MHz V 5.6 V 78 mA –80 dB 224 MHz 1 V/V C C OUTPUT COMMON-MODE VOLTAGE CONTROL Small-Signal Bandwidth Gain Output Common-Mode Offset from CM input 1.25 V < CM < 3.5 V ±0.25 mV CM Input Bias Current 1.25 V < CM < 3.5 V 0.6 μA CM Default Voltage CM = 0.5 (VS+ + VS- ) 0 V C POWER SUPPLY Specified Operating Voltage Quiescent Current TA = 25°C Power Supply Rejection (±PSRR) POWERDOWN Referenced to Vs– Enable Voltage Threshold For additional information, see the Application Information section of this data sheet. Disable Voltage Threshold Powerdown Quiescent Current Submit Documentation Feedback 3.3 V 13 mA 94 dB >1 V